1979 	u32 reg_eac, reg_eb4, reg_ebc;  in _rtl92ee_phy_path_b_iqk()  local
2008 	reg_eb4 = rtl_get_bbreg(hw, 0xeb4, MASKDWORD);  in _rtl92ee_phy_path_b_iqk()
2012 	    (((reg_eb4 & 0x03FF0000) >> 16) != 0x142) &&  in _rtl92ee_phy_path_b_iqk()
2139 	u32 reg_eac, reg_eb4, reg_ebc, reg_ecc, reg_ec4, u32temp;  in _rtl92ee_phy_path_b_rx_iqk()  local
2181 	reg_eb4 = rtl_get_bbreg(hw, RTX_POWER_BEFORE_IQK_B, MASKDWORD);  in _rtl92ee_phy_path_b_rx_iqk()
2185 	    (((reg_eb4 & 0x03FF0000) >> 16) != 0x142) &&  in _rtl92ee_phy_path_b_rx_iqk()
2195 	u32temp = 0x80007C00 | (reg_eb4 & 0x3FF0000) |  in _rtl92ee_phy_path_b_rx_iqk()
2798 	long reg_eb4, reg_ebc, reg_ec4;  in rtl92ee_phy_iq_calibrate()  local
2868 	reg_eb4 = result[3][4];  in rtl92ee_phy_iq_calibrate()
2878 		reg_eb4 = result[final_candidate][4];  in rtl92ee_phy_iq_calibrate()
2879 		rtlphy->reg_eb4 = reg_eb4;  in rtl92ee_phy_iq_calibrate()
2887 		rtlphy->reg_eb4 = 0x100;  in rtl92ee_phy_iq_calibrate()