240 			dev_err(&spi->dev, "SPI transaction failed\n");  in wilc_spi_tx()
244 		dev_err(&spi->dev,  in wilc_spi_tx()
284 			dev_err(&spi->dev, "SPI transaction failed\n");  in wilc_spi_rx()
287 		dev_err(&spi->dev,  in wilc_spi_rx()
323 			dev_err(&spi->dev, "SPI transaction failed\n");  in wilc_spi_tx_rx()
325 		dev_err(&spi->dev,  in wilc_spi_tx_rx()
366 			dev_err(&spi->dev,  in spi_data_write()
376 			dev_err(&spi->dev,  in spi_data_write()
390 				dev_err(&spi->dev, "Failed data block crc write, bus error...\n");  in spi_data_write()
443 		dev_err(&spi->dev, "cmd [%x] not supported\n", cmd);  in wilc_spi_single_read()
457 		dev_err(&spi->dev,  in wilc_spi_single_read()
464 		dev_err(&spi->dev, "Failed cmd write, bus error...\n");  in wilc_spi_single_read()
471 			dev_err(&spi->dev,  in wilc_spi_single_read()
478 		dev_err(&spi->dev, "Failed cmd state response state (%02x)\n",  in wilc_spi_single_read()
488 		dev_err(&spi->dev, "Error, data start missing\n");  in wilc_spi_single_read()
501 			dev_err(&spi->dev, "%s: bad CRC 0x%04x "  in wilc_spi_single_read()
544 		dev_err(&spi->dev, "write cmd [%x] not supported\n", cmd);  in wilc_spi_write_cmd()
554 		dev_err(&spi->dev,  in wilc_spi_write_cmd()
561 		dev_err(&spi->dev, "Failed cmd write, bus error...\n");  in wilc_spi_write_cmd()
567 		dev_err(&spi->dev,  in wilc_spi_write_cmd()
574 		dev_err(&spi->dev, "Failed cmd state response state (%02x)\n",  in wilc_spi_write_cmd()
618 		dev_err(&spi->dev, "dma read write cmd [%x] not supported\n",  in wilc_spi_dma_rw()
628 		dev_err(&spi->dev, "spi buffer size too small (%d)(%d) (%zu)\n",  in wilc_spi_dma_rw()
634 		dev_err(&spi->dev, "Failed cmd write, bus error...\n");  in wilc_spi_dma_rw()
640 		dev_err(&spi->dev,  in wilc_spi_dma_rw()
647 		dev_err(&spi->dev, "Failed cmd state response state (%02x)\n",  in wilc_spi_dma_rw()
670 				dev_err(&spi->dev,  in wilc_spi_dma_rw()
682 			dev_err(&spi->dev,  in wilc_spi_dma_rw()
692 				dev_err(&spi->dev,  in wilc_spi_dma_rw()
699 				dev_err(&spi->dev, "%s: bad CRC 0x%04x "  in wilc_spi_dma_rw()
727 		dev_err(&spi->dev, "Failed cmd, read reg (%08x)...\n", addr);  in wilc_spi_read_reg()
746 		dev_err(&spi->dev, "Failed cmd, read block (%08x)...\n", addr);  in wilc_spi_read()
760 		dev_err(&spi->dev, "Failed internal write cmd...\n");  in spi_internal_write()
776 			dev_err(&spi->dev, "Failed internal read cmd...\n");  in spi_internal_read()
806 		dev_err(&spi->dev, "Failed cmd, write reg (%08x)...\n", addr);  in wilc_spi_write_reg()
833 		dev_err(&spi->dev, "Failed bus error...\n");  in spi_data_rsp()
842 		dev_err(&spi->dev,  in spi_data_rsp()
852 		dev_err(&spi->dev, "Data response error (%02x %02x)\n",  in spi_data_rsp()
872 		dev_err(&spi->dev,  in wilc_spi_write()
882 		dev_err(&spi->dev, "Failed block data write...\n");  in wilc_spi_write()
920 		dev_err(&spi->dev, "Fail cmd read chip id...\n");  in wilc_spi_init()
942 		dev_err(&spi->dev, "Failed with CRC7 on and off.\n");  in wilc_spi_init()
963 		dev_err(&spi->dev,  in wilc_spi_init()
982 		dev_err(&spi->dev, "Fail cmd read chip id...\n");  in wilc_spi_init()
1039 		dev_err(&spi->dev, "Too many interrupts (%d)...\n", nint);  in wilc_spi_sync_ext()
1048 		dev_err(&spi->dev, "Failed read reg (%08x)...\n",  in wilc_spi_sync_ext()
1055 		dev_err(&spi->dev, "Failed write reg (%08x)...\n",  in wilc_spi_sync_ext()
1065 		dev_err(&spi->dev, "Failed read reg (%08x)...\n",  in wilc_spi_sync_ext()
1075 		dev_err(&spi->dev, "Failed write reg (%08x)...\n",  in wilc_spi_sync_ext()
1082 			dev_err(&spi->dev, "Failed read reg (%08x)...\n",  in wilc_spi_sync_ext()
1092 			dev_err(&spi->dev, "Failed write reg (%08x)...\n",  in wilc_spi_sync_ext()