37 		{ 0x54000000, 0x02000, 0x1000 }, /* WFDMA PCIE0 MCU DMA0 */  in __mt7915_reg_addr()
38 		{ 0x55000000, 0x03000, 0x1000 }, /* WFDMA PCIE0 MCU DMA1 */  in __mt7915_reg_addr()
39 		{ 0x58000000, 0x06000, 0x1000 }, /* WFDMA PCIE1 MCU DMA0 (MEM_DMA) */  in __mt7915_reg_addr()
40 		{ 0x59000000, 0x07000, 0x1000 }, /* WFDMA PCIE1 MCU DMA1 */  in __mt7915_reg_addr()
41 		{ 0x7c000000, 0xf0000, 0x10000 }, /* CONN_INFRA */  in __mt7915_reg_addr()
42 		{ 0x7c020000, 0xd0000, 0x10000 }, /* CONN_INFRA, WFDMA */  in __mt7915_reg_addr()
43 		{ 0x80020000, 0xb0000, 0x10000 }, /* WF_TOP_MISC_OFF */  in __mt7915_reg_addr()
44 		{ 0x81020000, 0xc0000, 0x10000 }, /* WF_TOP_MISC_ON */  in __mt7915_reg_addr()
45 		{ 0x820c0000, 0x08000, 0x4000 }, /* WF_UMAC_TOP (PLE) */  in __mt7915_reg_addr()
46 		{ 0x820c8000, 0x0c000, 0x2000 }, /* WF_UMAC_TOP (PSE) */  in __mt7915_reg_addr()
47 		{ 0x820cc000, 0x0e000, 0x2000 }, /* WF_UMAC_TOP (PP) */  in __mt7915_reg_addr()
48 		{ 0x820ce000, 0x21c00, 0x0200 }, /* WF_LMAC_TOP (WF_SEC) */  in __mt7915_reg_addr()
49 		{ 0x820cf000, 0x22000, 0x1000 }, /* WF_LMAC_TOP (WF_PF) */  in __mt7915_reg_addr()
50 		{ 0x820d0000, 0x30000, 0x10000 }, /* WF_LMAC_TOP (WF_WTBLON) */  in __mt7915_reg_addr()
51 		{ 0x820e0000, 0x20000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_CFG) */  in __mt7915_reg_addr()
52 		{ 0x820e1000, 0x20400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_TRB) */  in __mt7915_reg_addr()
53 		{ 0x820e2000, 0x20800, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_AGG) */  in __mt7915_reg_addr()
54 		{ 0x820e3000, 0x20c00, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_ARB) */  in __mt7915_reg_addr()
55 		{ 0x820e4000, 0x21000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_TMAC) */  in __mt7915_reg_addr()
56 		{ 0x820e5000, 0x21400, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_RMAC) */  in __mt7915_reg_addr()
57 		{ 0x820e7000, 0x21e00, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_DMA) */  in __mt7915_reg_addr()
58 		{ 0x820e9000, 0x23400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_WTBLOFF) */  in __mt7915_reg_addr()
59 		{ 0x820ea000, 0x24000, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_ETBF) */  in __mt7915_reg_addr()
60 		{ 0x820eb000, 0x24200, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_LPON) */  in __mt7915_reg_addr()
61 		{ 0x820ec000, 0x24600, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_INT) */  in __mt7915_reg_addr()
62 		{ 0x820ed000, 0x24800, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_MIB) */  in __mt7915_reg_addr()
63 		{ 0x820f0000, 0xa0000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_CFG) */  in __mt7915_reg_addr()
64 		{ 0x820f1000, 0xa0600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_TRB) */  in __mt7915_reg_addr()
65 		{ 0x820f2000, 0xa0800, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_AGG) */  in __mt7915_reg_addr()
66 		{ 0x820f3000, 0xa0c00, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_ARB) */  in __mt7915_reg_addr()
67 		{ 0x820f4000, 0xa1000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_TMAC) */  in __mt7915_reg_addr()
68 		{ 0x820f5000, 0xa1400, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_RMAC) */  in __mt7915_reg_addr()
69 		{ 0x820f7000, 0xa1e00, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_DMA) */  in __mt7915_reg_addr()
70 		{ 0x820f9000, 0xa3400, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_WTBLOFF) */  in __mt7915_reg_addr()
71 		{ 0x820fa000, 0xa4000, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_ETBF) */  in __mt7915_reg_addr()
72 		{ 0x820fb000, 0xa4200, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_LPON) */  in __mt7915_reg_addr()
73 		{ 0x820fc000, 0xa4600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_INT) */  in __mt7915_reg_addr()
74 		{ 0x820fd000, 0xa4800, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_MIB) */  in __mt7915_reg_addr()
78 	if (addr < 0x100000)  in __mt7915_reg_addr()
81 	for (i = 0; i < ARRAY_SIZE(fixed_map); i++) {  in __mt7915_reg_addr()
94 	if ((addr >= 0x18000000 && addr < 0x18c00000) ||  in __mt7915_reg_addr()
95 	    (addr >= 0x70000000 && addr < 0x78000000) ||  in __mt7915_reg_addr()
96 	    (addr >= 0x7c000000 && addr < 0x7c400000))  in __mt7915_reg_addr()
146 		    (mt76_rr(dev, MT_HW_REV) & 0xff);  in mt7915_mmio_init()
149 	mt76_wr(dev, MT_INT_MASK_CSR, 0);  in mt7915_mmio_init()
151 	return 0;  in mt7915_mmio_init()