Lines Matching refs:iwl_write32
437 iwl_write32(trans, CSR_MSIX_AUTOMASK_ST_AD, BIT(queue)); in iwl_pcie_clear_irq()
524 iwl_write32(trans, CSR_INT_MASK, 0x00000000); in _iwl_disable_interrupts()
528 iwl_write32(trans, CSR_INT, 0xffffffff); in _iwl_disable_interrupts()
529 iwl_write32(trans, CSR_FH_INT_STATUS, 0xffffffff); in _iwl_disable_interrupts()
532 iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, in _iwl_disable_interrupts()
534 iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD, in _iwl_disable_interrupts()
591 iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); in _iwl_enable_interrupts()
599 iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, in _iwl_enable_interrupts()
601 iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD, in _iwl_enable_interrupts()
618 iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD, ~msk); in iwl_enable_hw_int_msk_msix()
626 iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, ~msk); in iwl_enable_fh_int_msk_msix()
637 iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); in iwl_enable_fw_load_int()
639 iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD, in iwl_enable_fw_load_int()
661 iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); in iwl_enable_fw_load_int_ctx_info()
703 iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); in iwl_enable_rfkill_int()
705 iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, in iwl_enable_rfkill_int()
749 iwl_write32(trans, reg, v); in __iwl_trans_pcie_set_bits_mask()