Lines Matching +full:0 +full:x300000
18 #define IWL_22000_NVM_VERSION 0x0a1d
21 #define IWL_22000_DCCM_OFFSET 0x800000 /* LMAC1 */
22 #define IWL_22000_DCCM_LEN 0x10000 /* LMAC1 */
23 #define IWL_22000_DCCM2_OFFSET 0x880000
24 #define IWL_22000_DCCM2_LEN 0x8000
25 #define IWL_22000_SMEM_OFFSET 0x400000
26 #define IWL_22000_SMEM_LEN 0xD0000
157 .mac_addr_from_csr = 0x380, \
165 .min_umac_error_event_table = 0x400000, \
166 .d3_debug_data_base_addr = 0x401000, \
183 .gp2_reg_addr = 0xa02c68, \
187 .mask = 0xffffffff, \
191 .mask = 0xffffffff, \
197 .trans.umac_prph_offset = 0x300000, \
201 .gp2_reg_addr = 0xd02c68, \
210 .mask = 0xffffffff, \
234 .mac_addr_from_csr = 0x30, \
242 .min_umac_error_event_table = 0x400000, \
243 .d3_debug_data_base_addr = 0x401000, \
258 .trans.umac_prph_offset = 0x300000, \
262 .gp2_reg_addr = 0xd02c68, \
271 .mask = 0xffffffff, \
332 .umac_prph_offset = 0x300000,
342 .umac_prph_offset = 0x300000,
356 .umac_prph_offset = 0x300000,
433 .umac_prph_offset = 0x300000
444 .umac_prph_offset = 0x300000,