Lines Matching +full:8 +full:kbyte

234  * degrees Kelvin = ((97 * 259 * (R4 - R2) / (R3 - R1)) / 100) + 8
238  * Celsius (273 degrees Kelvin).  The 8 (3 percent of 273) compensates for
245 #define TEMPERATURE_CALIB_KELVIN_OFFSET 8
310  *     If setting up txpowers for MIMO rates (rate idxes 8-15, 24-31),
440  * 8)  If setting up txpowers for MIMO rates (rate idxes 8-15, 24-31),
555  *   8         98         0x3d
653  *  -8 	      117         0x3F
669  *   8        110         0x3A
868 #define IL49_NUM_AMPDU_QUEUES	8
931  * Driver must allocate a 4KByte buffer that is used by 4965 for keeping the
957  *  27-0: TFD CB physical base address [35:8], must be 256-byte aligned
982  *     (typically 4K, although 8K or 16K are also selectable by driver).
987  *     27-0:  Receive Buffer physical address bits [35:8], 256-byte aligned
989  *     Driver sets physical address [35:8] of base of RBD circular buffer
992  * 2)  Rx status buffer, 8 bytes, in which 4965 indicates which Rx Buffers
1011  * RBs), should be 8 after preparing the first 8 RBs (for example), and must
1014  * NOTE:  4965 EXPECTS THE WRITE IDX TO BE INCREMENTED IN MULTIPLES OF 8.
1039  * Physical base address of 8-byte Rx Status buffer.
1048  *  27-0:  RBD CD physical base address [35:8], must be 256-byte aligned.
1076  * 23-20: # RBDs in circular buffer = 2^value; use "8" for 256 RBDs (normal),
1079  * 17-16: size of each receive buffer; '00' 4K (normal), '01' 8K,
1152  * 4965 has one configuration register for each of 8 Tx DMA/FIFO channels
1176 #define FH50_TCSR_CHNL_NUM                            (8)