Lines Matching defs:ath11k_hw_regs
262 struct ath11k_hw_regs { struct
263 u32 hal_tcl1_ring_base_lsb;
264 u32 hal_tcl1_ring_base_msb;
265 u32 hal_tcl1_ring_id;
266 u32 hal_tcl1_ring_misc;
267 u32 hal_tcl1_ring_tp_addr_lsb;
268 u32 hal_tcl1_ring_tp_addr_msb;
269 u32 hal_tcl1_ring_consumer_int_setup_ix0;
270 u32 hal_tcl1_ring_consumer_int_setup_ix1;
271 u32 hal_tcl1_ring_msi1_base_lsb;
272 u32 hal_tcl1_ring_msi1_base_msb;
273 u32 hal_tcl1_ring_msi1_data;
274 u32 hal_tcl2_ring_base_lsb;
275 u32 hal_tcl_ring_base_lsb;
277 u32 hal_tcl_status_ring_base_lsb;
279 u32 hal_reo1_ring_base_lsb;
280 u32 hal_reo1_ring_base_msb;
281 u32 hal_reo1_ring_id;
282 u32 hal_reo1_ring_misc;
283 u32 hal_reo1_ring_hp_addr_lsb;
284 u32 hal_reo1_ring_hp_addr_msb;
285 u32 hal_reo1_ring_producer_int_setup;
286 u32 hal_reo1_ring_msi1_base_lsb;
287 u32 hal_reo1_ring_msi1_base_msb;
288 u32 hal_reo1_ring_msi1_data;
289 u32 hal_reo2_ring_base_lsb;
290 u32 hal_reo1_aging_thresh_ix_0;
291 u32 hal_reo1_aging_thresh_ix_1;
292 u32 hal_reo1_aging_thresh_ix_2;
293 u32 hal_reo1_aging_thresh_ix_3;
295 u32 hal_reo1_ring_hp;
296 u32 hal_reo1_ring_tp;
297 u32 hal_reo2_ring_hp;
322 extern const struct ath11k_hw_regs ipq8074_regs; argument