3196 		    arvif->rate_ctrl[i] || arvif->rtscts[i]) {  in ath10k_new_peer_tid_config()
3202 			arg.rate_ctrl = arvif->rate_ctrl[i];  in ath10k_new_peer_tid_config()
3216 			arg.rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_DEFAULT_LOWEST_RATE;  in ath10k_new_peer_tid_config()
6919 			      u32 *rate_ctrl_flag, u8 *rate_ctrl,  in ath10k_mac_tid_bitrate_config()  argument
6932 		*rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_AUTO;  in ath10k_mac_tid_bitrate_config()
6958 		*rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_FIXED_RATE;  in ath10k_mac_tid_bitrate_config()
6962 		*rate_ctrl = WMI_PEER_TID_CONFIG_RATE_UPPER_CAP;  in ath10k_mac_tid_bitrate_config()
6992 				arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
7009 				arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
7025 			arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
7041 			arsta->rate_ctrl[arg->tid] = arg->rate_ctrl;  in ath10k_mac_set_tid_config()
7042 			arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
7061 				arvif->rate_ctrl[arg->tid] = arg->rate_ctrl;  in ath10k_mac_set_tid_config()
7085 				arvif->rate_ctrl[arg->tid] = arg->rate_ctrl;  in ath10k_mac_set_tid_config()
7126 				arg->rate_ctrl =  in ath10k_mac_parse_tid_config()
7133 				arg->rate_ctrl =  in ath10k_mac_parse_tid_config()
7154 							    &arg->rate_ctrl,  in ath10k_mac_parse_tid_config()
7161 				arg->rate_ctrl = 0;  in ath10k_mac_parse_tid_config()
7200 		arg.rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_AUTO;  in ath10k_mac_reset_tid_config()
7216 			arsta->rate_ctrl[i] = 0;  in ath10k_mac_reset_tid_config()
7223 			arvif->rate_ctrl[i] = 0;  in ath10k_mac_reset_tid_config()
7271 				arg.rate_ctrl = arvif->rate_ctrl[i];  in ath10k_sta_tid_cfg_wk()
7304 			    arvif->rate_ctrl[i] > WMI_TID_CONFIG_RATE_CONTROL_AUTO) {  in ath10k_sta_tid_cfg_wk()
7305 				arg.rate_ctrl = 0;  in ath10k_sta_tid_cfg_wk()
7309 			if (arsta->rate_ctrl[i] >  in ath10k_sta_tid_cfg_wk()
7313 				arg.rate_ctrl = 0;  in ath10k_sta_tid_cfg_wk()
7316 				arg.rate_ctrl = arvif->rate_ctrl[i];  in ath10k_sta_tid_cfg_wk()
7346 		arg.rate_ctrl = 0;  in ath10k_sta_tid_cfg_wk()