3574 	lockdep_assert_held(&ar->htt.tx_lock);  in ath10k_mac_tx_lock()
3595 	lockdep_assert_held(&ar->htt.tx_lock);  in ath10k_mac_tx_unlock()
3615 	lockdep_assert_held(&ar->htt.tx_lock);  in ath10k_mac_vif_tx_lock()
3626 	lockdep_assert_held(&ar->htt.tx_lock);  in ath10k_mac_vif_tx_unlock()
3646 	lockdep_assert_held(&ar->htt.tx_lock);  in ath10k_mac_vif_handle_tx_pause()
3691 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_handle_tx_pause_vdev()
3696 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_handle_tx_pause_vdev()
3731 	if (ar->htt.target_version_major < 3 &&  in ath10k_mac_tx_h_get_txmode()
3926 	return (ar->htt.target_version_major >= 3 &&  in ath10k_mac_tx_frm_has_freq()
3927 		ar->htt.target_version_minor >= 4 &&  in ath10k_mac_tx_frm_has_freq()
3962 		else if (ar->htt.target_version_major >= 3)  in ath10k_mac_tx_h_get_txpath()
3976 	struct ath10k_htt *htt = &ar->htt;  in ath10k_mac_tx_submit()  local
3981 		ret = ath10k_htt_tx(htt, txmode, skb);  in ath10k_mac_tx_submit()
3984 		ret = ath10k_htt_mgmt_tx(htt, skb);  in ath10k_mac_tx_submit()
4251 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_txq_unref()
4252 	idr_for_each_entry(&ar->htt.pending_tx, msdu, msdu_id) {  in ath10k_mac_txq_unref()
4257 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_txq_unref()
4290 	if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH)  in ath10k_mac_tx_can_push()
4293 	if (ar->htt.num_pending_tx < ar->htt.tx_q_state.num_push_allowed)  in ath10k_mac_tx_can_push()
4352 	struct ath10k_htt *htt = &ar->htt;  in ath10k_mac_tx_push_txq()  local
4365 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4366 	ret = ath10k_htt_tx_inc_pending(htt);  in ath10k_mac_tx_push_txq()
4367 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4374 		spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4375 		ath10k_htt_tx_dec_pending(htt);  in ath10k_mac_tx_push_txq()
4376 		spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4393 		spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4394 		ret = ath10k_htt_tx_mgmt_inc_pending(htt, is_mgmt, is_presp);  in ath10k_mac_tx_push_txq()
4397 			ath10k_htt_tx_dec_pending(htt);  in ath10k_mac_tx_push_txq()
4398 			spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4401 		spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4408 		spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4409 		ath10k_htt_tx_dec_pending(htt);  in ath10k_mac_tx_push_txq()
4411 			ath10k_htt_tx_mgmt_dec_pending(htt);  in ath10k_mac_tx_push_txq()
4412 		spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4417 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4419 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4451 	if (ar->htt.tx_q_state.mode != HTT_TX_MODE_SWITCH_PUSH)  in ath10k_mac_tx_push_pending()
4454 	if (ar->htt.num_pending_tx >= (ar->htt.max_num_pending_tx / 2))  in ath10k_mac_tx_push_pending()
4637 	struct ath10k_htt *htt = &ar->htt;  in ath10k_mac_op_tx()  local
4661 		spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4664 		ret = ath10k_htt_tx_inc_pending(htt);  in ath10k_mac_op_tx()
4668 			spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4673 		ret = ath10k_htt_tx_mgmt_inc_pending(htt, is_mgmt, is_presp);  in ath10k_mac_op_tx()
4677 			ath10k_htt_tx_dec_pending(htt);  in ath10k_mac_op_tx()
4678 			spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4682 		spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4689 			spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4690 			ath10k_htt_tx_dec_pending(htt);  in ath10k_mac_op_tx()
4692 				ath10k_htt_tx_mgmt_dec_pending(htt);  in ath10k_mac_op_tx()
4693 			spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4707 	if (ar->htt.tx_q_state.mode != HTT_TX_MODE_SWITCH_PUSH)  in ath10k_mac_op_wake_tx_queue()
5772 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_add_interface()
5775 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_add_interface()
5919 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_remove_interface()
5921 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_remove_interface()
7969 	time_left = wait_event_timeout(ar->htt.empty_tx_wq, ({  in ath10k_mac_wait_tx_complete()
7972 			spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_wait_tx_complete()
7973 			empty = (ar->htt.num_pending_tx == 0);  in ath10k_mac_wait_tx_complete()
7974 			spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_wait_tx_complete()
8003 			ath10k_htt_flush_tx(&ar->htt);  in ath10k_flush()
9243 	if (ar->htt.disable_tx_comp) {  in ath10k_sta_statistics()