Lines Matching refs:ce_ctrl_addr
148 u32 ce_ctrl_addr, in ath10k_ce_dest_ring_write_index_set() argument
151 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_write_index_set()
156 u32 ce_ctrl_addr) in ath10k_ce_dest_ring_write_index_get() argument
158 return ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_write_index_get()
163 u32 ce_ctrl_addr, in ath10k_ce_src_ring_write_index_set() argument
166 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_write_index_set()
171 u32 ce_ctrl_addr) in ath10k_ce_src_ring_write_index_get() argument
173 return ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_write_index_get()
186 u32 ce_ctrl_addr) in ath10k_ce_src_ring_read_index_get() argument
189 u32 ce_id = COPY_ENGINE_ID(ce_ctrl_addr); in ath10k_ce_src_ring_read_index_get()
197 index = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_read_index_get()
225 u32 ce_ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_src_ring_base_addr_set() local
228 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_base_addr_set()
232 ce_state->ops->ce_set_src_ring_base_addr_hi(ar, ce_ctrl_addr, in ath10k_ce_src_ring_base_addr_set()
238 u32 ce_ctrl_addr, in ath10k_ce_set_src_ring_base_addr_hi() argument
243 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_set_src_ring_base_addr_hi()
248 u32 ce_ctrl_addr, in ath10k_ce_src_ring_size_set() argument
251 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_size_set()
256 u32 ce_ctrl_addr, in ath10k_ce_src_ring_dmax_set() argument
261 u32 ctrl1_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_dmax_set()
264 ath10k_ce_write32(ar, ce_ctrl_addr + ctrl_regs->addr, in ath10k_ce_src_ring_dmax_set()
270 u32 ce_ctrl_addr, in ath10k_ce_src_ring_byte_swap_set() argument
275 u32 ctrl1_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_byte_swap_set()
278 ath10k_ce_write32(ar, ce_ctrl_addr + ctrl_regs->addr, in ath10k_ce_src_ring_byte_swap_set()
284 u32 ce_ctrl_addr, in ath10k_ce_dest_ring_byte_swap_set() argument
289 u32 ctrl1_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_byte_swap_set()
292 ath10k_ce_write32(ar, ce_ctrl_addr + ctrl_regs->addr, in ath10k_ce_dest_ring_byte_swap_set()
307 u32 ce_ctrl_addr) in ath10k_ce_dest_ring_read_index_get() argument
310 u32 ce_id = COPY_ENGINE_ID(ce_ctrl_addr); in ath10k_ce_dest_ring_read_index_get()
318 index = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_read_index_get()
330 u32 ce_ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_dest_ring_base_addr_set() local
333 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_base_addr_set()
337 ce_state->ops->ce_set_dest_ring_base_addr_hi(ar, ce_ctrl_addr, in ath10k_ce_dest_ring_base_addr_set()
343 u32 ce_ctrl_addr, in ath10k_ce_set_dest_ring_base_addr_hi() argument
349 reg_value = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_set_dest_ring_base_addr_hi()
353 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_set_dest_ring_base_addr_hi()
358 u32 ce_ctrl_addr, in ath10k_ce_dest_ring_size_set() argument
361 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_size_set()
366 u32 ce_ctrl_addr, in ath10k_ce_src_ring_highmark_set() argument
370 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + srcr_wm->addr); in ath10k_ce_src_ring_highmark_set()
372 ath10k_ce_write32(ar, ce_ctrl_addr + srcr_wm->addr, in ath10k_ce_src_ring_highmark_set()
378 u32 ce_ctrl_addr, in ath10k_ce_src_ring_lowmark_set() argument
382 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + srcr_wm->addr); in ath10k_ce_src_ring_lowmark_set()
384 ath10k_ce_write32(ar, ce_ctrl_addr + srcr_wm->addr, in ath10k_ce_src_ring_lowmark_set()
390 u32 ce_ctrl_addr, in ath10k_ce_dest_ring_highmark_set() argument
394 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + dstr_wm->addr); in ath10k_ce_dest_ring_highmark_set()
396 ath10k_ce_write32(ar, ce_ctrl_addr + dstr_wm->addr, in ath10k_ce_dest_ring_highmark_set()
402 u32 ce_ctrl_addr, in ath10k_ce_dest_ring_lowmark_set() argument
406 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + dstr_wm->addr); in ath10k_ce_dest_ring_lowmark_set()
408 ath10k_ce_write32(ar, ce_ctrl_addr + dstr_wm->addr, in ath10k_ce_dest_ring_lowmark_set()
414 u32 ce_ctrl_addr) in ath10k_ce_copy_complete_inter_enable() argument
418 u32 host_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_copy_complete_inter_enable()
421 ath10k_ce_write32(ar, ce_ctrl_addr + ar->hw_ce_regs->host_ie_addr, in ath10k_ce_copy_complete_inter_enable()
426 u32 ce_ctrl_addr) in ath10k_ce_copy_complete_intr_disable() argument
430 u32 host_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_copy_complete_intr_disable()
433 ath10k_ce_write32(ar, ce_ctrl_addr + ar->hw_ce_regs->host_ie_addr, in ath10k_ce_copy_complete_intr_disable()
438 u32 ce_ctrl_addr) in ath10k_ce_watermark_intr_disable() argument
442 u32 host_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_watermark_intr_disable()
445 ath10k_ce_write32(ar, ce_ctrl_addr + ar->hw_ce_regs->host_ie_addr, in ath10k_ce_watermark_intr_disable()
450 u32 ce_ctrl_addr) in ath10k_ce_error_intr_enable() argument
454 u32 misc_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_error_intr_enable()
458 ce_ctrl_addr + ar->hw_ce_regs->misc_ie_addr, in ath10k_ce_error_intr_enable()
463 u32 ce_ctrl_addr) in ath10k_ce_error_intr_disable() argument
468 ce_ctrl_addr + ar->hw_ce_regs->misc_ie_addr); in ath10k_ce_error_intr_disable()
471 ce_ctrl_addr + ar->hw_ce_regs->misc_ie_addr, in ath10k_ce_error_intr_disable()
476 u32 ce_ctrl_addr, in ath10k_ce_engine_int_status_clear() argument
481 ath10k_ce_write32(ar, ce_ctrl_addr + wm_regs->addr, mask); in ath10k_ce_engine_int_status_clear()