Lines Matching full:phydev
155 static int dp83869_read_status(struct phy_device *phydev) in dp83869_read_status() argument
157 struct dp83869_private *dp83869 = phydev->priv; in dp83869_read_status()
160 ret = genphy_read_status(phydev); in dp83869_read_status()
164 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported)) { in dp83869_read_status()
165 if (phydev->link) { in dp83869_read_status()
167 phydev->speed = SPEED_100; in dp83869_read_status()
169 phydev->speed = SPEED_UNKNOWN; in dp83869_read_status()
170 phydev->duplex = DUPLEX_UNKNOWN; in dp83869_read_status()
177 static int dp83869_ack_interrupt(struct phy_device *phydev) in dp83869_ack_interrupt() argument
179 int err = phy_read(phydev, MII_DP83869_ISR); in dp83869_ack_interrupt()
187 static int dp83869_config_intr(struct phy_device *phydev) in dp83869_config_intr() argument
191 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in dp83869_config_intr()
192 err = dp83869_ack_interrupt(phydev); in dp83869_config_intr()
196 micr_status = phy_read(phydev, MII_DP83869_MICR); in dp83869_config_intr()
208 err = phy_write(phydev, MII_DP83869_MICR, micr_status); in dp83869_config_intr()
210 err = phy_write(phydev, MII_DP83869_MICR, micr_status); in dp83869_config_intr()
214 err = dp83869_ack_interrupt(phydev); in dp83869_config_intr()
220 static irqreturn_t dp83869_handle_interrupt(struct phy_device *phydev) in dp83869_handle_interrupt() argument
224 irq_status = phy_read(phydev, MII_DP83869_ISR); in dp83869_handle_interrupt()
226 phy_error(phydev); in dp83869_handle_interrupt()
230 irq_enabled = phy_read(phydev, MII_DP83869_MICR); in dp83869_handle_interrupt()
232 phy_error(phydev); in dp83869_handle_interrupt()
239 phy_trigger_machine(phydev); in dp83869_handle_interrupt()
244 static int dp83869_set_wol(struct phy_device *phydev, in dp83869_set_wol() argument
247 struct net_device *ndev = phydev->attached_dev; in dp83869_set_wol()
252 val_rxcfg = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG); in dp83869_set_wol()
256 val_micr = phy_read(phydev, MII_DP83869_MICR); in dp83869_set_wol()
272 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
278 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
284 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
296 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
302 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
307 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol()
332 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG, val_rxcfg); in dp83869_set_wol()
336 return phy_write(phydev, MII_DP83869_MICR, val_micr); in dp83869_set_wol()
339 static void dp83869_get_wol(struct phy_device *phydev, in dp83869_get_wol() argument
348 value = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG); in dp83869_get_wol()
350 phydev_err(phydev, "Failed to read RX CFG\n"); in dp83869_get_wol()
364 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol()
367 phydev_err(phydev, "Failed to read RX SOP 1\n"); in dp83869_get_wol()
374 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol()
377 phydev_err(phydev, "Failed to read RX SOP 2\n"); in dp83869_get_wol()
384 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol()
387 phydev_err(phydev, "Failed to read RX SOP 3\n"); in dp83869_get_wol()
401 static int dp83869_get_downshift(struct phy_device *phydev, u8 *data) in dp83869_get_downshift() argument
405 val = phy_read(phydev, DP83869_CFG2); in dp83869_get_downshift()
434 static int dp83869_set_downshift(struct phy_device *phydev, u8 cnt) in dp83869_set_downshift() argument
442 return phy_clear_bits(phydev, DP83869_CFG2, in dp83869_set_downshift()
459 phydev_err(phydev, in dp83869_set_downshift()
467 return phy_modify(phydev, DP83869_CFG2, in dp83869_set_downshift()
472 static int dp83869_get_tunable(struct phy_device *phydev, in dp83869_get_tunable() argument
477 return dp83869_get_downshift(phydev, data); in dp83869_get_tunable()
483 static int dp83869_set_tunable(struct phy_device *phydev, in dp83869_set_tunable() argument
488 return dp83869_set_downshift(phydev, *(const u8 *)data); in dp83869_set_tunable()
494 static int dp83869_config_port_mirroring(struct phy_device *phydev) in dp83869_config_port_mirroring() argument
496 struct dp83869_private *dp83869 = phydev->priv; in dp83869_config_port_mirroring()
499 return phy_set_bits_mmd(phydev, DP83869_DEVADDR, in dp83869_config_port_mirroring()
503 return phy_clear_bits_mmd(phydev, DP83869_DEVADDR, in dp83869_config_port_mirroring()
508 static int dp83869_set_strapped_mode(struct phy_device *phydev) in dp83869_set_strapped_mode() argument
510 struct dp83869_private *dp83869 = phydev->priv; in dp83869_set_strapped_mode()
513 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1); in dp83869_set_strapped_mode()
527 static int dp83869_of_init(struct phy_device *phydev) in dp83869_of_init() argument
529 struct dp83869_private *dp83869 = phydev->priv; in dp83869_of_init()
530 struct device *dev = &phydev->mdio.dev; in dp83869_of_init()
552 ret = dp83869_set_strapped_mode(phydev); in dp83869_of_init()
566 ret = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1); in dp83869_of_init()
586 dp83869->rx_int_delay = phy_get_internal_delay(phydev, dev, in dp83869_of_init()
593 dp83869->tx_int_delay = phy_get_internal_delay(phydev, dev, in dp83869_of_init()
603 static int dp83869_of_init(struct phy_device *phydev) in dp83869_of_init() argument
605 return dp83869_set_strapped_mode(phydev); in dp83869_of_init()
609 static int dp83869_configure_rgmii(struct phy_device *phydev, in dp83869_configure_rgmii() argument
614 if (phy_interface_is_rgmii(phydev)) { in dp83869_configure_rgmii()
615 val = phy_read(phydev, MII_DP83869_PHYCTRL); in dp83869_configure_rgmii()
623 ret = phy_write(phydev, MII_DP83869_PHYCTRL, val); in dp83869_configure_rgmii()
629 ret = phy_modify_mmd(phydev, DP83869_DEVADDR, in dp83869_configure_rgmii()
638 static int dp83869_configure_fiber(struct phy_device *phydev, in dp83869_configure_fiber() argument
645 linkmode_and(phydev->advertising, phydev->advertising, in dp83869_configure_fiber()
646 phydev->supported); in dp83869_configure_fiber()
648 linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported); in dp83869_configure_fiber()
649 linkmode_set_bit(ADVERTISED_FIBRE, phydev->advertising); in dp83869_configure_fiber()
653 phydev->supported); in dp83869_configure_fiber()
656 phydev->supported); in dp83869_configure_fiber()
658 phydev->supported); in dp83869_configure_fiber()
661 bmcr = phy_read(phydev, MII_BMCR); in dp83869_configure_fiber()
665 phydev->autoneg = AUTONEG_DISABLE; in dp83869_configure_fiber()
666 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported); in dp83869_configure_fiber()
667 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->advertising); in dp83869_configure_fiber()
670 ret = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0); in dp83869_configure_fiber()
677 linkmode_or(phydev->advertising, phydev->advertising, in dp83869_configure_fiber()
678 phydev->supported); in dp83869_configure_fiber()
683 static int dp83869_configure_mode(struct phy_device *phydev, in dp83869_configure_mode() argument
696 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE, in dp83869_configure_mode()
701 ret = phy_write(phydev, MII_BMCR, MII_DP83869_BMCR_DEFAULT); in dp83869_configure_mode()
711 ret = phy_write(phydev, MII_DP83869_PHYCTRL, in dp83869_configure_mode()
716 ret = phy_write(phydev, MII_CTRL1000, DP83869_CFG1_DEFAULT); in dp83869_configure_mode()
720 ret = dp83869_configure_rgmii(phydev, dp83869); in dp83869_configure_mode()
725 ret = phy_modify_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE, in dp83869_configure_mode()
731 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_configure_mode()
738 ret = phy_write(phydev, MII_DP83869_PHYCTRL, in dp83869_configure_mode()
743 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_configure_mode()
749 ret = phy_write(phydev, MII_DP83869_PHYCTRL, in dp83869_configure_mode()
755 ret = phy_write(phydev, MII_DP83869_PHYCTRL, in dp83869_configure_mode()
760 ret = phy_write(phydev, MII_CTRL1000, DP83869_CFG1_DEFAULT); in dp83869_configure_mode()
764 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_configure_mode()
772 ret = dp83869_configure_fiber(phydev, dp83869); in dp83869_configure_mode()
781 static int dp83869_config_init(struct phy_device *phydev) in dp83869_config_init() argument
783 struct dp83869_private *dp83869 = phydev->priv; in dp83869_config_init()
787 ret = phy_modify(phydev, DP83869_CFG2, DP83869_DOWNSHIFT_EN, in dp83869_config_init()
792 ret = dp83869_configure_mode(phydev, dp83869); in dp83869_config_init()
797 if (phy_interrupt_is_valid(phydev)) { in dp83869_config_init()
798 val = phy_read(phydev, DP83869_CFG4); in dp83869_config_init()
800 phy_write(phydev, DP83869_CFG4, val); in dp83869_config_init()
804 dp83869_config_port_mirroring(phydev); in dp83869_config_init()
808 ret = phy_modify_mmd(phydev, in dp83869_config_init()
814 if (phy_interface_is_rgmii(phydev)) { in dp83869_config_init()
815 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIIDCTL, in dp83869_config_init()
821 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL); in dp83869_config_init()
825 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) in dp83869_config_init()
829 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) in dp83869_config_init()
832 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) in dp83869_config_init()
835 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL, in dp83869_config_init()
842 static int dp83869_probe(struct phy_device *phydev) in dp83869_probe() argument
847 dp83869 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83869), in dp83869_probe()
852 phydev->priv = dp83869; in dp83869_probe()
854 ret = dp83869_of_init(phydev); in dp83869_probe()
860 phydev->port = PORT_FIBRE; in dp83869_probe()
862 return dp83869_config_init(phydev); in dp83869_probe()
865 static int dp83869_phy_reset(struct phy_device *phydev) in dp83869_phy_reset() argument
869 ret = phy_write(phydev, DP83869_CTRL, DP83869_SW_RESET); in dp83869_phy_reset()
878 return dp83869_config_init(phydev); in dp83869_phy_reset()