19 #define BRCM_PHY_MODEL(phydev) \  argument
20 	((phydev)->drv->phy_id & (phydev)->drv->phy_id_mask)
22 #define BRCM_PHY_REV(phydev) \  argument
23 	((phydev)->drv->phy_id & ~((phydev)->drv->phy_id_mask))
29 static int bcm54xx_config_clock_delay(struct phy_device *phydev)  in bcm54xx_config_clock_delay()  argument
34 	val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);  in bcm54xx_config_clock_delay()
36 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII ||  in bcm54xx_config_clock_delay()
37 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {  in bcm54xx_config_clock_delay()
41 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||  in bcm54xx_config_clock_delay()
42 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {  in bcm54xx_config_clock_delay()
46 	rc = bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,  in bcm54xx_config_clock_delay()
52 	val = bcm_phy_read_shadow(phydev, BCM54810_SHD_CLK_CTL);  in bcm54xx_config_clock_delay()
53 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII ||  in bcm54xx_config_clock_delay()
54 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {  in bcm54xx_config_clock_delay()
58 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||  in bcm54xx_config_clock_delay()
59 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {  in bcm54xx_config_clock_delay()
63 	rc = bcm_phy_write_shadow(phydev, BCM54810_SHD_CLK_CTL, val);  in bcm54xx_config_clock_delay()
70 static int bcm54210e_config_init(struct phy_device *phydev)  in bcm54210e_config_init()  argument
74 	bcm54xx_config_clock_delay(phydev);  in bcm54210e_config_init()
76 	if (phydev->dev_flags & PHY_BRCM_EN_MASTER_MODE) {  in bcm54210e_config_init()
77 		val = phy_read(phydev, MII_CTRL1000);  in bcm54210e_config_init()
79 		phy_write(phydev, MII_CTRL1000, val);  in bcm54210e_config_init()
85 static int bcm54612e_config_init(struct phy_device *phydev)  in bcm54612e_config_init()  argument
89 	bcm54xx_config_clock_delay(phydev);  in bcm54612e_config_init()
92 	if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) {  in bcm54612e_config_init()
95 		reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0);  in bcm54612e_config_init()
96 		err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0,  in bcm54612e_config_init()
106 static int bcm54616s_config_init(struct phy_device *phydev)  in bcm54616s_config_init()  argument
110 	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&  in bcm54616s_config_init()
111 	    phydev->interface != PHY_INTERFACE_MODE_1000BASEX)  in bcm54616s_config_init()
116 	val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);  in bcm54616s_config_init()
121 	rc = bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,  in bcm54616s_config_init()
127 	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_MODE);  in bcm54616s_config_init()
131 	rc = bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, val);  in bcm54616s_config_init()
136 	rc = phy_set_bits(phydev, MII_BMCR, BMCR_PDOWN);  in bcm54616s_config_init()
142 	val |= phydev->interface == PHY_INTERFACE_MODE_SGMII ?  in bcm54616s_config_init()
145 	rc = bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, val);  in bcm54616s_config_init()
150 	rc = phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN);  in bcm54616s_config_init()
156 	rc = bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, val);  in bcm54616s_config_init()
161 	return phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN);  in bcm54616s_config_init()
165 static int bcm50610_a0_workaround(struct phy_device *phydev)  in bcm50610_a0_workaround()  argument
169 	err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_AADJ1CH0,  in bcm50610_a0_workaround()
175 	err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_AADJ1CH3,  in bcm50610_a0_workaround()
180 	err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP75,  in bcm50610_a0_workaround()
185 	err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP96,  in bcm50610_a0_workaround()
190 	err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP97,  in bcm50610_a0_workaround()
196 static int bcm54xx_phydsp_config(struct phy_device *phydev)  in bcm54xx_phydsp_config()  argument
201 	err = bcm54xx_auxctl_write(phydev,  in bcm54xx_phydsp_config()
208 	if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||  in bcm54xx_phydsp_config()
209 	    BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) {  in bcm54xx_phydsp_config()
211 		err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP08,  in bcm54xx_phydsp_config()
216 		if (phydev->drv->phy_id == PHY_ID_BCM50610) {  in bcm54xx_phydsp_config()
217 			err = bcm50610_a0_workaround(phydev);  in bcm54xx_phydsp_config()
223 	if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM57780) {  in bcm54xx_phydsp_config()
226 		val = bcm_phy_read_exp(phydev, MII_BCM54XX_EXP_EXP75);  in bcm54xx_phydsp_config()
231 		err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP75, val);  in bcm54xx_phydsp_config()
236 	err2 = bcm54xx_auxctl_write(phydev,  in bcm54xx_phydsp_config()
244 static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)  in bcm54xx_adjust_rxrefclk()  argument
251 	if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 &&  in bcm54xx_adjust_rxrefclk()
252 	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 &&  in bcm54xx_adjust_rxrefclk()
253 	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M &&  in bcm54xx_adjust_rxrefclk()
254 	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54210E &&  in bcm54xx_adjust_rxrefclk()
255 	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54810 &&  in bcm54xx_adjust_rxrefclk()
256 	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54811)  in bcm54xx_adjust_rxrefclk()
259 	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR3);  in bcm54xx_adjust_rxrefclk()
265 	if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||  in bcm54xx_adjust_rxrefclk()
266 	     BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) &&  in bcm54xx_adjust_rxrefclk()
267 	    BRCM_PHY_REV(phydev) >= 0x3) {  in bcm54xx_adjust_rxrefclk()
274 		if (phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED) {  in bcm54xx_adjust_rxrefclk()
275 			if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54811) {  in bcm54xx_adjust_rxrefclk()
283 	if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))  in bcm54xx_adjust_rxrefclk()
288 	if (phydev->dev_flags & PHY_BRCM_DIS_TXCRXC_NOENRGY) {  in bcm54xx_adjust_rxrefclk()
289 		if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54210E ||  in bcm54xx_adjust_rxrefclk()
290 		    BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810 ||  in bcm54xx_adjust_rxrefclk()
291 		    BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54811)  in bcm54xx_adjust_rxrefclk()
298 		bcm_phy_write_shadow(phydev, BCM54XX_SHD_SCR3, val);  in bcm54xx_adjust_rxrefclk()
300 	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_APD);  in bcm54xx_adjust_rxrefclk()
306 	if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))  in bcm54xx_adjust_rxrefclk()
312 		bcm_phy_write_shadow(phydev, BCM54XX_SHD_APD, val);  in bcm54xx_adjust_rxrefclk()
315 static int bcm54xx_config_init(struct phy_device *phydev)  in bcm54xx_config_init()  argument
319 	reg = phy_read(phydev, MII_BCM54XX_ECR);  in bcm54xx_config_init()
325 	err = phy_write(phydev, MII_BCM54XX_ECR, reg);  in bcm54xx_config_init()
333 	err = phy_write(phydev, MII_BCM54XX_IMR, reg);  in bcm54xx_config_init()
337 	if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||  in bcm54xx_config_init()
338 	     BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) &&  in bcm54xx_config_init()
339 	    (phydev->dev_flags & PHY_BRCM_CLEAR_RGMII_MODE))  in bcm54xx_config_init()
340 		bcm_phy_write_shadow(phydev, BCM54XX_SHD_RGMII_MODE, 0);  in bcm54xx_config_init()
342 	bcm54xx_adjust_rxrefclk(phydev);  in bcm54xx_config_init()
344 	switch (BRCM_PHY_MODEL(phydev)) {  in bcm54xx_config_init()
347 		err = bcm54xx_config_clock_delay(phydev);  in bcm54xx_config_init()
350 		err = bcm54210e_config_init(phydev);  in bcm54xx_config_init()
353 		err = bcm54612e_config_init(phydev);  in bcm54xx_config_init()
356 		err = bcm54616s_config_init(phydev);  in bcm54xx_config_init()
360 		val = bcm_phy_read_exp(phydev,  in bcm54xx_config_init()
363 		err = bcm_phy_write_exp(phydev,  in bcm54xx_config_init()
371 	bcm54xx_phydsp_config(phydev);  in bcm54xx_config_init()
381 	if (!phy_on_sfp(phydev)) {  in bcm54xx_config_init()
384 		bcm_phy_write_shadow(phydev, BCM5482_SHD_LEDS1, val);  in bcm54xx_config_init()
389 		bcm_phy_write_exp(phydev, BCM_EXP_MULTICOLOR, val);  in bcm54xx_config_init()
395 static int bcm54xx_resume(struct phy_device *phydev)  in bcm54xx_resume()  argument
402 	ret = genphy_resume(phydev);  in bcm54xx_resume()
411 	return bcm54xx_config_init(phydev);  in bcm54xx_resume()
414 static int bcm54811_config_init(struct phy_device *phydev)  in bcm54811_config_init()  argument
419 	reg = bcm_phy_read_exp(phydev, BCM54810_EXP_BROADREACH_LRE_MISC_CTL);  in bcm54811_config_init()
421 	err = bcm_phy_write_exp(phydev, BCM54810_EXP_BROADREACH_LRE_MISC_CTL,  in bcm54811_config_init()
426 	err = bcm54xx_config_init(phydev);  in bcm54811_config_init()
429 	if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) {  in bcm54811_config_init()
430 		reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0);  in bcm54811_config_init()
431 		err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0,  in bcm54811_config_init()
440 static int bcm5481_config_aneg(struct phy_device *phydev)  in bcm5481_config_aneg()  argument
442 	struct device_node *np = phydev->mdio.dev.of_node;  in bcm5481_config_aneg()
446 	ret = genphy_config_aneg(phydev);  in bcm5481_config_aneg()
449 	bcm54xx_config_clock_delay(phydev);  in bcm5481_config_aneg()
453 		ret = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_SEL_ER + 0x9,  in bcm5481_config_aneg()
466 static int bcm54616s_probe(struct phy_device *phydev)  in bcm54616s_probe()  argument
471 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);  in bcm54616s_probe()
475 	phydev->priv = priv;  in bcm54616s_probe()
477 	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_MODE);  in bcm54616s_probe()
488 		val = bcm_phy_read_shadow(phydev, BCM54616S_SHD_100FX_CTRL);  in bcm54616s_probe()
500 		phydev->port = PORT_FIBRE;  in bcm54616s_probe()
506 static int bcm54616s_config_aneg(struct phy_device *phydev)  in bcm54616s_config_aneg()  argument
508 	struct bcm54616s_phy_priv *priv = phydev->priv;  in bcm54616s_config_aneg()
513 		ret = genphy_c37_config_aneg(phydev);  in bcm54616s_config_aneg()
515 		ret = genphy_config_aneg(phydev);  in bcm54616s_config_aneg()
518 	bcm54xx_config_clock_delay(phydev);  in bcm54616s_config_aneg()
523 static int bcm54616s_read_status(struct phy_device *phydev)  in bcm54616s_read_status()  argument
525 	struct bcm54616s_phy_priv *priv = phydev->priv;  in bcm54616s_read_status()
529 		err = genphy_c37_read_status(phydev);  in bcm54616s_read_status()
531 		err = genphy_read_status(phydev);  in bcm54616s_read_status()
536 static int brcm_phy_setbits(struct phy_device *phydev, int reg, int set)  in brcm_phy_setbits()  argument
540 	val = phy_read(phydev, reg);  in brcm_phy_setbits()
544 	return phy_write(phydev, reg, val | set);  in brcm_phy_setbits()
547 static int brcm_fet_config_init(struct phy_device *phydev)  in brcm_fet_config_init()  argument
552 	err = phy_write(phydev, MII_BMCR, BMCR_RESET);  in brcm_fet_config_init()
556 	reg = phy_read(phydev, MII_BRCM_FET_INTREG);  in brcm_fet_config_init()
567 	err = phy_write(phydev, MII_BRCM_FET_INTREG, reg);  in brcm_fet_config_init()
572 	brcmtest = phy_read(phydev, MII_BRCM_FET_BRCMTEST);  in brcm_fet_config_init()
578 	err = phy_write(phydev, MII_BRCM_FET_BRCMTEST, reg);  in brcm_fet_config_init()
583 	reg = phy_read(phydev, MII_BRCM_FET_SHDW_AUXMODE4);  in brcm_fet_config_init()
592 	err = phy_write(phydev, MII_BRCM_FET_SHDW_AUXMODE4, reg);  in brcm_fet_config_init()
597 	err = brcm_phy_setbits(phydev, MII_BRCM_FET_SHDW_MISCCTRL,  in brcm_fet_config_init()
602 	if (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE) {  in brcm_fet_config_init()
604 		err = brcm_phy_setbits(phydev, MII_BRCM_FET_SHDW_AUXSTAT2,  in brcm_fet_config_init()
610 	err2 = phy_write(phydev, MII_BRCM_FET_BRCMTEST, brcmtest);  in brcm_fet_config_init()
617 static int brcm_fet_ack_interrupt(struct phy_device *phydev)  in brcm_fet_ack_interrupt()  argument
622 	reg = phy_read(phydev, MII_BRCM_FET_INTREG);  in brcm_fet_ack_interrupt()
629 static int brcm_fet_config_intr(struct phy_device *phydev)  in brcm_fet_config_intr()  argument
633 	reg = phy_read(phydev, MII_BRCM_FET_INTREG);  in brcm_fet_config_intr()
637 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {  in brcm_fet_config_intr()
638 		err = brcm_fet_ack_interrupt(phydev);  in brcm_fet_config_intr()
643 		err = phy_write(phydev, MII_BRCM_FET_INTREG, reg);  in brcm_fet_config_intr()
646 		err = phy_write(phydev, MII_BRCM_FET_INTREG, reg);  in brcm_fet_config_intr()
650 		err = brcm_fet_ack_interrupt(phydev);  in brcm_fet_config_intr()
656 static irqreturn_t brcm_fet_handle_interrupt(struct phy_device *phydev)  in brcm_fet_handle_interrupt()  argument
660 	irq_status = phy_read(phydev, MII_BRCM_FET_INTREG);  in brcm_fet_handle_interrupt()
662 		phy_error(phydev);  in brcm_fet_handle_interrupt()
669 	phy_trigger_machine(phydev);  in brcm_fet_handle_interrupt()
678 static int bcm54xx_phy_probe(struct phy_device *phydev)  in bcm54xx_phy_probe()  argument
682 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);  in bcm54xx_phy_probe()
686 	phydev->priv = priv;  in bcm54xx_phy_probe()
688 	priv->stats = devm_kcalloc(&phydev->mdio.dev,  in bcm54xx_phy_probe()
689 				   bcm_phy_get_sset_count(phydev), sizeof(u64),  in bcm54xx_phy_probe()
697 static void bcm54xx_get_stats(struct phy_device *phydev,  in bcm54xx_get_stats()  argument
700 	struct bcm54xx_phy_priv *priv = phydev->priv;  in bcm54xx_get_stats()
702 	bcm_phy_get_stats(phydev, priv->stats, stats, data);  in bcm54xx_get_stats()