1 // SPDX-License-Identifier: GPL-2.0
48 #define MDIO_AN_TX_VEND_STATUS1_5000BASET	5
167 	int len_l = min(stat->size, 16);  in aqr107_get_stat()
168 	int len_h = stat->size - len_l;  in aqr107_get_stat()
172 	val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg);  in aqr107_get_stat()
176 	ret = val & GENMASK(len_l - 1, 0);  in aqr107_get_stat()
178 		val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1);  in aqr107_get_stat()
182 		ret += (val & GENMASK(len_h - 1, 0)) << 16;  in aqr107_get_stat()
191 	struct aqr107_priv *priv = phydev->priv;  in aqr107_get_stats()
201 			priv->sgmii_stats[i] += val;  in aqr107_get_stats()
203 		data[i] = priv->sgmii_stats[i];  in aqr107_get_stats()
213 	if (phydev->autoneg == AUTONEG_DISABLE)  in aqr_config_aneg()
227 			      phydev->advertising))  in aqr_config_aneg()
231 			      phydev->advertising))  in aqr_config_aneg()
247 	bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED;  in aqr_config_intr()
306 	if (phydev->autoneg == AUTONEG_ENABLE) {  in aqr_read_status()
312 				 phydev->lp_advertising,  in aqr_read_status()
315 				 phydev->lp_advertising,  in aqr_read_status()
332 		phydev->speed = SPEED_10;  in aqr107_read_rate()
335 		phydev->speed = SPEED_100;  in aqr107_read_rate()
338 		phydev->speed = SPEED_1000;  in aqr107_read_rate()
341 		phydev->speed = SPEED_2500;  in aqr107_read_rate()
344 		phydev->speed = SPEED_5000;  in aqr107_read_rate()
347 		phydev->speed = SPEED_10000;  in aqr107_read_rate()
350 		phydev->speed = SPEED_UNKNOWN;  in aqr107_read_rate()
355 		phydev->duplex = DUPLEX_FULL;  in aqr107_read_rate()
357 		phydev->duplex = DUPLEX_HALF;  in aqr107_read_rate()
370 	if (!phydev->link || phydev->autoneg == AUTONEG_DISABLE)  in aqr107_read_status()
379 		phydev->interface = PHY_INTERFACE_MODE_10GKR;  in aqr107_read_status()
382 		phydev->interface = PHY_INTERFACE_MODE_10GBASER;  in aqr107_read_status()
385 		phydev->interface = PHY_INTERFACE_MODE_USXGMII;  in aqr107_read_status()
388 		phydev->interface = PHY_INTERFACE_MODE_SGMII;  in aqr107_read_status()
391 		phydev->interface = PHY_INTERFACE_MODE_2500BASEX;  in aqr107_read_status()
394 		phydev->interface = PHY_INTERFACE_MODE_NA;  in aqr107_read_status()
423 		return -E2BIG;  in aqr107_set_downshift()
438 	switch (tuna->id) {  in aqr107_get_tunable()
442 		return -EOPNOTSUPP;  in aqr107_get_tunable()
449 	switch (tuna->id) {  in aqr107_set_tunable()
453 		return -EOPNOTSUPP;  in aqr107_set_tunable()
501 	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&  in aqr107_config_init()
502 	    phydev->interface != PHY_INTERFACE_MODE_2500BASEX &&  in aqr107_config_init()
503 	    phydev->interface != PHY_INTERFACE_MODE_XGMII &&  in aqr107_config_init()
504 	    phydev->interface != PHY_INTERFACE_MODE_USXGMII &&  in aqr107_config_init()
505 	    phydev->interface != PHY_INTERFACE_MODE_10GKR &&  in aqr107_config_init()
506 	    phydev->interface != PHY_INTERFACE_MODE_10GBASER)  in aqr107_config_init()
507 		return -ENODEV;  in aqr107_config_init()
509 	WARN(phydev->interface == PHY_INTERFACE_MODE_XGMII,  in aqr107_config_init()
510 …ut of date, please update it. The AQR107 family doesn't support XGMII, maybe you mean USXGMII.\n");  in aqr107_config_init()
524 	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&  in aqcs109_config_init()
525 	    phydev->interface != PHY_INTERFACE_MODE_2500BASEX)  in aqcs109_config_init()
526 		return -ENODEV;  in aqcs109_config_init()
532 	/* AQCS109 belongs to a chip family partially supporting 10G and 5G.  in aqcs109_config_init()
534 	 * AQCS109 however supports speeds up to 2.5G only.  in aqcs109_config_init()
549 	if (phydev->state != PHY_RUNNING || phydev->autoneg == AUTONEG_DISABLE)  in aqr107_link_change_notify()
576 		   downshift ? ", fast-retrain downshift advertised" : "",  in aqr107_link_change_notify()
585 		phydev_info(phydev, "Aquantia 1000Base-T2 mode active\n");  in aqr107_link_change_notify()
602 	phydev->priv = devm_kzalloc(&phydev->mdio.dev,  in aqr107_probe()
604 	if (!phydev->priv)  in aqr107_probe()
605 		return -ENOMEM;  in aqr107_probe()