134 	void __iomem *base_addr;  member
164 	reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET);  in xemaclite_enable_interrupts()
166 			 drvdata->base_addr + XEL_TSR_OFFSET);  in xemaclite_enable_interrupts()
169 	xemaclite_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET);  in xemaclite_enable_interrupts()
172 	xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);  in xemaclite_enable_interrupts()
187 	xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);  in xemaclite_disable_interrupts()
190 	reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET);  in xemaclite_disable_interrupts()
192 			 drvdata->base_addr + XEL_TSR_OFFSET);  in xemaclite_disable_interrupts()
195 	reg_data = xemaclite_readl(drvdata->base_addr + XEL_RSR_OFFSET);  in xemaclite_disable_interrupts()
197 			 drvdata->base_addr + XEL_RSR_OFFSET);  in xemaclite_disable_interrupts()
322 	addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;  in xemaclite_send_data()
387 	addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use);  in xemaclite_recv_data()
479 	addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;  in xemaclite_update_address()
659 	void __iomem *base_addr = lp->base_addr;  in xemaclite_interrupt()  local
663 	if ((xemaclite_readl(base_addr + XEL_RSR_OFFSET) &  in xemaclite_interrupt()
665 	    (xemaclite_readl(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)  in xemaclite_interrupt()
671 	tx_status = xemaclite_readl(base_addr + XEL_TSR_OFFSET);  in xemaclite_interrupt()
676 		xemaclite_writel(tx_status, base_addr + XEL_TSR_OFFSET);  in xemaclite_interrupt()
682 	tx_status = xemaclite_readl(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);  in xemaclite_interrupt()
687 		xemaclite_writel(tx_status, base_addr + XEL_BUFFER_OFFSET +  in xemaclite_interrupt()
722 				  lp->base_addr + XEL_MDIOCTRL_OFFSET,  in xemaclite_mdio_wait()
752 	ctrl_reg = xemaclite_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);  in xemaclite_mdio_read()
755 			 lp->base_addr + XEL_MDIOADDR_OFFSET);  in xemaclite_mdio_read()
757 			 lp->base_addr + XEL_MDIOCTRL_OFFSET);  in xemaclite_mdio_read()
762 	rc = xemaclite_readl(lp->base_addr + XEL_MDIORD_OFFSET);  in xemaclite_mdio_read()
801 	ctrl_reg = xemaclite_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);  in xemaclite_mdio_write()
804 			 lp->base_addr + XEL_MDIOADDR_OFFSET);  in xemaclite_mdio_write()
805 	xemaclite_writel(val, lp->base_addr + XEL_MDIOWR_OFFSET);  in xemaclite_mdio_write()
807 			 lp->base_addr + XEL_MDIOCTRL_OFFSET);  in xemaclite_mdio_write()
855 			 lp->base_addr + XEL_MDIOCTRL_OFFSET);  in xemaclite_mdio_setup()
1145 	lp->base_addr = devm_ioremap_resource(&ofdev->dev, res);  in xemaclite_of_probe()
1146 	if (IS_ERR(lp->base_addr)) {  in xemaclite_of_probe()
1147 		rc = PTR_ERR(lp->base_addr);  in xemaclite_of_probe()
1167 	xemaclite_writel(0, lp->base_addr + XEL_TSR_OFFSET);  in xemaclite_of_probe()
1168 	xemaclite_writel(0, lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);  in xemaclite_of_probe()
1193 		 (unsigned long __force)ndev->mem_start, lp->base_addr, ndev->irq);  in xemaclite_of_probe()