Lines Matching full:lp
123 * @lp: Pointer to axienet local structure
130 static inline u32 axienet_dma_in32(struct axienet_local *lp, off_t reg) in axienet_dma_in32() argument
132 return ioread32(lp->dma_regs + reg); in axienet_dma_in32()
137 * @lp: Pointer to axienet local structure
144 static inline void axienet_dma_out32(struct axienet_local *lp, in axienet_dma_out32() argument
147 iowrite32(value, lp->dma_regs + reg); in axienet_dma_out32()
150 static void axienet_dma_out_addr(struct axienet_local *lp, off_t reg, in axienet_dma_out_addr() argument
153 axienet_dma_out32(lp, reg, lower_32_bits(addr)); in axienet_dma_out_addr()
155 if (lp->features & XAE_FEATURE_DMA_64BIT) in axienet_dma_out_addr()
156 axienet_dma_out32(lp, reg + 4, upper_32_bits(addr)); in axienet_dma_out_addr()
159 static void desc_set_phys_addr(struct axienet_local *lp, dma_addr_t addr, in desc_set_phys_addr() argument
163 if (lp->features & XAE_FEATURE_DMA_64BIT) in desc_set_phys_addr()
167 static dma_addr_t desc_get_phys_addr(struct axienet_local *lp, in desc_get_phys_addr() argument
172 if (lp->features & XAE_FEATURE_DMA_64BIT) in desc_get_phys_addr()
189 struct axienet_local *lp = netdev_priv(ndev); in axienet_dma_bd_release() local
193 sizeof(*lp->tx_bd_v) * lp->tx_bd_num, in axienet_dma_bd_release()
194 lp->tx_bd_v, in axienet_dma_bd_release()
195 lp->tx_bd_p); in axienet_dma_bd_release()
197 if (!lp->rx_bd_v) in axienet_dma_bd_release()
200 for (i = 0; i < lp->rx_bd_num; i++) { in axienet_dma_bd_release()
206 if (!lp->rx_bd_v[i].skb) in axienet_dma_bd_release()
209 dev_kfree_skb(lp->rx_bd_v[i].skb); in axienet_dma_bd_release()
215 if (lp->rx_bd_v[i].cntrl) { in axienet_dma_bd_release()
216 phys = desc_get_phys_addr(lp, &lp->rx_bd_v[i]); in axienet_dma_bd_release()
218 lp->max_frm_size, DMA_FROM_DEVICE); in axienet_dma_bd_release()
223 sizeof(*lp->rx_bd_v) * lp->rx_bd_num, in axienet_dma_bd_release()
224 lp->rx_bd_v, in axienet_dma_bd_release()
225 lp->rx_bd_p); in axienet_dma_bd_release()
243 struct axienet_local *lp = netdev_priv(ndev); in axienet_dma_bd_init() local
246 lp->tx_bd_ci = 0; in axienet_dma_bd_init()
247 lp->tx_bd_tail = 0; in axienet_dma_bd_init()
248 lp->rx_bd_ci = 0; in axienet_dma_bd_init()
251 lp->tx_bd_v = dma_alloc_coherent(ndev->dev.parent, in axienet_dma_bd_init()
252 sizeof(*lp->tx_bd_v) * lp->tx_bd_num, in axienet_dma_bd_init()
253 &lp->tx_bd_p, GFP_KERNEL); in axienet_dma_bd_init()
254 if (!lp->tx_bd_v) in axienet_dma_bd_init()
257 lp->rx_bd_v = dma_alloc_coherent(ndev->dev.parent, in axienet_dma_bd_init()
258 sizeof(*lp->rx_bd_v) * lp->rx_bd_num, in axienet_dma_bd_init()
259 &lp->rx_bd_p, GFP_KERNEL); in axienet_dma_bd_init()
260 if (!lp->rx_bd_v) in axienet_dma_bd_init()
263 for (i = 0; i < lp->tx_bd_num; i++) { in axienet_dma_bd_init()
264 dma_addr_t addr = lp->tx_bd_p + in axienet_dma_bd_init()
265 sizeof(*lp->tx_bd_v) * in axienet_dma_bd_init()
266 ((i + 1) % lp->tx_bd_num); in axienet_dma_bd_init()
268 lp->tx_bd_v[i].next = lower_32_bits(addr); in axienet_dma_bd_init()
269 if (lp->features & XAE_FEATURE_DMA_64BIT) in axienet_dma_bd_init()
270 lp->tx_bd_v[i].next_msb = upper_32_bits(addr); in axienet_dma_bd_init()
273 for (i = 0; i < lp->rx_bd_num; i++) { in axienet_dma_bd_init()
276 addr = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * in axienet_dma_bd_init()
277 ((i + 1) % lp->rx_bd_num); in axienet_dma_bd_init()
278 lp->rx_bd_v[i].next = lower_32_bits(addr); in axienet_dma_bd_init()
279 if (lp->features & XAE_FEATURE_DMA_64BIT) in axienet_dma_bd_init()
280 lp->rx_bd_v[i].next_msb = upper_32_bits(addr); in axienet_dma_bd_init()
282 skb = netdev_alloc_skb_ip_align(ndev, lp->max_frm_size); in axienet_dma_bd_init()
286 lp->rx_bd_v[i].skb = skb; in axienet_dma_bd_init()
288 lp->max_frm_size, DMA_FROM_DEVICE); in axienet_dma_bd_init()
293 desc_set_phys_addr(lp, addr, &lp->rx_bd_v[i]); in axienet_dma_bd_init()
295 lp->rx_bd_v[i].cntrl = lp->max_frm_size; in axienet_dma_bd_init()
299 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_dma_bd_init()
302 ((lp->coalesce_count_rx) << XAXIDMA_COALESCE_SHIFT)); in axienet_dma_bd_init()
309 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_dma_bd_init()
312 cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET); in axienet_dma_bd_init()
315 ((lp->coalesce_count_tx) << XAXIDMA_COALESCE_SHIFT)); in axienet_dma_bd_init()
322 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr); in axienet_dma_bd_init()
327 axienet_dma_out_addr(lp, XAXIDMA_RX_CDESC_OFFSET, lp->rx_bd_p); in axienet_dma_bd_init()
328 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_dma_bd_init()
329 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, in axienet_dma_bd_init()
331 axienet_dma_out_addr(lp, XAXIDMA_RX_TDESC_OFFSET, lp->rx_bd_p + in axienet_dma_bd_init()
332 (sizeof(*lp->rx_bd_v) * (lp->rx_bd_num - 1))); in axienet_dma_bd_init()
338 axienet_dma_out_addr(lp, XAXIDMA_TX_CDESC_OFFSET, lp->tx_bd_p); in axienet_dma_bd_init()
339 cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET); in axienet_dma_bd_init()
340 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, in axienet_dma_bd_init()
360 struct axienet_local *lp = netdev_priv(ndev); in axienet_set_mac_address() local
368 axienet_iow(lp, XAE_UAW0_OFFSET, in axienet_set_mac_address()
373 axienet_iow(lp, XAE_UAW1_OFFSET, in axienet_set_mac_address()
374 (((axienet_ior(lp, XAE_UAW1_OFFSET)) & in axienet_set_mac_address()
413 struct axienet_local *lp = netdev_priv(ndev); in axienet_set_multicast_list() local
422 reg = axienet_ior(lp, XAE_FMI_OFFSET); in axienet_set_multicast_list()
424 axienet_iow(lp, XAE_FMI_OFFSET, reg); in axienet_set_multicast_list()
442 reg = axienet_ior(lp, XAE_FMI_OFFSET) & 0xFFFFFF00; in axienet_set_multicast_list()
445 axienet_iow(lp, XAE_FMI_OFFSET, reg); in axienet_set_multicast_list()
446 axienet_iow(lp, XAE_AF0_OFFSET, af0reg); in axienet_set_multicast_list()
447 axienet_iow(lp, XAE_AF1_OFFSET, af1reg); in axienet_set_multicast_list()
451 reg = axienet_ior(lp, XAE_FMI_OFFSET); in axienet_set_multicast_list()
454 axienet_iow(lp, XAE_FMI_OFFSET, reg); in axienet_set_multicast_list()
457 reg = axienet_ior(lp, XAE_FMI_OFFSET) & 0xFFFFFF00; in axienet_set_multicast_list()
460 axienet_iow(lp, XAE_FMI_OFFSET, reg); in axienet_set_multicast_list()
461 axienet_iow(lp, XAE_AF0_OFFSET, 0); in axienet_set_multicast_list()
462 axienet_iow(lp, XAE_AF1_OFFSET, 0); in axienet_set_multicast_list()
483 struct axienet_local *lp = netdev_priv(ndev); in axienet_setoptions() local
487 reg = ((axienet_ior(lp, tp->reg)) & ~(tp->m_or)); in axienet_setoptions()
490 axienet_iow(lp, tp->reg, reg); in axienet_setoptions()
494 lp->options |= options; in axienet_setoptions()
497 static int __axienet_device_reset(struct axienet_local *lp) in __axienet_device_reset() argument
508 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, XAXIDMA_CR_RESET_MASK); in __axienet_device_reset()
510 while (axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET) & in __axienet_device_reset()
514 netdev_err(lp->ndev, "%s: DMA reset timeout!\n", in __axienet_device_reset()
538 struct axienet_local *lp = netdev_priv(ndev); in axienet_device_reset() local
541 ret = __axienet_device_reset(lp); in axienet_device_reset()
545 lp->max_frm_size = XAE_MAX_VLAN_FRAME_SIZE; in axienet_device_reset()
546 lp->options |= XAE_OPTION_VLAN; in axienet_device_reset()
547 lp->options &= (~XAE_OPTION_JUMBO); in axienet_device_reset()
551 lp->max_frm_size = ndev->mtu + VLAN_ETH_HLEN + in axienet_device_reset()
554 if (lp->max_frm_size <= lp->rxmem) in axienet_device_reset()
555 lp->options |= XAE_OPTION_JUMBO; in axienet_device_reset()
565 axienet_status = axienet_ior(lp, XAE_RCW1_OFFSET); in axienet_device_reset()
567 axienet_iow(lp, XAE_RCW1_OFFSET, axienet_status); in axienet_device_reset()
569 axienet_status = axienet_ior(lp, XAE_IP_OFFSET); in axienet_device_reset()
571 axienet_iow(lp, XAE_IS_OFFSET, XAE_INT_RXRJECT_MASK); in axienet_device_reset()
572 axienet_iow(lp, XAE_IE_OFFSET, lp->eth_irq > 0 ? in axienet_device_reset()
575 axienet_iow(lp, XAE_FCC_OFFSET, XAE_FCC_FCRX_MASK); in axienet_device_reset()
580 axienet_setoptions(ndev, lp->options & in axienet_device_reset()
584 axienet_setoptions(ndev, lp->options); in axienet_device_reset()
606 struct axienet_local *lp = netdev_priv(ndev); in axienet_free_tx_chain() local
614 max_bds = lp->tx_bd_num; in axienet_free_tx_chain()
617 cur_p = &lp->tx_bd_v[(first_bd + i) % lp->tx_bd_num]; in axienet_free_tx_chain()
626 phys = desc_get_phys_addr(lp, cur_p); in axienet_free_tx_chain()
662 struct axienet_local *lp = netdev_priv(ndev); in axienet_start_xmit_done() local
666 packets = axienet_free_tx_chain(ndev, lp->tx_bd_ci, -1, &size); in axienet_start_xmit_done()
668 lp->tx_bd_ci += packets; in axienet_start_xmit_done()
669 if (lp->tx_bd_ci >= lp->tx_bd_num) in axienet_start_xmit_done()
670 lp->tx_bd_ci -= lp->tx_bd_num; in axienet_start_xmit_done()
683 * @lp: Pointer to the axienet_local structure
694 static inline int axienet_check_tx_bd_space(struct axienet_local *lp, in axienet_check_tx_bd_space() argument
698 cur_p = &lp->tx_bd_v[(lp->tx_bd_tail + num_frag) % lp->tx_bd_num]; in axienet_check_tx_bd_space()
726 struct axienet_local *lp = netdev_priv(ndev); in axienet_start_xmit() local
728 u32 orig_tail_ptr = lp->tx_bd_tail; in axienet_start_xmit()
731 cur_p = &lp->tx_bd_v[lp->tx_bd_tail]; in axienet_start_xmit()
733 if (axienet_check_tx_bd_space(lp, num_frag)) { in axienet_start_xmit()
743 if (axienet_check_tx_bd_space(lp, num_frag)) in axienet_start_xmit()
750 if (lp->features & XAE_FEATURE_FULL_TX_CSUM) { in axienet_start_xmit()
753 } else if (lp->features & XAE_FEATURE_PARTIAL_RX_CSUM) { in axienet_start_xmit()
772 desc_set_phys_addr(lp, phys, cur_p); in axienet_start_xmit()
776 if (++lp->tx_bd_tail >= lp->tx_bd_num) in axienet_start_xmit()
777 lp->tx_bd_tail = 0; in axienet_start_xmit()
778 cur_p = &lp->tx_bd_v[lp->tx_bd_tail]; in axienet_start_xmit()
790 lp->tx_bd_tail = orig_tail_ptr; in axienet_start_xmit()
794 desc_set_phys_addr(lp, phys, cur_p); in axienet_start_xmit()
801 tail_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * lp->tx_bd_tail; in axienet_start_xmit()
803 axienet_dma_out_addr(lp, XAXIDMA_TX_TDESC_OFFSET, tail_p); in axienet_start_xmit()
804 if (++lp->tx_bd_tail >= lp->tx_bd_num) in axienet_start_xmit()
805 lp->tx_bd_tail = 0; in axienet_start_xmit()
826 struct axienet_local *lp = netdev_priv(ndev); in axienet_recv() local
830 cur_p = &lp->rx_bd_v[lp->rx_bd_ci]; in axienet_recv()
835 tail_p = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * lp->rx_bd_ci; in axienet_recv()
837 phys = desc_get_phys_addr(lp, cur_p); in axienet_recv()
838 dma_unmap_single(ndev->dev.parent, phys, lp->max_frm_size, in axienet_recv()
851 if (lp->features & XAE_FEATURE_FULL_RX_CSUM) { in axienet_recv()
858 } else if ((lp->features & XAE_FEATURE_PARTIAL_RX_CSUM) != 0 && in axienet_recv()
870 new_skb = netdev_alloc_skb_ip_align(ndev, lp->max_frm_size); in axienet_recv()
875 lp->max_frm_size, in axienet_recv()
883 desc_set_phys_addr(lp, phys, cur_p); in axienet_recv()
885 cur_p->cntrl = lp->max_frm_size; in axienet_recv()
889 if (++lp->rx_bd_ci >= lp->rx_bd_num) in axienet_recv()
890 lp->rx_bd_ci = 0; in axienet_recv()
891 cur_p = &lp->rx_bd_v[lp->rx_bd_ci]; in axienet_recv()
898 axienet_dma_out_addr(lp, XAXIDMA_RX_TDESC_OFFSET, tail_p); in axienet_recv()
916 struct axienet_local *lp = netdev_priv(ndev); in axienet_tx_irq() local
918 status = axienet_dma_in32(lp, XAXIDMA_TX_SR_OFFSET); in axienet_tx_irq()
920 axienet_dma_out32(lp, XAXIDMA_TX_SR_OFFSET, status); in axienet_tx_irq()
921 axienet_start_xmit_done(lp->ndev); in axienet_tx_irq()
929 (lp->tx_bd_v[lp->tx_bd_ci]).phys_msb, in axienet_tx_irq()
930 (lp->tx_bd_v[lp->tx_bd_ci]).phys); in axienet_tx_irq()
932 cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET); in axienet_tx_irq()
936 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr); in axienet_tx_irq()
938 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_tx_irq()
942 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_tx_irq()
944 schedule_work(&lp->dma_err_task); in axienet_tx_irq()
945 axienet_dma_out32(lp, XAXIDMA_TX_SR_OFFSET, status); in axienet_tx_irq()
966 struct axienet_local *lp = netdev_priv(ndev); in axienet_rx_irq() local
968 status = axienet_dma_in32(lp, XAXIDMA_RX_SR_OFFSET); in axienet_rx_irq()
970 axienet_dma_out32(lp, XAXIDMA_RX_SR_OFFSET, status); in axienet_rx_irq()
971 axienet_recv(lp->ndev); in axienet_rx_irq()
979 (lp->rx_bd_v[lp->rx_bd_ci]).phys_msb, in axienet_rx_irq()
980 (lp->rx_bd_v[lp->rx_bd_ci]).phys); in axienet_rx_irq()
982 cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET); in axienet_rx_irq()
986 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr); in axienet_rx_irq()
988 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_rx_irq()
992 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_rx_irq()
994 schedule_work(&lp->dma_err_task); in axienet_rx_irq()
995 axienet_dma_out32(lp, XAXIDMA_RX_SR_OFFSET, status); in axienet_rx_irq()
1013 struct axienet_local *lp = netdev_priv(ndev); in axienet_eth_irq() local
1016 pending = axienet_ior(lp, XAE_IP_OFFSET); in axienet_eth_irq()
1026 axienet_iow(lp, XAE_IS_OFFSET, pending); in axienet_eth_irq()
1048 struct axienet_local *lp = netdev_priv(ndev); in axienet_open() local
1056 axienet_lock_mii(lp); in axienet_open()
1058 axienet_unlock_mii(lp); in axienet_open()
1060 ret = phylink_of_phy_connect(lp->phylink, lp->dev->of_node, 0); in axienet_open()
1062 dev_err(lp->dev, "phylink_of_phy_connect() failed: %d\n", ret); in axienet_open()
1066 phylink_start(lp->phylink); in axienet_open()
1069 INIT_WORK(&lp->dma_err_task, axienet_dma_err_handler); in axienet_open()
1072 ret = request_irq(lp->tx_irq, axienet_tx_irq, IRQF_SHARED, in axienet_open()
1077 ret = request_irq(lp->rx_irq, axienet_rx_irq, IRQF_SHARED, in axienet_open()
1082 if (lp->eth_irq > 0) { in axienet_open()
1083 ret = request_irq(lp->eth_irq, axienet_eth_irq, IRQF_SHARED, in axienet_open()
1092 free_irq(lp->rx_irq, ndev); in axienet_open()
1094 free_irq(lp->tx_irq, ndev); in axienet_open()
1096 phylink_stop(lp->phylink); in axienet_open()
1097 phylink_disconnect_phy(lp->phylink); in axienet_open()
1098 cancel_work_sync(&lp->dma_err_task); in axienet_open()
1099 dev_err(lp->dev, "request_irq() failed\n"); in axienet_open()
1117 struct axienet_local *lp = netdev_priv(ndev); in axienet_stop() local
1121 phylink_stop(lp->phylink); in axienet_stop()
1122 phylink_disconnect_phy(lp->phylink); in axienet_stop()
1124 axienet_setoptions(ndev, lp->options & in axienet_stop()
1127 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_stop()
1129 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_stop()
1131 cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET); in axienet_stop()
1133 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr); in axienet_stop()
1135 axienet_iow(lp, XAE_IE_OFFSET, 0); in axienet_stop()
1138 sr = axienet_dma_in32(lp, XAXIDMA_RX_SR_OFFSET); in axienet_stop()
1141 sr = axienet_dma_in32(lp, XAXIDMA_RX_SR_OFFSET); in axienet_stop()
1144 sr = axienet_dma_in32(lp, XAXIDMA_TX_SR_OFFSET); in axienet_stop()
1147 sr = axienet_dma_in32(lp, XAXIDMA_TX_SR_OFFSET); in axienet_stop()
1151 axienet_lock_mii(lp); in axienet_stop()
1152 __axienet_device_reset(lp); in axienet_stop()
1153 axienet_unlock_mii(lp); in axienet_stop()
1155 cancel_work_sync(&lp->dma_err_task); in axienet_stop()
1157 if (lp->eth_irq > 0) in axienet_stop()
1158 free_irq(lp->eth_irq, ndev); in axienet_stop()
1159 free_irq(lp->tx_irq, ndev); in axienet_stop()
1160 free_irq(lp->rx_irq, ndev); in axienet_stop()
1179 struct axienet_local *lp = netdev_priv(ndev); in axienet_change_mtu() local
1185 XAE_TRL_SIZE) > lp->rxmem) in axienet_change_mtu()
1203 struct axienet_local *lp = netdev_priv(ndev); in axienet_poll_controller() local
1204 disable_irq(lp->tx_irq); in axienet_poll_controller()
1205 disable_irq(lp->rx_irq); in axienet_poll_controller()
1206 axienet_rx_irq(lp->tx_irq, ndev); in axienet_poll_controller()
1207 axienet_tx_irq(lp->rx_irq, ndev); in axienet_poll_controller()
1208 enable_irq(lp->tx_irq); in axienet_poll_controller()
1209 enable_irq(lp->rx_irq); in axienet_poll_controller()
1215 struct axienet_local *lp = netdev_priv(dev); in axienet_ioctl() local
1220 return phylink_mii_ioctl(lp->phylink, rq, cmd); in axienet_ioctl()
1282 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_get_regs() local
1288 data[0] = axienet_ior(lp, XAE_RAF_OFFSET); in axienet_ethtools_get_regs()
1289 data[1] = axienet_ior(lp, XAE_TPF_OFFSET); in axienet_ethtools_get_regs()
1290 data[2] = axienet_ior(lp, XAE_IFGP_OFFSET); in axienet_ethtools_get_regs()
1291 data[3] = axienet_ior(lp, XAE_IS_OFFSET); in axienet_ethtools_get_regs()
1292 data[4] = axienet_ior(lp, XAE_IP_OFFSET); in axienet_ethtools_get_regs()
1293 data[5] = axienet_ior(lp, XAE_IE_OFFSET); in axienet_ethtools_get_regs()
1294 data[6] = axienet_ior(lp, XAE_TTAG_OFFSET); in axienet_ethtools_get_regs()
1295 data[7] = axienet_ior(lp, XAE_RTAG_OFFSET); in axienet_ethtools_get_regs()
1296 data[8] = axienet_ior(lp, XAE_UAWL_OFFSET); in axienet_ethtools_get_regs()
1297 data[9] = axienet_ior(lp, XAE_UAWU_OFFSET); in axienet_ethtools_get_regs()
1298 data[10] = axienet_ior(lp, XAE_TPID0_OFFSET); in axienet_ethtools_get_regs()
1299 data[11] = axienet_ior(lp, XAE_TPID1_OFFSET); in axienet_ethtools_get_regs()
1300 data[12] = axienet_ior(lp, XAE_PPST_OFFSET); in axienet_ethtools_get_regs()
1301 data[13] = axienet_ior(lp, XAE_RCW0_OFFSET); in axienet_ethtools_get_regs()
1302 data[14] = axienet_ior(lp, XAE_RCW1_OFFSET); in axienet_ethtools_get_regs()
1303 data[15] = axienet_ior(lp, XAE_TC_OFFSET); in axienet_ethtools_get_regs()
1304 data[16] = axienet_ior(lp, XAE_FCC_OFFSET); in axienet_ethtools_get_regs()
1305 data[17] = axienet_ior(lp, XAE_EMMC_OFFSET); in axienet_ethtools_get_regs()
1306 data[18] = axienet_ior(lp, XAE_PHYC_OFFSET); in axienet_ethtools_get_regs()
1307 data[19] = axienet_ior(lp, XAE_MDIO_MC_OFFSET); in axienet_ethtools_get_regs()
1308 data[20] = axienet_ior(lp, XAE_MDIO_MCR_OFFSET); in axienet_ethtools_get_regs()
1309 data[21] = axienet_ior(lp, XAE_MDIO_MWD_OFFSET); in axienet_ethtools_get_regs()
1310 data[22] = axienet_ior(lp, XAE_MDIO_MRD_OFFSET); in axienet_ethtools_get_regs()
1311 data[27] = axienet_ior(lp, XAE_UAW0_OFFSET); in axienet_ethtools_get_regs()
1312 data[28] = axienet_ior(lp, XAE_UAW1_OFFSET); in axienet_ethtools_get_regs()
1313 data[29] = axienet_ior(lp, XAE_FMI_OFFSET); in axienet_ethtools_get_regs()
1314 data[30] = axienet_ior(lp, XAE_AF0_OFFSET); in axienet_ethtools_get_regs()
1315 data[31] = axienet_ior(lp, XAE_AF1_OFFSET); in axienet_ethtools_get_regs()
1316 data[32] = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET); in axienet_ethtools_get_regs()
1317 data[33] = axienet_dma_in32(lp, XAXIDMA_TX_SR_OFFSET); in axienet_ethtools_get_regs()
1318 data[34] = axienet_dma_in32(lp, XAXIDMA_TX_CDESC_OFFSET); in axienet_ethtools_get_regs()
1319 data[35] = axienet_dma_in32(lp, XAXIDMA_TX_TDESC_OFFSET); in axienet_ethtools_get_regs()
1320 data[36] = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_ethtools_get_regs()
1321 data[37] = axienet_dma_in32(lp, XAXIDMA_RX_SR_OFFSET); in axienet_ethtools_get_regs()
1322 data[38] = axienet_dma_in32(lp, XAXIDMA_RX_CDESC_OFFSET); in axienet_ethtools_get_regs()
1323 data[39] = axienet_dma_in32(lp, XAXIDMA_RX_TDESC_OFFSET); in axienet_ethtools_get_regs()
1329 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_get_ringparam() local
1335 ering->rx_pending = lp->rx_bd_num; in axienet_ethtools_get_ringparam()
1338 ering->tx_pending = lp->tx_bd_num; in axienet_ethtools_get_ringparam()
1344 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_set_ringparam() local
1355 lp->rx_bd_num = ering->rx_pending; in axienet_ethtools_set_ringparam()
1356 lp->tx_bd_num = ering->tx_pending; in axienet_ethtools_set_ringparam()
1373 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_get_pauseparam() local
1375 phylink_ethtool_get_pauseparam(lp->phylink, epauseparm); in axienet_ethtools_get_pauseparam()
1394 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_set_pauseparam() local
1396 return phylink_ethtool_set_pauseparam(lp->phylink, epauseparm); in axienet_ethtools_set_pauseparam()
1419 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_get_coalesce() local
1420 regval = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_ethtools_get_coalesce()
1423 regval = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET); in axienet_ethtools_get_coalesce()
1448 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_set_coalesce() local
1457 lp->coalesce_count_rx = ecoalesce->rx_max_coalesced_frames; in axienet_ethtools_set_coalesce()
1459 lp->coalesce_count_tx = ecoalesce->tx_max_coalesced_frames; in axienet_ethtools_set_coalesce()
1468 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_get_link_ksettings() local
1470 return phylink_ethtool_ksettings_get(lp->phylink, cmd); in axienet_ethtools_get_link_ksettings()
1477 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_set_link_ksettings() local
1479 return phylink_ethtool_ksettings_set(lp->phylink, cmd); in axienet_ethtools_set_link_ksettings()
1484 struct axienet_local *lp = netdev_priv(dev); in axienet_ethtools_nway_reset() local
1486 return phylink_ethtool_nway_reset(lp->phylink); in axienet_ethtools_nway_reset()
1511 struct axienet_local *lp = netdev_priv(ndev); in axienet_validate() local
1520 if (lp->switch_x_sgmii) in axienet_validate()
1524 if (state->interface != lp->phy_mode) { in axienet_validate()
1527 phy_modes(lp->phy_mode)); in axienet_validate()
1571 struct axienet_local *lp = netdev_priv(ndev); in axienet_mac_pcs_get_state() local
1576 phylink_mii_c22_pcs_get_state(lp->pcs_phy, state); in axienet_mac_pcs_get_state()
1586 struct axienet_local *lp = netdev_priv(ndev); in axienet_mac_an_restart() local
1588 phylink_mii_c22_pcs_an_restart(lp->pcs_phy); in axienet_mac_an_restart()
1595 struct axienet_local *lp = netdev_priv(ndev); in axienet_mac_prepare() local
1601 if (!lp->switch_x_sgmii) in axienet_mac_prepare()
1604 ret = mdiobus_write(lp->pcs_phy->bus, in axienet_mac_prepare()
1605 lp->pcs_phy->addr, in axienet_mac_prepare()
1622 struct axienet_local *lp = netdev_priv(ndev); in axienet_mac_config() local
1628 ret = phylink_mii_c22_pcs_config(lp->pcs_phy, mode, in axienet_mac_config()
1655 struct axienet_local *lp = netdev_priv(ndev); in axienet_mac_link_up() local
1658 emmc_reg = axienet_ior(lp, XAE_EMMC_OFFSET); in axienet_mac_link_up()
1677 axienet_iow(lp, XAE_EMMC_OFFSET, emmc_reg); in axienet_mac_link_up()
1679 fcc_reg = axienet_ior(lp, XAE_FCC_OFFSET); in axienet_mac_link_up()
1688 axienet_iow(lp, XAE_FCC_OFFSET, fcc_reg); in axienet_mac_link_up()
1712 struct axienet_local *lp = container_of(work, struct axienet_local, in axienet_dma_err_handler() local
1714 struct net_device *ndev = lp->ndev; in axienet_dma_err_handler()
1717 axienet_setoptions(ndev, lp->options & in axienet_dma_err_handler()
1723 axienet_lock_mii(lp); in axienet_dma_err_handler()
1724 __axienet_device_reset(lp); in axienet_dma_err_handler()
1725 axienet_unlock_mii(lp); in axienet_dma_err_handler()
1727 for (i = 0; i < lp->tx_bd_num; i++) { in axienet_dma_err_handler()
1728 cur_p = &lp->tx_bd_v[i]; in axienet_dma_err_handler()
1730 dma_addr_t addr = desc_get_phys_addr(lp, cur_p); in axienet_dma_err_handler()
1751 for (i = 0; i < lp->rx_bd_num; i++) { in axienet_dma_err_handler()
1752 cur_p = &lp->rx_bd_v[i]; in axienet_dma_err_handler()
1761 lp->tx_bd_ci = 0; in axienet_dma_err_handler()
1762 lp->tx_bd_tail = 0; in axienet_dma_err_handler()
1763 lp->rx_bd_ci = 0; in axienet_dma_err_handler()
1766 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_dma_err_handler()
1776 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_dma_err_handler()
1779 cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET); in axienet_dma_err_handler()
1789 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr); in axienet_dma_err_handler()
1794 axienet_dma_out_addr(lp, XAXIDMA_RX_CDESC_OFFSET, lp->rx_bd_p); in axienet_dma_err_handler()
1795 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_dma_err_handler()
1796 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, in axienet_dma_err_handler()
1798 axienet_dma_out_addr(lp, XAXIDMA_RX_TDESC_OFFSET, lp->rx_bd_p + in axienet_dma_err_handler()
1799 (sizeof(*lp->rx_bd_v) * (lp->rx_bd_num - 1))); in axienet_dma_err_handler()
1805 axienet_dma_out_addr(lp, XAXIDMA_TX_CDESC_OFFSET, lp->tx_bd_p); in axienet_dma_err_handler()
1806 cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET); in axienet_dma_err_handler()
1807 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, in axienet_dma_err_handler()
1810 axienet_status = axienet_ior(lp, XAE_RCW1_OFFSET); in axienet_dma_err_handler()
1812 axienet_iow(lp, XAE_RCW1_OFFSET, axienet_status); in axienet_dma_err_handler()
1814 axienet_status = axienet_ior(lp, XAE_IP_OFFSET); in axienet_dma_err_handler()
1816 axienet_iow(lp, XAE_IS_OFFSET, XAE_INT_RXRJECT_MASK); in axienet_dma_err_handler()
1817 axienet_iow(lp, XAE_IE_OFFSET, lp->eth_irq > 0 ? in axienet_dma_err_handler()
1819 axienet_iow(lp, XAE_FCC_OFFSET, XAE_FCC_FCRX_MASK); in axienet_dma_err_handler()
1824 axienet_setoptions(ndev, lp->options & in axienet_dma_err_handler()
1828 axienet_setoptions(ndev, lp->options); in axienet_dma_err_handler()
1847 struct axienet_local *lp; in axienet_probe() local
1854 ndev = alloc_etherdev(sizeof(*lp)); in axienet_probe()
1870 lp = netdev_priv(ndev); in axienet_probe()
1871 lp->ndev = ndev; in axienet_probe()
1872 lp->dev = &pdev->dev; in axienet_probe()
1873 lp->options = XAE_OPTION_DEFAULTS; in axienet_probe()
1874 lp->rx_bd_num = RX_BD_NUM_DEFAULT; in axienet_probe()
1875 lp->tx_bd_num = TX_BD_NUM_DEFAULT; in axienet_probe()
1877 lp->axi_clk = devm_clk_get_optional(&pdev->dev, "s_axi_lite_clk"); in axienet_probe()
1878 if (!lp->axi_clk) { in axienet_probe()
1882 lp->axi_clk = devm_clk_get_optional(&pdev->dev, NULL); in axienet_probe()
1884 if (IS_ERR(lp->axi_clk)) { in axienet_probe()
1885 ret = PTR_ERR(lp->axi_clk); in axienet_probe()
1888 ret = clk_prepare_enable(lp->axi_clk); in axienet_probe()
1894 lp->misc_clks[0].id = "axis_clk"; in axienet_probe()
1895 lp->misc_clks[1].id = "ref_clk"; in axienet_probe()
1896 lp->misc_clks[2].id = "mgt_clk"; in axienet_probe()
1898 ret = devm_clk_bulk_get_optional(&pdev->dev, XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_probe()
1902 ret = clk_bulk_prepare_enable(XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_probe()
1907 lp->regs = devm_platform_get_and_ioremap_resource(pdev, 0, ðres); in axienet_probe()
1908 if (IS_ERR(lp->regs)) { in axienet_probe()
1909 ret = PTR_ERR(lp->regs); in axienet_probe()
1912 lp->regs_start = ethres->start; in axienet_probe()
1915 lp->features = 0; in axienet_probe()
1921 lp->csum_offload_on_tx_path = in axienet_probe()
1923 lp->features |= XAE_FEATURE_PARTIAL_TX_CSUM; in axienet_probe()
1928 lp->csum_offload_on_tx_path = in axienet_probe()
1930 lp->features |= XAE_FEATURE_FULL_TX_CSUM; in axienet_probe()
1935 lp->csum_offload_on_tx_path = XAE_NO_CSUM_OFFLOAD; in axienet_probe()
1942 lp->csum_offload_on_rx_path = in axienet_probe()
1944 lp->features |= XAE_FEATURE_PARTIAL_RX_CSUM; in axienet_probe()
1947 lp->csum_offload_on_rx_path = in axienet_probe()
1949 lp->features |= XAE_FEATURE_FULL_RX_CSUM; in axienet_probe()
1952 lp->csum_offload_on_rx_path = XAE_NO_CSUM_OFFLOAD; in axienet_probe()
1961 of_property_read_u32(pdev->dev.of_node, "xlnx,rxmem", &lp->rxmem); in axienet_probe()
1963 lp->switch_x_sgmii = of_property_read_bool(pdev->dev.of_node, in axienet_probe()
1972 lp->phy_mode = PHY_INTERFACE_MODE_MII; in axienet_probe()
1975 lp->phy_mode = PHY_INTERFACE_MODE_GMII; in axienet_probe()
1978 lp->phy_mode = PHY_INTERFACE_MODE_RGMII_ID; in axienet_probe()
1981 lp->phy_mode = PHY_INTERFACE_MODE_SGMII; in axienet_probe()
1984 lp->phy_mode = PHY_INTERFACE_MODE_1000BASEX; in axienet_probe()
1991 ret = of_get_phy_mode(pdev->dev.of_node, &lp->phy_mode); in axienet_probe()
1995 if (lp->switch_x_sgmii && lp->phy_mode != PHY_INTERFACE_MODE_SGMII && in axienet_probe()
1996 lp->phy_mode != PHY_INTERFACE_MODE_1000BASEX) { in axienet_probe()
2014 lp->dma_regs = devm_ioremap_resource(&pdev->dev, in axienet_probe()
2016 lp->rx_irq = irq_of_parse_and_map(np, 1); in axienet_probe()
2017 lp->tx_irq = irq_of_parse_and_map(np, 0); in axienet_probe()
2019 lp->eth_irq = platform_get_irq_optional(pdev, 0); in axienet_probe()
2022 lp->dma_regs = devm_platform_get_and_ioremap_resource(pdev, 1, NULL); in axienet_probe()
2023 lp->rx_irq = platform_get_irq(pdev, 1); in axienet_probe()
2024 lp->tx_irq = platform_get_irq(pdev, 0); in axienet_probe()
2025 lp->eth_irq = platform_get_irq_optional(pdev, 2); in axienet_probe()
2027 if (IS_ERR(lp->dma_regs)) { in axienet_probe()
2029 ret = PTR_ERR(lp->dma_regs); in axienet_probe()
2032 if ((lp->rx_irq <= 0) || (lp->tx_irq <= 0)) { in axienet_probe()
2046 if ((axienet_ior(lp, XAE_ID_OFFSET) >> 24) >= 0x9) { in axienet_probe()
2047 void __iomem *desc = lp->dma_regs + XAXIDMA_TX_CDESC_OFFSET + 4; in axienet_probe()
2053 lp->features |= XAE_FEATURE_DMA_64BIT; in axienet_probe()
2069 if (lp->eth_irq <= 0) in axienet_probe()
2082 lp->coalesce_count_rx = XAXIDMA_DFT_RX_THRESHOLD; in axienet_probe()
2083 lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD; in axienet_probe()
2085 lp->phy_node = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0); in axienet_probe()
2086 if (lp->phy_node) { in axienet_probe()
2087 ret = axienet_mdio_setup(lp); in axienet_probe()
2092 if (lp->phy_mode == PHY_INTERFACE_MODE_SGMII || in axienet_probe()
2093 lp->phy_mode == PHY_INTERFACE_MODE_1000BASEX) { in axienet_probe()
2094 if (!lp->phy_node) { in axienet_probe()
2099 lp->pcs_phy = of_mdio_find_device(lp->phy_node); in axienet_probe()
2100 if (!lp->pcs_phy) { in axienet_probe()
2104 lp->phylink_config.pcs_poll = true; in axienet_probe()
2107 lp->phylink_config.dev = &ndev->dev; in axienet_probe()
2108 lp->phylink_config.type = PHYLINK_NETDEV; in axienet_probe()
2110 lp->phylink = phylink_create(&lp->phylink_config, pdev->dev.fwnode, in axienet_probe()
2111 lp->phy_mode, in axienet_probe()
2113 if (IS_ERR(lp->phylink)) { in axienet_probe()
2114 ret = PTR_ERR(lp->phylink); in axienet_probe()
2119 ret = register_netdev(lp->ndev); in axienet_probe()
2121 dev_err(lp->dev, "register_netdev() error (%i)\n", ret); in axienet_probe()
2128 phylink_destroy(lp->phylink); in axienet_probe()
2131 if (lp->pcs_phy) in axienet_probe()
2132 put_device(&lp->pcs_phy->dev); in axienet_probe()
2133 if (lp->mii_bus) in axienet_probe()
2134 axienet_mdio_teardown(lp); in axienet_probe()
2135 of_node_put(lp->phy_node); in axienet_probe()
2138 clk_bulk_disable_unprepare(XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_probe()
2139 clk_disable_unprepare(lp->axi_clk); in axienet_probe()
2150 struct axienet_local *lp = netdev_priv(ndev); in axienet_remove() local
2154 if (lp->phylink) in axienet_remove()
2155 phylink_destroy(lp->phylink); in axienet_remove()
2157 if (lp->pcs_phy) in axienet_remove()
2158 put_device(&lp->pcs_phy->dev); in axienet_remove()
2160 axienet_mdio_teardown(lp); in axienet_remove()
2162 clk_bulk_disable_unprepare(XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_remove()
2163 clk_disable_unprepare(lp->axi_clk); in axienet_remove()
2165 of_node_put(lp->phy_node); in axienet_remove()
2166 lp->phy_node = NULL; in axienet_remove()