Lines Matching full:axi
3 * Definitions for Xilinx Axi Ethernet device driver.
72 /* Axi DMA Register definitions */
144 /* Axi Ethernet registers definition */
179 /* Bit Masks for Axi Ethernet RAF register */
198 /* Bit Masks for Axi Ethernet TPF and IFGP registers */
203 /* Bit Masks for Axi Ethernet IS, IE and IP registers, Same masks apply
223 /* Bit masks for Axi Ethernet VLAN TPID Word 0 register */
227 /* Bit masks for Axi Ethernet VLAN TPID Word 1 register */
231 /* Bit masks for Axi Ethernet RCW1 register */
247 /* Bit masks for Axi Ethernet TC register */
257 /* Bit masks for Axi Ethernet FCC register */
261 /* Bit masks for Axi Ethernet EMMC register */
273 /* Bit masks for Axi Ethernet PHYC register */
285 /* Bit masks for Axi Ethernet MDIO interface MC register */
289 /* Bit masks for Axi Ethernet MDIO interface MCR register */
301 /* Bit masks for Axi Ethernet MDIO interface MIS, MIP, MIE, MIC registers */
304 /* Bit masks for Axi Ethernet UAW1 register */
310 /* Bit masks for Axi Ethernet FMI register */
316 /* Defines for different options for C_PHY_TYPE parameter in Axi Ethernet IP */
327 /* Axi Ethernet Synthesis features */
347 * struct axidma_bd - Axi Dma buffer descriptor layout
397 * @dma_err_task: Work structure to process Axi DMA errors
481 * struct axiethernet_option - Used to set axi ethernet hardware options
493 * axienet_ior - Memory mapped Axi Ethernet register read
495 * @offset: Address offset from the base address of Axi Ethernet core
497 * Return: The contents of the Axi Ethernet register
524 * axienet_iow - Memory mapped Axi Ethernet register write
526 * @offset: Address offset from the base address of Axi Ethernet core
527 * @value: Value to be written into the Axi Ethernet register
529 * This function writes the desired value into the corresponding Axi Ethernet