Lines Matching full:mii
4 Provides Bus interface for MII registers
16 #include <linux/mii.h>
86 unsigned int mii_address = priv->hw->mii.addr; in stmmac_xgmac2_mdio_read()
87 unsigned int mii_data = priv->hw->mii.data; in stmmac_xgmac2_mdio_read()
97 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_read()
118 value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) in stmmac_xgmac2_mdio_read()
119 & priv->hw->mii.clk_csr_mask; in stmmac_xgmac2_mdio_read()
122 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_read()
129 /* Set the MII address register to read */ in stmmac_xgmac2_mdio_read()
133 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_read()
140 /* Read the data from the MII data register */ in stmmac_xgmac2_mdio_read()
154 unsigned int mii_address = priv->hw->mii.addr; in stmmac_xgmac2_mdio_write()
155 unsigned int mii_data = priv->hw->mii.data; in stmmac_xgmac2_mdio_write()
165 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_write()
186 value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) in stmmac_xgmac2_mdio_write()
187 & priv->hw->mii.clk_csr_mask; in stmmac_xgmac2_mdio_write()
191 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_write()
198 /* Set the MII address register to write */ in stmmac_xgmac2_mdio_write()
202 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_write()
215 * @phyaddr: MII addr
216 * @phyreg: MII reg
217 * Description: it reads data from the MII register from within the phy device.
218 * For the 7111 GMAC, we must set the bit 0 in the MII address register while
226 unsigned int mii_address = priv->hw->mii.addr; in stmmac_mdio_read()
227 unsigned int mii_data = priv->hw->mii.data; in stmmac_mdio_read()
238 value |= (phyaddr << priv->hw->mii.addr_shift) in stmmac_mdio_read()
239 & priv->hw->mii.addr_mask; in stmmac_mdio_read()
240 value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask; in stmmac_mdio_read()
241 value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) in stmmac_mdio_read()
242 & priv->hw->mii.clk_csr_mask; in stmmac_mdio_read()
247 value &= ~priv->hw->mii.reg_mask; in stmmac_mdio_read()
249 priv->hw->mii.reg_shift) & in stmmac_mdio_read()
250 priv->hw->mii.reg_mask; in stmmac_mdio_read()
272 /* Read the data from the MII data register */ in stmmac_mdio_read()
284 * @phyaddr: MII addr
285 * @phyreg: MII reg
287 * Description: it writes the data into the MII register from within the device.
294 unsigned int mii_address = priv->hw->mii.addr; in stmmac_mdio_write()
295 unsigned int mii_data = priv->hw->mii.data; in stmmac_mdio_write()
306 value |= (phyaddr << priv->hw->mii.addr_shift) in stmmac_mdio_write()
307 & priv->hw->mii.addr_mask; in stmmac_mdio_write()
308 value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask; in stmmac_mdio_write()
310 value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) in stmmac_mdio_write()
311 & priv->hw->mii.clk_csr_mask; in stmmac_mdio_write()
316 value &= ~priv->hw->mii.reg_mask; in stmmac_mdio_write()
318 priv->hw->mii.reg_shift) & in stmmac_mdio_write()
319 priv->hw->mii.reg_mask; in stmmac_mdio_write()
328 /* Wait until any existing MII operation is complete */ in stmmac_mdio_write()
335 /* Set the MII address register to write */ in stmmac_mdio_write()
339 /* Wait until any existing MII operation is complete */ in stmmac_mdio_write()
352 * Description: reset the MII bus
359 unsigned int mii_address = priv->hw->mii.addr; in stmmac_mdio_reset()
438 * Description: it registers the MII bus
540 priv->mii = new_bus; in stmmac_mdio_register()
554 * Description: it unregisters the MII bus
560 if (!priv->mii) in stmmac_mdio_unregister()
568 mdiobus_unregister(priv->mii); in stmmac_mdio_unregister()
569 priv->mii->priv = NULL; in stmmac_mdio_unregister()
570 mdiobus_free(priv->mii); in stmmac_mdio_unregister()
571 priv->mii = NULL; in stmmac_mdio_unregister()