57 	ravb_write(ndev, (ravb_read(ndev, reg) & ~clear) | set, reg);  in ravb_modify()
92 		ravb_write(ndev, GECMR_SPEED_100, GECMR);  in ravb_set_rate()
95 		ravb_write(ndev, GECMR_SPEED_1000, GECMR);  in ravb_set_rate()
432 	ravb_write(ndev, ndev->mtu + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN, RFLR);  in ravb_rcar_emac_init()
435 	ravb_write(ndev, ECMR_ZPF | ECMR_DM |  in ravb_rcar_emac_init()
442 	ravb_write(ndev,  in ravb_rcar_emac_init()
445 	ravb_write(ndev,  in ravb_rcar_emac_init()
449 	ravb_write(ndev, ECSR_ICD | ECSR_MPD, ECSR);  in ravb_rcar_emac_init()
452 	ravb_write(ndev, ECSIPR_ICDIP | ECSIPR_MPDIP | ECSIPR_LCHNGIP, ECSIPR);  in ravb_rcar_emac_init()
470 	ravb_write(ndev,  in ravb_rcar_dmac_init()
474 	ravb_write(ndev, TGC_TQP_AVBMODE1 | 0x00112200, TGC);  in ravb_rcar_dmac_init()
477 	ravb_write(ndev, TCCR_TFEN, TCCR);  in ravb_rcar_dmac_init()
482 		ravb_write(ndev, 0, DIL);  in ravb_rcar_dmac_init()
484 		ravb_write(ndev, CIE_CRIE | CIE_CTIE | CIE_CL0M, CIE);  in ravb_rcar_dmac_init()
487 	ravb_write(ndev, RIC0_FRE0 | RIC0_FRE1, RIC0);  in ravb_rcar_dmac_init()
489 	ravb_write(ndev, 0, RIC1);  in ravb_rcar_dmac_init()
491 	ravb_write(ndev, RIC2_QFE0 | RIC2_QFE1 | RIC2_RFFE, RIC2);  in ravb_rcar_dmac_init()
493 	ravb_write(ndev, TIC_FTE0 | TIC_FTE1 | TIC_TFUE, TIC);  in ravb_rcar_dmac_init()
752 	ravb_write(ndev, ecsr, ECSR);	/* clear interrupt */  in ravb_emac_interrupt_unlocked()
793 	ravb_write(ndev, ~(EIS_QFS | EIS_RESERVED), EIS);  in ravb_error_interrupt()
796 		ravb_write(ndev, ~(RIS2_QFF0 | RIS2_RFFF | RIS2_RESERVED),  in ravb_error_interrupt()
826 				ravb_write(ndev, ric0 & ~BIT(q), RIC0);  in ravb_queue_interrupt()
827 				ravb_write(ndev, tic & ~BIT(q), TIC);  in ravb_queue_interrupt()
829 				ravb_write(ndev, BIT(q), RID0);  in ravb_queue_interrupt()
830 				ravb_write(ndev, BIT(q), TID);  in ravb_queue_interrupt()
851 		ravb_write(ndev, ~(TIS_TFUF | TIS_RESERVED), TIS);  in ravb_timestamp_interrupt()
976 	ravb_write(ndev, ~(mask | RIS0_RESERVED), RIS0);  in ravb_poll()
983 	ravb_write(ndev, ~(mask | TIS_RESERVED), TIS);  in ravb_poll()
996 		ravb_write(ndev, mask, RIE0);  in ravb_poll()
997 		ravb_write(ndev, mask, TIE);  in ravb_poll()
1705 		ravb_write(ndev, 0, TROCR);	/* (write clear) */  in ravb_get_stats()
1750 	ravb_write(ndev, 0, RIC0);  in ravb_close()
1751 	ravb_write(ndev, 0, RIC2);  in ravb_close()
1752 	ravb_write(ndev, 0, TIC);  in ravb_close()
2073 	ravb_write(ndev, inc, GTI);  in ravb_set_gti()
2298 	ravb_write(ndev, priv->desc_bat_dma, DBAT);  in ravb_probe()
2380 	ravb_write(ndev, CCC_OPC_RESET, CCC);  in ravb_remove()
2399 	ravb_write(ndev, 0, RIC0);  in ravb_wol_setup()
2400 	ravb_write(ndev, 0, RIC2);  in ravb_wol_setup()
2401 	ravb_write(ndev, 0, TIC);  in ravb_wol_setup()
2407 	ravb_write(ndev, ECSIPR_MPDIP, ECSIPR);  in ravb_wol_setup()
2461 		ravb_write(ndev, CCC_OPC_RESET, CCC);  in ravb_resume()
2483 	ravb_write(ndev, priv->desc_bat_dma, DBAT);  in ravb_resume()