1 // SPDX-License-Identifier: GPL-2.0+
11 /* The IFH bit position of the first VSTAX bit. This is because the
12  * VSTAX bit positions in Data sheet is starting from zero.
20 		/* Max width is 5 bytes - 40 bits. In worst case this will
21 		 * spread over 6 bytes - 48 bits
23 		compiletime_assert(width <= 40,				\
24 				   "Unsupported width, must be <= 40");	\
31 	/* Calculate the Start IFH byte position of this IFH bit position */  in __ifh_encode_bitfield()
32 	u32 byte = (35 - (pos / 8));  in __ifh_encode_bitfield()
33 	/* Calculate the Start bit position in the Start IFH byte */  in __ifh_encode_bitfield()
34 	u32 bit  = (pos % 8);  in __ifh_encode_bitfield()  local
35 	u64 encode = GENMASK_ULL(bit + width - 1, bit) & (value << bit);  in __ifh_encode_bitfield()
37 	/* The b0-b7 goes into the start IFH byte */  in __ifh_encode_bitfield()
40 	/* The b8-b15 goes into the next IFH byte */  in __ifh_encode_bitfield()
42 		ifh_hdr[byte - 1] |= (u8)((encode & 0xFF00) >> 8);  in __ifh_encode_bitfield()
43 	/* The b16-b23 goes into the next IFH byte */  in __ifh_encode_bitfield()
45 		ifh_hdr[byte - 2] |= (u8)((encode & 0xFF0000) >> 16);  in __ifh_encode_bitfield()
46 	/* The b24-b31 goes into the next IFH byte */  in __ifh_encode_bitfield()
48 		ifh_hdr[byte - 3] |= (u8)((encode & 0xFF000000) >> 24);  in __ifh_encode_bitfield()
49 	/* The b32-b39 goes into the next IFH byte */  in __ifh_encode_bitfield()
51 		ifh_hdr[byte - 4] |= (u8)((encode & 0xFF00000000) >> 32);  in __ifh_encode_bitfield()
52 	/* The b40-b47 goes into the next IFH byte */  in __ifh_encode_bitfield()
54 		ifh_hdr[byte - 5] |= (u8)((encode & 0xFF0000000000) >> 40);  in __ifh_encode_bitfield()
61 	/* VSTAX.INGR_DROP_MODE = Enable. Don't make head-of-line blocking */  in sparx5_set_port_ifh()
83 	err = phylink_of_phy_connect(port->phylink, port->of_node, 0);  in sparx5_port_open()
89 	phylink_start(port->phylink);  in sparx5_port_open()
91 	if (!ndev->phydev) {  in sparx5_port_open()
93 		port->conf.power_down = false;  in sparx5_port_open()
94 		if (port->conf.serdes_reset)  in sparx5_port_open()
95 			err = sparx5_serdes_set(port->sparx5, port, &port->conf);  in sparx5_port_open()
97 			err = phy_power_on(port->serdes);  in sparx5_port_open()
111 	phylink_stop(port->phylink);  in sparx5_port_stop()
112 	phylink_disconnect_phy(port->phylink);  in sparx5_port_stop()
114 	if (!ndev->phydev) {  in sparx5_port_stop()
116 		port->conf.power_down = true;  in sparx5_port_stop()
117 		if (port->conf.serdes_reset)  in sparx5_port_stop()
118 			err = sparx5_serdes_set(port->sparx5, port, &port->conf);  in sparx5_port_stop()
120 			err = phy_power_off(port->serdes);  in sparx5_port_stop()
130 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_set_rx_mode()
132 	if (!test_bit(port->portno, sparx5->bridge_mask))  in sparx5_set_rx_mode()
142 	ret = snprintf(buf, len, "p%d", port->portno);  in sparx5_port_get_phys_port_name()
144 		return -EINVAL;  in sparx5_port_get_phys_port_name()
152 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_set_mac_address()
155 	if (!is_valid_ether_addr(addr->sa_data))  in sparx5_set_mac_address()
156 		return -EADDRNOTAVAIL;  in sparx5_set_mac_address()
159 	sparx5_mact_forget(sparx5, dev->dev_addr,  port->pvid);  in sparx5_set_mac_address()
162 	sparx5_mact_learn(sparx5, PGID_CPU, addr->sa_data, port->pvid);  in sparx5_set_mac_address()
165 	ether_addr_copy(dev->dev_addr, addr->sa_data);  in sparx5_set_mac_address()
174 	struct sparx5 *sparx5 = sparx5_port->sparx5;  in sparx5_get_port_parent_id()
176 	ppid->id_len = sizeof(sparx5->base_mac);  in sparx5_get_port_parent_id()
177 	memcpy(&ppid->id, &sparx5->base_mac, ppid->id_len);  in sparx5_get_port_parent_id()
196 	return dev && (dev->netdev_ops == &sparx5_port_netdev_ops);  in sparx5_netdevice_check()
205 	ndev = devm_alloc_etherdev(sparx5->dev, sizeof(struct sparx5_port));  in sparx5_create_netdev()
207 		return ERR_PTR(-ENOMEM);  in sparx5_create_netdev()
209 	SET_NETDEV_DEV(ndev, sparx5->dev);  in sparx5_create_netdev()
211 	spx5_port->ndev = ndev;  in sparx5_create_netdev()
212 	spx5_port->sparx5 = sparx5;  in sparx5_create_netdev()
213 	spx5_port->portno = portno;  in sparx5_create_netdev()
214 	sparx5_set_port_ifh(spx5_port->ifh, portno);  in sparx5_create_netdev()
216 	ndev->netdev_ops = &sparx5_port_netdev_ops;  in sparx5_create_netdev()
217 	ndev->ethtool_ops = &sparx5_ethtool_ops;  in sparx5_create_netdev()
219 	val = ether_addr_to_u64(sparx5->base_mac) + portno + 1;  in sparx5_create_netdev()
220 	u64_to_ether_addr(val, ndev->dev_addr);  in sparx5_create_netdev()
231 		if (sparx5->ports[portno]) {  in sparx5_register_netdevs()
232 			err = register_netdev(sparx5->ports[portno]->ndev);  in sparx5_register_netdevs()
234 				dev_err(sparx5->dev,  in sparx5_register_netdevs()
239 			sparx5_port_inj_timer_setup(sparx5->ports[portno]);  in sparx5_register_netdevs()
250 		port = sparx5->ports[portno];  in sparx5_destroy_netdevs()
251 		if (port && port->phylink) {  in sparx5_destroy_netdevs()
254 			sparx5_port_stop(port->ndev);  in sparx5_destroy_netdevs()
255 			phylink_disconnect_phy(port->phylink);  in sparx5_destroy_netdevs()
257 			phylink_destroy(port->phylink);  in sparx5_destroy_netdevs()
258 			port->phylink = NULL;  in sparx5_destroy_netdevs()
268 		if (sparx5->ports[portno])  in sparx5_unregister_netdevs()
269 			unregister_netdev(sparx5->ports[portno]->ndev);  in sparx5_unregister_netdevs()