Lines Matching +full:0 +full:x30000
14 #define PCI_DEVID_CN10K_RPM 0xA060
17 #define RPMX_CMRX_SW_INT 0x180
18 #define RPMX_CMRX_SW_INT_W1S 0x188
19 #define RPMX_CMRX_SW_INT_ENA_W1S 0x198
20 #define RPMX_CMRX_LINK_CFG 0x1070
21 #define RPMX_MTI_PCS100X_CONTROL1 0x20000
22 #define RPMX_MTI_LPCSX_CONTROL1 0x30000
24 #define RPMX_MTI_LPCSX_CONTROL(id) (0x30000 | ((id) * 0x100))
27 #define RPMX_CMRX_LINK_BASE_MASK GENMASK_ULL(11, 0)
28 #define RPMX_MTI_MAC100X_COMMAND_CONFIG 0x8010
33 #define RPMX_MTI_MAC100X_CL01_PAUSE_QUANTA 0x80A8
34 #define RPMX_MTI_MAC100X_CL01_QUANTA_THRESH 0x80C8
35 #define RPM_DEFAULT_PAUSE_TIME 0xFFFF
36 #define RPMX_CMR_RX_OVR_BP 0x4120
39 #define RPMX_MTI_STAT_RX_STAT_PAGES_COUNTERX 0x12000
40 #define RPMX_MTI_STAT_TX_STAT_PAGES_COUNTERX 0x13000
41 #define RPMX_MTI_STAT_DATA_HI_CDC 0x10038
43 #define RPM_LMAC_FWI 0xa