110 void cgx_write(struct cgx *cgx, u64 lmac, u64 offset, u64 val)  in cgx_write()  function
170 	cgx_write(cgx_dev, lmac_id, offset, val);  in cgx_lmac_write()
255 	cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)),  in cgx_lmac_addr_set()
261 	cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg);  in cgx_lmac_addr_set()
319 	cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)), cfg);  in cgx_lmac_addr_add()
332 	cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg);  in cgx_lmac_addr_add()
357 	cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)), 0);  in cgx_lmac_addr_reset()
363 	cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg);  in cgx_lmac_addr_reset()
401 	cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)), cfg);  in cgx_lmac_addr_update()
443 		cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg);  in cgx_lmac_addr_del()
446 	cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)), 0);  in cgx_lmac_addr_del()
488 	cgx_write(cgx, lmac_id, CGXX_CMRX_RX_ID_MAP, (pkind & 0x3F));  in cgx_set_pkind()
518 		cgx_write(cgx, lmac_id, CGXX_GMP_PCS_MRX_CTL, cfg);  in cgx_lmac_internal_loopback()
525 		cgx_write(cgx, lmac_id, CGXX_SPUX_CONTROL1, cfg);  in cgx_lmac_internal_loopback()
551 		cgx_write(cgx, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg);  in cgx_lmac_promisc_config()
558 			cgx_write(cgx, 0,  in cgx_lmac_promisc_config()
565 		cgx_write(cgx, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg);  in cgx_lmac_promisc_config()
572 				cgx_write(cgx, 0,  in cgx_lmac_promisc_config()
593 		cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);  in cgx_lmac_enadis_rx_pause_fwding()
597 		cgx_write(cgx, lmac_id,	CGXX_SMUX_RX_FRM_CTL, cfg);  in cgx_lmac_enadis_rx_pause_fwding()
601 		cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);  in cgx_lmac_enadis_rx_pause_fwding()
605 		cgx_write(cgx, lmac_id,	CGXX_SMUX_RX_FRM_CTL, cfg);  in cgx_lmac_enadis_rx_pause_fwding()
701 	cgx_write(cgx, lmac_id, CGXX_CMRX_CFG, cfg);  in cgx_lmac_rx_tx_enable()
721 		cgx_write(cgx, lmac_id, CGXX_CMRX_CFG, cfg);  in cgx_lmac_tx_enable()
760 	cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg);  in cgx_lmac_enadis_pause_frm()
765 	cgx_write(cgx, lmac_id, CGXX_SMUX_TX_CTL, cfg);  in cgx_lmac_enadis_pause_frm()
774 	cgx_write(cgx, 0, CGXX_CMR_RX_OVR_BP, cfg);  in cgx_lmac_enadis_pause_frm()
789 		cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg);  in cgx_lmac_pause_frm_config()
793 		cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);  in cgx_lmac_pause_frm_config()
798 		cgx_write(cgx, lmac_id, CGXX_SMUX_TX_CTL, cfg);  in cgx_lmac_pause_frm_config()
801 		cgx_write(cgx, lmac_id, CGXX_SMUX_TX_PAUSE_PKT_TIME,  in cgx_lmac_pause_frm_config()
805 		cgx_write(cgx, lmac_id, CGXX_SMUX_TX_PAUSE_PKT_INTERVAL,  in cgx_lmac_pause_frm_config()
808 		cgx_write(cgx, lmac_id, CGXX_GMP_GMI_TX_PAUSE_PKT_TIME,  in cgx_lmac_pause_frm_config()
814 		cgx_write(cgx, lmac_id, CGXX_GMP_GMI_TX_PAUSE_PKT_INTERVAL,  in cgx_lmac_pause_frm_config()
820 		cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg);  in cgx_lmac_pause_frm_config()
824 		cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);  in cgx_lmac_pause_frm_config()
829 		cgx_write(cgx, lmac_id, CGXX_SMUX_TX_CTL, cfg);  in cgx_lmac_pause_frm_config()
848 		cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);  in cgx_lmac_ptp_config()
852 		cgx_write(cgx, lmac_id,	CGXX_SMUX_RX_FRM_CTL, cfg);  in cgx_lmac_ptp_config()
857 		cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);  in cgx_lmac_ptp_config()
861 		cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg);  in cgx_lmac_ptp_config()
892 	cgx_write(cgx, lmac->lmac_id, CGX_COMMAND_REG, req);  in cgx_fwi_cmd_send()
1203 	cgx_write(lmac->cgx, lmac->lmac_id, CGX_EVENT_REG, 0);  in cgx_fwi_event_handler()
1204 	cgx_write(lmac->cgx, lmac->lmac_id, offset, clear_bit);  in cgx_fwi_event_handler()
1425 	cgx_write(cgx, lmac->lmac_id, offset, ena_bit);  in cgx_configure_interrupt()