Lines Matching +full:eee +full:- +full:broken +full:- +full:100 +full:tx
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
153 #define MVNETA_TX_INTR_MASK(nr_txqs) (((1 << nr_txqs) - 1) << 0)
155 #define MVNETA_RX_INTR_MASK(nr_rxqs) (((1 << nr_rxqs) - 1) << 8)
266 (((index) < (q)->last_desc) ? ((index) + 1) : 0)
273 #define MVNETA_RX_COAL_USEC 100
309 /* Max number of Tx descriptors */
313 #define MVNETA_MAX_TSO_SEGS 100
335 #define MVNETA_MAX_RX_BUF_SIZE (PAGE_SIZE - MVNETA_SKB_PAD)
338 ((addr >= txq->tso_hdrs_phys) && \
339 (addr < txq->tso_hdrs_phys + txq->size * TSO_HEADER_SIZE))
342 (((rxd)->status & MVNETA_RXD_BM_POOL_MASK) >> MVNETA_RXD_BM_POOL_SHIFT)
451 /* Pointer to the CPU-local NAPI struct */
563 u32 reserved2; /* hw_cmd - (for future use, PMT) */
564 u32 reserved3[4]; /* Reserved - (for future use) */
569 u16 reserved1; /* pnc_info - (for future use, PnC) */
577 u16 reserved4; /* csum_l4 - (for future use, PnC) */
587 u32 reserved2; /* hw_cmd - (for future use, PMT) */
589 u32 reserved3[4]; /* Reserved - (for future use) */
594 u16 reserved1; /* pnc_info - (for future use, PnC) */
600 u16 reserved4; /* csum_l4 - (for future use, PnC) */
624 /* Number of this TX queue, in the range 0-7 */
627 /* Number of TX DMA descriptors in the descriptor ring */
630 /* Number of currently used TX DMA descriptor in the
641 /* Index of last TX DMA descriptor that was inserted */
644 /* Index of the TX DMA descriptor to be cleaned up */
649 /* Virtual address of the TX DMA descriptors array */
652 /* DMA address of the TX DMA descriptors array */
655 /* Index of the last TX DMA descriptor */
658 /* Index of the next TX DMA descriptor to process */
672 /* rx queue number, in the range 0-7 */
727 writel(data, pp->base + offset); in mvreg_write()
733 return readl(pp->base + offset); in mvreg_read()
739 txq->txq_get_index++; in mvneta_txq_inc_get()
740 if (txq->txq_get_index == txq->size) in mvneta_txq_inc_get()
741 txq->txq_get_index = 0; in mvneta_txq_inc_get()
747 txq->txq_put_index++; in mvneta_txq_inc_put()
748 if (txq->txq_put_index == txq->size) in mvneta_txq_inc_put()
749 txq->txq_put_index = 0; in mvneta_txq_inc_put()
783 cpu_stats = per_cpu_ptr(pp->stats, cpu); in mvneta_get_stats64()
785 start = u64_stats_fetch_begin_irq(&cpu_stats->syncp); in mvneta_get_stats64()
786 rx_packets = cpu_stats->es.ps.rx_packets; in mvneta_get_stats64()
787 rx_bytes = cpu_stats->es.ps.rx_bytes; in mvneta_get_stats64()
788 rx_dropped = cpu_stats->rx_dropped; in mvneta_get_stats64()
789 rx_errors = cpu_stats->rx_errors; in mvneta_get_stats64()
790 tx_packets = cpu_stats->es.ps.tx_packets; in mvneta_get_stats64()
791 tx_bytes = cpu_stats->es.ps.tx_bytes; in mvneta_get_stats64()
792 } while (u64_stats_fetch_retry_irq(&cpu_stats->syncp, start)); in mvneta_get_stats64()
794 stats->rx_packets += rx_packets; in mvneta_get_stats64()
795 stats->rx_bytes += rx_bytes; in mvneta_get_stats64()
796 stats->rx_dropped += rx_dropped; in mvneta_get_stats64()
797 stats->rx_errors += rx_errors; in mvneta_get_stats64()
798 stats->tx_packets += tx_packets; in mvneta_get_stats64()
799 stats->tx_bytes += tx_bytes; in mvneta_get_stats64()
802 stats->tx_dropped = dev->stats.tx_dropped; in mvneta_get_stats64()
827 mvreg_write(pp, MVNETA_RXQ_STATUS_UPDATE_REG(rxq->id), in mvneta_rxq_non_occup_desc_add()
830 ndescs -= MVNETA_RXQ_ADD_NON_OCCUPIED_MAX; in mvneta_rxq_non_occup_desc_add()
833 mvreg_write(pp, MVNETA_RXQ_STATUS_UPDATE_REG(rxq->id), in mvneta_rxq_non_occup_desc_add()
843 val = mvreg_read(pp, MVNETA_RXQ_STATUS_REG(rxq->id)); in mvneta_rxq_busy_desc_num_get()
859 mvreg_write(pp, MVNETA_RXQ_STATUS_UPDATE_REG(rxq->id), val); in mvneta_rxq_desc_num_update()
870 rx_done -= 0xff; in mvneta_rxq_desc_num_update()
877 rx_filled -= 0xff; in mvneta_rxq_desc_num_update()
879 mvreg_write(pp, MVNETA_RXQ_STATUS_UPDATE_REG(rxq->id), val); in mvneta_rxq_desc_num_update()
887 int rx_desc = rxq->next_desc_to_proc; in mvneta_rxq_next_desc_get()
889 rxq->next_desc_to_proc = MVNETA_QUEUE_NEXT_DESC(rxq, rx_desc); in mvneta_rxq_next_desc_get()
890 prefetch(rxq->descs + rxq->next_desc_to_proc); in mvneta_rxq_next_desc_get()
891 return rxq->descs + rx_desc; in mvneta_rxq_next_desc_get()
901 val |= ((max_rx_size - MVNETA_MH_SIZE) / 2) << in mvneta_max_rx_size_set()
914 val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); in mvneta_rxq_offset_set()
919 mvreg_write(pp, MVNETA_RXQ_CONFIG_REG(rxq->id), val); in mvneta_rxq_offset_set()
923 /* Tx descriptors helper methods */
925 /* Update HW with number of TX descriptors to be sent */
932 pend_desc += txq->pending; in mvneta_txq_pend_desc_add()
934 /* Only 255 Tx descriptors can be added at once */ in mvneta_txq_pend_desc_add()
937 mvreg_write(pp, MVNETA_TXQ_UPDATE_REG(txq->id), val); in mvneta_txq_pend_desc_add()
938 pend_desc -= val; in mvneta_txq_pend_desc_add()
940 txq->pending = 0; in mvneta_txq_pend_desc_add()
943 /* Get pointer to next TX descriptor to be processed (send) by HW */
947 int tx_desc = txq->next_desc_to_proc; in mvneta_txq_next_desc_get()
949 txq->next_desc_to_proc = MVNETA_QUEUE_NEXT_DESC(txq, tx_desc); in mvneta_txq_next_desc_get()
950 return txq->descs + tx_desc; in mvneta_txq_next_desc_get()
953 /* Release the last allocated TX descriptor. Useful to handle DMA
954 * mapping failures in the TX path.
958 if (txq->next_desc_to_proc == 0) in mvneta_txq_desc_put()
959 txq->next_desc_to_proc = txq->last_desc - 1; in mvneta_txq_desc_put()
961 txq->next_desc_to_proc--; in mvneta_txq_desc_put()
971 val = mvreg_read(pp, MVNETA_RXQ_SIZE_REG(rxq->id)); in mvneta_rxq_buf_size_set()
976 mvreg_write(pp, MVNETA_RXQ_SIZE_REG(rxq->id), val); in mvneta_rxq_buf_size_set()
985 val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); in mvneta_rxq_bm_disable()
987 mvreg_write(pp, MVNETA_RXQ_CONFIG_REG(rxq->id), val); in mvneta_rxq_bm_disable()
996 val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); in mvneta_rxq_bm_enable()
998 mvreg_write(pp, MVNETA_RXQ_CONFIG_REG(rxq->id), val); in mvneta_rxq_bm_enable()
1007 val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); in mvneta_rxq_long_pool_set()
1009 val |= (pp->pool_long->id << MVNETA_RXQ_LONG_POOL_ID_SHIFT); in mvneta_rxq_long_pool_set()
1011 mvreg_write(pp, MVNETA_RXQ_CONFIG_REG(rxq->id), val); in mvneta_rxq_long_pool_set()
1020 val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); in mvneta_rxq_short_pool_set()
1022 val |= (pp->pool_short->id << MVNETA_RXQ_SHORT_POOL_ID_SHIFT); in mvneta_rxq_short_pool_set()
1024 mvreg_write(pp, MVNETA_RXQ_CONFIG_REG(rxq->id), val); in mvneta_rxq_short_pool_set()
1035 dev_warn(pp->dev->dev.parent, in mvneta_bm_pool_bufsize_set()
1055 if (pp->bm_win_id < 0) { in mvneta_mbus_io_win_set()
1059 pp->bm_win_id = i; in mvneta_mbus_io_win_set()
1064 return -ENOMEM; in mvneta_mbus_io_win_set()
1066 i = pp->bm_win_id; in mvneta_mbus_io_win_set()
1078 mvreg_write(pp, MVNETA_WIN_SIZE(i), (wsize - 1) & 0xffff0000); in mvneta_mbus_io_win_set()
1097 err = mvebu_mbus_get_io_win_info(pp->bm_priv->bppi_phys_addr, &wsize, in mvneta_bm_port_mbus_init()
1102 pp->bm_win_id = -1; in mvneta_bm_port_mbus_init()
1104 /* Open NETA -> BM window */ in mvneta_bm_port_mbus_init()
1105 err = mvneta_mbus_io_win_set(pp, pp->bm_priv->bppi_phys_addr, wsize, in mvneta_bm_port_mbus_init()
1108 netdev_info(pp->dev, "fail to configure mbus window to BM\n"); in mvneta_bm_port_mbus_init()
1120 struct device_node *dn = pdev->dev.of_node; in mvneta_bm_port_init()
1123 if (!pp->neta_armada3700) { in mvneta_bm_port_init()
1131 if (of_property_read_u32(dn, "bm,pool-long", &long_pool_id)) { in mvneta_bm_port_init()
1132 netdev_info(pp->dev, "missing long pool id\n"); in mvneta_bm_port_init()
1133 return -EINVAL; in mvneta_bm_port_init()
1137 pp->pool_long = mvneta_bm_pool_use(pp->bm_priv, long_pool_id, in mvneta_bm_port_init()
1138 MVNETA_BM_LONG, pp->id, in mvneta_bm_port_init()
1139 MVNETA_RX_PKT_SIZE(pp->dev->mtu)); in mvneta_bm_port_init()
1140 if (!pp->pool_long) { in mvneta_bm_port_init()
1141 netdev_info(pp->dev, "fail to obtain long pool for port\n"); in mvneta_bm_port_init()
1142 return -ENOMEM; in mvneta_bm_port_init()
1145 pp->pool_long->port_map |= 1 << pp->id; in mvneta_bm_port_init()
1147 mvneta_bm_pool_bufsize_set(pp, pp->pool_long->buf_size, in mvneta_bm_port_init()
1148 pp->pool_long->id); in mvneta_bm_port_init()
1151 if (of_property_read_u32(dn, "bm,pool-short", &short_pool_id)) in mvneta_bm_port_init()
1155 pp->pool_short = mvneta_bm_pool_use(pp->bm_priv, short_pool_id, in mvneta_bm_port_init()
1156 MVNETA_BM_SHORT, pp->id, in mvneta_bm_port_init()
1158 if (!pp->pool_short) { in mvneta_bm_port_init()
1159 netdev_info(pp->dev, "fail to obtain short pool for port\n"); in mvneta_bm_port_init()
1160 mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id); in mvneta_bm_port_init()
1161 return -ENOMEM; in mvneta_bm_port_init()
1165 pp->pool_short->port_map |= 1 << pp->id; in mvneta_bm_port_init()
1166 mvneta_bm_pool_bufsize_set(pp, pp->pool_short->buf_size, in mvneta_bm_port_init()
1167 pp->pool_short->id); in mvneta_bm_port_init()
1176 struct mvneta_bm_pool *bm_pool = pp->pool_long; in mvneta_bm_update_mtu()
1177 struct hwbm_pool *hwbm_pool = &bm_pool->hwbm_pool; in mvneta_bm_update_mtu()
1181 mvneta_bm_bufs_free(pp->bm_priv, bm_pool, 1 << pp->id); in mvneta_bm_update_mtu()
1182 if (hwbm_pool->buf_num) { in mvneta_bm_update_mtu()
1184 bm_pool->id); in mvneta_bm_update_mtu()
1188 bm_pool->pkt_size = MVNETA_RX_PKT_SIZE(mtu); in mvneta_bm_update_mtu()
1189 bm_pool->buf_size = MVNETA_RX_BUF_SIZE(bm_pool->pkt_size); in mvneta_bm_update_mtu()
1190 hwbm_pool->frag_size = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + in mvneta_bm_update_mtu()
1191 SKB_DATA_ALIGN(MVNETA_RX_BUF_SIZE(bm_pool->pkt_size)); in mvneta_bm_update_mtu()
1194 num = hwbm_pool_add(hwbm_pool, hwbm_pool->size); in mvneta_bm_update_mtu()
1195 if (num != hwbm_pool->size) { in mvneta_bm_update_mtu()
1197 bm_pool->id, num, hwbm_pool->size); in mvneta_bm_update_mtu()
1200 mvneta_bm_pool_bufsize_set(pp, bm_pool->buf_size, bm_pool->id); in mvneta_bm_update_mtu()
1205 mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id); in mvneta_bm_update_mtu()
1206 mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_short, 1 << pp->id); in mvneta_bm_update_mtu()
1208 pp->bm_priv = NULL; in mvneta_bm_update_mtu()
1209 pp->rx_offset_correction = MVNETA_SKB_HEADROOM; in mvneta_bm_update_mtu()
1211 netdev_info(pp->dev, "fail to update MTU, fall back to software BM\n"); in mvneta_bm_update_mtu()
1214 /* Start the Ethernet port RX and TX activity */
1223 struct mvneta_tx_queue *txq = &pp->txqs[queue]; in mvneta_port_up()
1224 if (txq->descs) in mvneta_port_up()
1232 struct mvneta_rx_queue *rxq = &pp->rxqs[queue]; in mvneta_port_up()
1234 if (rxq->descs) in mvneta_port_up()
1258 netdev_warn(pp->dev, in mvneta_port_down()
1268 /* Stop Tx port activity. Check port Tx activity. Issue stop in mvneta_port_down()
1277 /* Wait for all Tx activity to terminate. */ in mvneta_port_down()
1281 netdev_warn(pp->dev, in mvneta_port_down()
1282 "TIMEOUT for TX stopped status=0x%08x\n", in mvneta_port_down()
1288 /* Check TX Command reg that all Txqs are stopped */ in mvneta_port_down()
1293 /* Double check to verify that TX FIFO is empty */ in mvneta_port_down()
1297 netdev_warn(pp->dev, in mvneta_port_down()
1298 "TX FIFO empty timeout status=0x%08x\n", in mvneta_port_down()
1337 /* Set all entries in Unicast MAC Table; queue==-1 means reject all */
1343 if (queue == -1) { in mvneta_set_ucast_table()
1354 /* Set all entries in Special Multicast MAC Table; queue==-1 means reject all */
1360 if (queue == -1) { in mvneta_set_special_mcast_table()
1372 /* Set all entries in Other Multicast MAC Table. queue==-1 means reject all */
1378 if (queue == -1) { in mvneta_set_other_mcast_table()
1379 memset(pp->mcast_count, 0, sizeof(pp->mcast_count)); in mvneta_set_other_mcast_table()
1382 memset(pp->mcast_count, 1, sizeof(pp->mcast_count)); in mvneta_set_other_mcast_table()
1432 * Resets RX and TX descriptor rings.
1455 * TX queues modulo their number. If there is only one TX in mvneta_defaults_set()
1462 if (!pp->neta_armada3700) { in mvneta_defaults_set()
1471 /* With only one TX queue we configure a special case in mvneta_defaults_set()
1476 txq_map = (cpu == pp->rxq_def) ? in mvneta_defaults_set()
1487 /* Reset RX and TX DMAs */ in mvneta_defaults_set()
1502 if (pp->bm_priv) in mvneta_defaults_set()
1510 if (pp->bm_priv) in mvneta_defaults_set()
1511 mvreg_write(pp, MVNETA_BM_ADDRESS, pp->bm_priv->bppi_phys_addr); in mvneta_defaults_set()
1514 val = MVNETA_PORT_CONFIG_DEFL_VALUE(pp->rxq_def); in mvneta_defaults_set()
1543 mvneta_set_ucast_table(pp, -1); in mvneta_defaults_set()
1544 mvneta_set_special_mcast_table(pp, -1); in mvneta_defaults_set()
1545 mvneta_set_other_mcast_table(pp, -1); in mvneta_defaults_set()
1547 /* Set port interrupt enable register - default enable all */ in mvneta_defaults_set()
1555 /* Set max sizes for tx queues */
1572 /* TX token size and all TXQs token size must be larger that MTU */ in mvneta_txq_max_tx_size_set()
1614 if (queue == -1) { in mvneta_set_ucast_addr()
1632 if (queue != -1) { in mvneta_mac_addr_set()
1651 mvreg_write(pp, MVNETA_RXQ_THRESHOLD_REG(rxq->id), in mvneta_rx_pkts_coal_set()
1664 clk_rate = clk_get_rate(pp->clk); in mvneta_rx_time_coal_set()
1667 mvreg_write(pp, MVNETA_RXQ_TIME_COAL_REG(rxq->id), val); in mvneta_rx_time_coal_set()
1676 val = mvreg_read(pp, MVNETA_TXQ_SIZE_REG(txq->id)); in mvneta_tx_done_pkts_coal_set()
1681 mvreg_write(pp, MVNETA_TXQ_SIZE_REG(txq->id), val); in mvneta_tx_done_pkts_coal_set()
1691 rx_desc->buf_phys_addr = phys_addr; in mvneta_rx_desc_fill()
1692 i = rx_desc - rxq->descs; in mvneta_rx_desc_fill()
1693 rxq->buf_virt_addr[i] = virt_addr; in mvneta_rx_desc_fill()
1703 /* Only 255 TX descriptors can be updated at once */ in mvneta_txq_sent_desc_dec()
1706 mvreg_write(pp, MVNETA_TXQ_UPDATE_REG(txq->id), val); in mvneta_txq_sent_desc_dec()
1707 sent_desc = sent_desc - 0xff; in mvneta_txq_sent_desc_dec()
1711 mvreg_write(pp, MVNETA_TXQ_UPDATE_REG(txq->id), val); in mvneta_txq_sent_desc_dec()
1714 /* Get number of TX descriptors already sent by HW */
1721 val = mvreg_read(pp, MVNETA_TXQ_STATUS_REG(txq->id)); in mvneta_txq_sent_desc_num_get()
1779 struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); in mvneta_rx_error()
1780 u32 status = rx_desc->status; in mvneta_rx_error()
1782 /* update per-cpu counter */ in mvneta_rx_error()
1783 u64_stats_update_begin(&stats->syncp); in mvneta_rx_error()
1784 stats->rx_errors++; in mvneta_rx_error()
1785 u64_stats_update_end(&stats->syncp); in mvneta_rx_error()
1789 netdev_err(pp->dev, "bad rx status %08x (crc error), size=%d\n", in mvneta_rx_error()
1790 status, rx_desc->data_size); in mvneta_rx_error()
1793 netdev_err(pp->dev, "bad rx status %08x (overrun error), size=%d\n", in mvneta_rx_error()
1794 status, rx_desc->data_size); in mvneta_rx_error()
1797 netdev_err(pp->dev, "bad rx status %08x (max frame length error), size=%d\n", in mvneta_rx_error()
1798 status, rx_desc->data_size); in mvneta_rx_error()
1801 netdev_err(pp->dev, "bad rx status %08x (resource error), size=%d\n", in mvneta_rx_error()
1802 status, rx_desc->data_size); in mvneta_rx_error()
1810 if ((pp->dev->features & NETIF_F_RXCSUM) && in mvneta_rx_csum()
1818 /* Return tx queue pointer (find last set bit) according to <cause> returned
1825 int queue = fls(cause) - 1; in mvneta_tx_done_policy()
1827 return &pp->txqs[queue]; in mvneta_tx_done_policy()
1830 /* Free tx queue skbuffs */
1844 struct mvneta_tx_buf *buf = &txq->buf[txq->txq_get_index]; in mvneta_txq_bufs_free()
1845 struct mvneta_tx_desc *tx_desc = txq->descs + in mvneta_txq_bufs_free()
1846 txq->txq_get_index; in mvneta_txq_bufs_free()
1850 if (!IS_TSO_HEADER(txq, tx_desc->buf_phys_addr) && in mvneta_txq_bufs_free()
1851 buf->type != MVNETA_TYPE_XDP_TX) in mvneta_txq_bufs_free()
1852 dma_unmap_single(pp->dev->dev.parent, in mvneta_txq_bufs_free()
1853 tx_desc->buf_phys_addr, in mvneta_txq_bufs_free()
1854 tx_desc->data_size, DMA_TO_DEVICE); in mvneta_txq_bufs_free()
1855 if (buf->type == MVNETA_TYPE_SKB && buf->skb) { in mvneta_txq_bufs_free()
1856 bytes_compl += buf->skb->len; in mvneta_txq_bufs_free()
1858 dev_kfree_skb_any(buf->skb); in mvneta_txq_bufs_free()
1859 } else if (buf->type == MVNETA_TYPE_XDP_TX || in mvneta_txq_bufs_free()
1860 buf->type == MVNETA_TYPE_XDP_NDO) { in mvneta_txq_bufs_free()
1861 if (napi && buf->type == MVNETA_TYPE_XDP_TX) in mvneta_txq_bufs_free()
1862 xdp_return_frame_rx_napi(buf->xdpf); in mvneta_txq_bufs_free()
1864 xdp_return_frame_bulk(buf->xdpf, &bq); in mvneta_txq_bufs_free()
1878 struct netdev_queue *nq = netdev_get_tx_queue(pp->dev, txq->id); in mvneta_txq_done()
1887 txq->count -= tx_done; in mvneta_txq_done()
1890 if (txq->count <= txq->tx_wake_threshold) in mvneta_txq_done()
1905 page = page_pool_alloc_pages(rxq->page_pool, in mvneta_rx_refill()
1908 return -ENOMEM; in mvneta_rx_refill()
1910 phys_addr = page_pool_get_dma_addr(page) + pp->rx_offset_correction; in mvneta_rx_refill()
1916 /* Handle tx checksum */
1919 if (skb->ip_summed == CHECKSUM_PARTIAL) { in mvneta_skb_tx_csum()
1928 ip_hdr_len = ip4h->ihl; in mvneta_skb_tx_csum()
1929 l4_proto = ip4h->protocol; in mvneta_skb_tx_csum()
1936 l4_proto = ip6h->nexthdr; in mvneta_skb_tx_csum()
1957 if (pp->bm_priv) { in mvneta_rxq_drop_pkts()
1964 bm_pool = &pp->bm_priv->bm_pools[pool_id]; in mvneta_rxq_drop_pkts()
1966 mvneta_bm_pool_put_bp(pp->bm_priv, bm_pool, in mvneta_rxq_drop_pkts()
1967 rx_desc->buf_phys_addr); in mvneta_rxq_drop_pkts()
1972 for (i = 0; i < rxq->size; i++) { in mvneta_rxq_drop_pkts()
1973 struct mvneta_rx_desc *rx_desc = rxq->descs + i; in mvneta_rxq_drop_pkts()
1974 void *data = rxq->buf_virt_addr[i]; in mvneta_rxq_drop_pkts()
1975 if (!data || !(rx_desc->buf_phys_addr)) in mvneta_rxq_drop_pkts()
1978 page_pool_put_full_page(rxq->page_pool, data, false); in mvneta_rxq_drop_pkts()
1980 if (xdp_rxq_info_is_reg(&rxq->xdp_rxq)) in mvneta_rxq_drop_pkts()
1981 xdp_rxq_info_unreg(&rxq->xdp_rxq); in mvneta_rxq_drop_pkts()
1982 page_pool_destroy(rxq->page_pool); in mvneta_rxq_drop_pkts()
1983 rxq->page_pool = NULL; in mvneta_rxq_drop_pkts()
1990 struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); in mvneta_update_stats()
1992 u64_stats_update_begin(&stats->syncp); in mvneta_update_stats()
1993 stats->es.ps.rx_packets += ps->rx_packets; in mvneta_update_stats()
1994 stats->es.ps.rx_bytes += ps->rx_bytes; in mvneta_update_stats()
1996 stats->es.ps.xdp_redirect += ps->xdp_redirect; in mvneta_update_stats()
1997 stats->es.ps.xdp_pass += ps->xdp_pass; in mvneta_update_stats()
1998 stats->es.ps.xdp_drop += ps->xdp_drop; in mvneta_update_stats()
1999 u64_stats_update_end(&stats->syncp); in mvneta_update_stats()
2006 int curr_desc = rxq->first_to_refill; in mvneta_rx_refill_queue()
2009 for (i = 0; (i < rxq->refill_num) && (i < 64); i++) { in mvneta_rx_refill_queue()
2010 rx_desc = rxq->descs + curr_desc; in mvneta_rx_refill_queue()
2011 if (!(rx_desc->buf_phys_addr)) { in mvneta_rx_refill_queue()
2016 rxq->id, i, rxq->refill_num); in mvneta_rx_refill_queue()
2018 stats = this_cpu_ptr(pp->stats); in mvneta_rx_refill_queue()
2019 u64_stats_update_begin(&stats->syncp); in mvneta_rx_refill_queue()
2020 stats->es.refill_error++; in mvneta_rx_refill_queue()
2021 u64_stats_update_end(&stats->syncp); in mvneta_rx_refill_queue()
2027 rxq->refill_num -= i; in mvneta_rx_refill_queue()
2028 rxq->first_to_refill = curr_desc; in mvneta_rx_refill_queue()
2040 for (i = 0; i < sinfo->nr_frags; i++) in mvneta_xdp_put_buff()
2041 page_pool_put_full_page(rxq->page_pool, in mvneta_xdp_put_buff()
2042 skb_frag_page(&sinfo->frags[i]), true); in mvneta_xdp_put_buff()
2043 page_pool_put_page(rxq->page_pool, virt_to_head_page(xdp->data), in mvneta_xdp_put_buff()
2055 if (txq->count >= txq->tx_stop_threshold) in mvneta_xdp_submit_frame()
2060 buf = &txq->buf[txq->txq_put_index]; in mvneta_xdp_submit_frame()
2063 dma_addr = dma_map_single(pp->dev->dev.parent, xdpf->data, in mvneta_xdp_submit_frame()
2064 xdpf->len, DMA_TO_DEVICE); in mvneta_xdp_submit_frame()
2065 if (dma_mapping_error(pp->dev->dev.parent, dma_addr)) { in mvneta_xdp_submit_frame()
2069 buf->type = MVNETA_TYPE_XDP_NDO; in mvneta_xdp_submit_frame()
2071 struct page *page = virt_to_page(xdpf->data); in mvneta_xdp_submit_frame()
2074 sizeof(*xdpf) + xdpf->headroom; in mvneta_xdp_submit_frame()
2075 dma_sync_single_for_device(pp->dev->dev.parent, dma_addr, in mvneta_xdp_submit_frame()
2076 xdpf->len, DMA_BIDIRECTIONAL); in mvneta_xdp_submit_frame()
2077 buf->type = MVNETA_TYPE_XDP_TX; in mvneta_xdp_submit_frame()
2079 buf->xdpf = xdpf; in mvneta_xdp_submit_frame()
2081 tx_desc->command = MVNETA_TXD_FLZ_DESC; in mvneta_xdp_submit_frame()
2082 tx_desc->buf_phys_addr = dma_addr; in mvneta_xdp_submit_frame()
2083 tx_desc->data_size = xdpf->len; in mvneta_xdp_submit_frame()
2086 txq->pending++; in mvneta_xdp_submit_frame()
2087 txq->count++; in mvneta_xdp_submit_frame()
2095 struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); in mvneta_xdp_xmit_back()
2107 txq = &pp->txqs[cpu % txq_number]; in mvneta_xdp_xmit_back()
2108 nq = netdev_get_tx_queue(pp->dev, txq->id); in mvneta_xdp_xmit_back()
2113 u64_stats_update_begin(&stats->syncp); in mvneta_xdp_xmit_back()
2114 stats->es.ps.tx_bytes += xdpf->len; in mvneta_xdp_xmit_back()
2115 stats->es.ps.tx_packets++; in mvneta_xdp_xmit_back()
2116 stats->es.ps.xdp_tx++; in mvneta_xdp_xmit_back()
2117 u64_stats_update_end(&stats->syncp); in mvneta_xdp_xmit_back()
2121 u64_stats_update_begin(&stats->syncp); in mvneta_xdp_xmit_back()
2122 stats->es.ps.xdp_tx_err++; in mvneta_xdp_xmit_back()
2123 u64_stats_update_end(&stats->syncp); in mvneta_xdp_xmit_back()
2135 struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); in mvneta_xdp_xmit()
2142 if (unlikely(test_bit(__MVNETA_DOWN, &pp->state))) in mvneta_xdp_xmit()
2143 return -ENETDOWN; in mvneta_xdp_xmit()
2146 return -EINVAL; in mvneta_xdp_xmit()
2148 txq = &pp->txqs[cpu % txq_number]; in mvneta_xdp_xmit()
2149 nq = netdev_get_tx_queue(pp->dev, txq->id); in mvneta_xdp_xmit()
2157 nxmit_byte += frames[i]->len; in mvneta_xdp_xmit()
2165 u64_stats_update_begin(&stats->syncp); in mvneta_xdp_xmit()
2166 stats->es.ps.tx_bytes += nxmit_byte; in mvneta_xdp_xmit()
2167 stats->es.ps.tx_packets += nxmit; in mvneta_xdp_xmit()
2168 stats->es.ps.xdp_xmit += nxmit; in mvneta_xdp_xmit()
2169 stats->es.ps.xdp_xmit_err += num_frame - nxmit; in mvneta_xdp_xmit()
2170 u64_stats_update_end(&stats->syncp); in mvneta_xdp_xmit()
2184 len = xdp->data_end - xdp->data_hard_start - pp->rx_offset_correction; in mvneta_run_xdp()
2185 data_len = xdp->data_end - xdp->data; in mvneta_run_xdp()
2189 sync = xdp->data_end - xdp->data_hard_start - pp->rx_offset_correction; in mvneta_run_xdp()
2194 stats->xdp_pass++; in mvneta_run_xdp()
2199 err = xdp_do_redirect(pp->dev, xdp, prog); in mvneta_run_xdp()
2205 stats->xdp_redirect++; in mvneta_run_xdp()
2218 trace_xdp_exception(pp->dev, prog, act); in mvneta_run_xdp()
2223 stats->xdp_drop++; in mvneta_run_xdp()
2227 stats->rx_bytes += frame_sz + xdp->data_end - xdp->data - data_len; in mvneta_run_xdp()
2228 stats->rx_packets++; in mvneta_run_xdp()
2241 int data_len = -MVNETA_MH_SIZE, len; in mvneta_swbm_rx_frame()
2242 struct net_device *dev = pp->dev; in mvneta_swbm_rx_frame()
2251 data_len += len - ETH_FCS_LEN; in mvneta_swbm_rx_frame()
2253 *size = *size - len; in mvneta_swbm_rx_frame()
2255 dma_dir = page_pool_get_dma_dir(rxq->page_pool); in mvneta_swbm_rx_frame()
2256 dma_sync_single_for_cpu(dev->dev.parent, in mvneta_swbm_rx_frame()
2257 rx_desc->buf_phys_addr, in mvneta_swbm_rx_frame()
2260 rx_desc->buf_phys_addr = 0; in mvneta_swbm_rx_frame()
2264 xdp_prepare_buff(xdp, data, pp->rx_offset_correction + MVNETA_MH_SIZE, in mvneta_swbm_rx_frame()
2268 sinfo->nr_frags = 0; in mvneta_swbm_rx_frame()
2279 struct net_device *dev = pp->dev; in mvneta_swbm_add_rx_fragment()
2288 data_len = len - ETH_FCS_LEN; in mvneta_swbm_add_rx_fragment()
2290 dma_dir = page_pool_get_dma_dir(rxq->page_pool); in mvneta_swbm_add_rx_fragment()
2291 dma_sync_single_for_cpu(dev->dev.parent, in mvneta_swbm_add_rx_fragment()
2292 rx_desc->buf_phys_addr, in mvneta_swbm_add_rx_fragment()
2294 rx_desc->buf_phys_addr = 0; in mvneta_swbm_add_rx_fragment()
2296 if (data_len > 0 && xdp_sinfo->nr_frags < MAX_SKB_FRAGS) { in mvneta_swbm_add_rx_fragment()
2297 skb_frag_t *frag = &xdp_sinfo->frags[xdp_sinfo->nr_frags++]; in mvneta_swbm_add_rx_fragment()
2299 skb_frag_off_set(frag, pp->rx_offset_correction); in mvneta_swbm_add_rx_fragment()
2303 page_pool_put_full_page(rxq->page_pool, page, true); in mvneta_swbm_add_rx_fragment()
2311 sinfo->nr_frags = xdp_sinfo->nr_frags; in mvneta_swbm_add_rx_fragment()
2312 memcpy(sinfo->frags, xdp_sinfo->frags, in mvneta_swbm_add_rx_fragment()
2313 sinfo->nr_frags * sizeof(skb_frag_t)); in mvneta_swbm_add_rx_fragment()
2315 *size -= len; in mvneta_swbm_add_rx_fragment()
2323 int i, num_frags = sinfo->nr_frags; in mvneta_swbm_build_skb()
2326 skb = build_skb(xdp->data_hard_start, PAGE_SIZE); in mvneta_swbm_build_skb()
2328 return ERR_PTR(-ENOMEM); in mvneta_swbm_build_skb()
2332 skb_reserve(skb, xdp->data - xdp->data_hard_start); in mvneta_swbm_build_skb()
2333 skb_put(skb, xdp->data_end - xdp->data); in mvneta_swbm_build_skb()
2334 skb->ip_summed = mvneta_rx_csum(pp, desc_status); in mvneta_swbm_build_skb()
2337 skb_frag_t *frag = &sinfo->frags[i]; in mvneta_swbm_build_skb()
2339 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, in mvneta_swbm_build_skb()
2353 struct net_device *dev = pp->dev; in mvneta_rx_swbm()
2360 xdp_init_buff(&xdp_buf, PAGE_SIZE, &rxq->xdp_rxq); in mvneta_rx_swbm()
2368 xdp_prog = READ_ONCE(pp->xdp_prog); in mvneta_rx_swbm()
2377 index = rx_desc - rxq->descs; in mvneta_rx_swbm()
2378 page = (struct page *)rxq->buf_virt_addr[index]; in mvneta_rx_swbm()
2380 rx_status = rx_desc->status; in mvneta_rx_swbm()
2382 rxq->refill_num++; in mvneta_rx_swbm()
2391 size = rx_desc->data_size; in mvneta_rx_swbm()
2392 frame_sz = size - ETH_FCS_LEN; in mvneta_rx_swbm()
2399 rx_desc->buf_phys_addr = 0; in mvneta_rx_swbm()
2400 page_pool_put_full_page(rxq->page_pool, page, in mvneta_rx_swbm()
2414 mvneta_xdp_put_buff(pp, rxq, &xdp_buf, &sinfo, -1); in mvneta_rx_swbm()
2422 skb = mvneta_swbm_build_skb(pp, rxq->page_pool, &xdp_buf, desc_status); in mvneta_rx_swbm()
2424 struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); in mvneta_rx_swbm()
2426 mvneta_xdp_put_buff(pp, rxq, &xdp_buf, &sinfo, -1); in mvneta_rx_swbm()
2428 u64_stats_update_begin(&stats->syncp); in mvneta_rx_swbm()
2429 stats->es.skb_alloc_error++; in mvneta_rx_swbm()
2430 stats->rx_dropped++; in mvneta_rx_swbm()
2431 u64_stats_update_end(&stats->syncp); in mvneta_rx_swbm()
2436 ps.rx_bytes += skb->len; in mvneta_rx_swbm()
2439 skb->protocol = eth_type_trans(skb, dev); in mvneta_rx_swbm()
2447 mvneta_xdp_put_buff(pp, rxq, &xdp_buf, &sinfo, -1); in mvneta_rx_swbm()
2469 struct net_device *dev = pp->dev; in mvneta_rx_hwbm()
2494 rx_status = rx_desc->status; in mvneta_rx_hwbm()
2495 rx_bytes = rx_desc->data_size - (ETH_FCS_LEN + MVNETA_MH_SIZE); in mvneta_rx_hwbm()
2496 data = (u8 *)(uintptr_t)rx_desc->buf_cookie; in mvneta_rx_hwbm()
2497 phys_addr = rx_desc->buf_phys_addr; in mvneta_rx_hwbm()
2499 bm_pool = &pp->bm_priv->bm_pools[pool_id]; in mvneta_rx_hwbm()
2505 mvneta_bm_pool_put_bp(pp->bm_priv, bm_pool, in mvneta_rx_hwbm()
2506 rx_desc->buf_phys_addr); in mvneta_rx_hwbm()
2519 dma_sync_single_range_for_cpu(&pp->bm_priv->pdev->dev, in mvneta_rx_hwbm()
2520 rx_desc->buf_phys_addr, in mvneta_rx_hwbm()
2527 skb->protocol = eth_type_trans(skb, dev); in mvneta_rx_hwbm()
2528 skb->ip_summed = mvneta_rx_csum(pp, rx_status); in mvneta_rx_hwbm()
2535 mvneta_bm_pool_put_bp(pp->bm_priv, bm_pool, in mvneta_rx_hwbm()
2536 rx_desc->buf_phys_addr); in mvneta_rx_hwbm()
2543 err = hwbm_pool_refill(&bm_pool->hwbm_pool, GFP_ATOMIC); in mvneta_rx_hwbm()
2547 netdev_err(dev, "Linux processing - Can't refill\n"); in mvneta_rx_hwbm()
2549 stats = this_cpu_ptr(pp->stats); in mvneta_rx_hwbm()
2550 u64_stats_update_begin(&stats->syncp); in mvneta_rx_hwbm()
2551 stats->es.refill_error++; in mvneta_rx_hwbm()
2552 u64_stats_update_end(&stats->syncp); in mvneta_rx_hwbm()
2557 frag_size = bm_pool->hwbm_pool.frag_size; in mvneta_rx_hwbm()
2564 dma_unmap_single(&pp->bm_priv->pdev->dev, phys_addr, in mvneta_rx_hwbm()
2565 bm_pool->buf_size, DMA_FROM_DEVICE); in mvneta_rx_hwbm()
2576 skb->protocol = eth_type_trans(skb, dev); in mvneta_rx_hwbm()
2577 skb->ip_summed = mvneta_rx_csum(pp, rx_status); in mvneta_rx_hwbm()
2583 struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); in mvneta_rx_hwbm()
2585 u64_stats_update_begin(&stats->syncp); in mvneta_rx_hwbm()
2586 stats->es.ps.rx_packets += rcvd_pkts; in mvneta_rx_hwbm()
2587 stats->es.ps.rx_bytes += rcvd_bytes; in mvneta_rx_hwbm()
2588 u64_stats_update_end(&stats->syncp); in mvneta_rx_hwbm()
2602 struct mvneta_tx_buf *buf = &txq->buf[txq->txq_put_index]; in mvneta_tso_put_hdr()
2606 tx_desc->data_size = hdr_len; in mvneta_tso_put_hdr()
2607 tx_desc->command = mvneta_skb_tx_csum(pp, skb); in mvneta_tso_put_hdr()
2608 tx_desc->command |= MVNETA_TXD_F_DESC; in mvneta_tso_put_hdr()
2609 tx_desc->buf_phys_addr = txq->tso_hdrs_phys + in mvneta_tso_put_hdr()
2610 txq->txq_put_index * TSO_HEADER_SIZE; in mvneta_tso_put_hdr()
2611 buf->type = MVNETA_TYPE_SKB; in mvneta_tso_put_hdr()
2612 buf->skb = NULL; in mvneta_tso_put_hdr()
2622 struct mvneta_tx_buf *buf = &txq->buf[txq->txq_put_index]; in mvneta_tso_put_data()
2626 tx_desc->data_size = size; in mvneta_tso_put_data()
2627 tx_desc->buf_phys_addr = dma_map_single(dev->dev.parent, data, in mvneta_tso_put_data()
2629 if (unlikely(dma_mapping_error(dev->dev.parent, in mvneta_tso_put_data()
2630 tx_desc->buf_phys_addr))) { in mvneta_tso_put_data()
2632 return -ENOMEM; in mvneta_tso_put_data()
2635 tx_desc->command = 0; in mvneta_tso_put_data()
2636 buf->type = MVNETA_TYPE_SKB; in mvneta_tso_put_data()
2637 buf->skb = NULL; in mvneta_tso_put_data()
2641 tx_desc->command = MVNETA_TXD_L_DESC; in mvneta_tso_put_data()
2645 buf->skb = skb; in mvneta_tso_put_data()
2661 if ((txq->count + tso_count_descs(skb)) >= txq->size) in mvneta_tx_tso()
2672 total_len = skb->len - hdr_len; in mvneta_tx_tso()
2676 data_left = min_t(int, skb_shinfo(skb)->gso_size, total_len); in mvneta_tx_tso()
2677 total_len -= data_left; in mvneta_tx_tso()
2681 hdr = txq->tso_hdrs + txq->txq_put_index * TSO_HEADER_SIZE; in mvneta_tx_tso()
2697 data_left -= size; in mvneta_tx_tso()
2707 * be DMA-unmapped. in mvneta_tx_tso()
2709 for (i = desc_count - 1; i >= 0; i--) { in mvneta_tx_tso()
2710 struct mvneta_tx_desc *tx_desc = txq->descs + i; in mvneta_tx_tso()
2711 if (!IS_TSO_HEADER(txq, tx_desc->buf_phys_addr)) in mvneta_tx_tso()
2712 dma_unmap_single(pp->dev->dev.parent, in mvneta_tx_tso()
2713 tx_desc->buf_phys_addr, in mvneta_tx_tso()
2714 tx_desc->data_size, in mvneta_tx_tso()
2721 /* Handle tx fragmentation processing */
2726 int i, nr_frags = skb_shinfo(skb)->nr_frags; in mvneta_tx_frag_process()
2729 struct mvneta_tx_buf *buf = &txq->buf[txq->txq_put_index]; in mvneta_tx_frag_process()
2730 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in mvneta_tx_frag_process()
2734 tx_desc->data_size = skb_frag_size(frag); in mvneta_tx_frag_process()
2736 tx_desc->buf_phys_addr = in mvneta_tx_frag_process()
2737 dma_map_single(pp->dev->dev.parent, addr, in mvneta_tx_frag_process()
2738 tx_desc->data_size, DMA_TO_DEVICE); in mvneta_tx_frag_process()
2740 if (dma_mapping_error(pp->dev->dev.parent, in mvneta_tx_frag_process()
2741 tx_desc->buf_phys_addr)) { in mvneta_tx_frag_process()
2746 if (i == nr_frags - 1) { in mvneta_tx_frag_process()
2748 tx_desc->command = MVNETA_TXD_L_DESC | MVNETA_TXD_Z_PAD; in mvneta_tx_frag_process()
2749 buf->skb = skb; in mvneta_tx_frag_process()
2752 tx_desc->command = 0; in mvneta_tx_frag_process()
2753 buf->skb = NULL; in mvneta_tx_frag_process()
2755 buf->type = MVNETA_TYPE_SKB; in mvneta_tx_frag_process()
2765 for (i = i - 1; i >= 0; i--) { in mvneta_tx_frag_process()
2766 tx_desc = txq->descs + i; in mvneta_tx_frag_process()
2767 dma_unmap_single(pp->dev->dev.parent, in mvneta_tx_frag_process()
2768 tx_desc->buf_phys_addr, in mvneta_tx_frag_process()
2769 tx_desc->data_size, in mvneta_tx_frag_process()
2774 return -ENOMEM; in mvneta_tx_frag_process()
2777 /* Main tx processing */
2782 struct mvneta_tx_queue *txq = &pp->txqs[txq_id]; in mvneta_tx()
2783 struct mvneta_tx_buf *buf = &txq->buf[txq->txq_put_index]; in mvneta_tx()
2785 int len = skb->len; in mvneta_tx()
2797 frags = skb_shinfo(skb)->nr_frags + 1; in mvneta_tx()
2804 tx_desc->data_size = skb_headlen(skb); in mvneta_tx()
2806 tx_desc->buf_phys_addr = dma_map_single(dev->dev.parent, skb->data, in mvneta_tx()
2807 tx_desc->data_size, in mvneta_tx()
2809 if (unlikely(dma_mapping_error(dev->dev.parent, in mvneta_tx()
2810 tx_desc->buf_phys_addr))) { in mvneta_tx()
2816 buf->type = MVNETA_TYPE_SKB; in mvneta_tx()
2820 tx_desc->command = tx_cmd; in mvneta_tx()
2821 buf->skb = skb; in mvneta_tx()
2826 buf->skb = NULL; in mvneta_tx()
2828 tx_desc->command = tx_cmd; in mvneta_tx()
2831 dma_unmap_single(dev->dev.parent, in mvneta_tx()
2832 tx_desc->buf_phys_addr, in mvneta_tx()
2833 tx_desc->data_size, in mvneta_tx()
2844 struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); in mvneta_tx()
2848 txq->count += frags; in mvneta_tx()
2849 if (txq->count >= txq->tx_stop_threshold) in mvneta_tx()
2853 txq->pending + frags > MVNETA_TXQ_DEC_SENT_MASK) in mvneta_tx()
2856 txq->pending += frags; in mvneta_tx()
2858 u64_stats_update_begin(&stats->syncp); in mvneta_tx()
2859 stats->es.ps.tx_bytes += len; in mvneta_tx()
2860 stats->es.ps.tx_packets++; in mvneta_tx()
2861 u64_stats_update_end(&stats->syncp); in mvneta_tx()
2863 dev->stats.tx_dropped++; in mvneta_tx()
2871 /* Free tx resources, when resetting a port */
2876 struct netdev_queue *nq = netdev_get_tx_queue(pp->dev, txq->id); in mvneta_txq_done_force()
2877 int tx_done = txq->count; in mvneta_txq_done_force()
2882 txq->count = 0; in mvneta_txq_done_force()
2883 txq->txq_put_index = 0; in mvneta_txq_done_force()
2884 txq->txq_get_index = 0; in mvneta_txq_done_force()
2887 /* Handle tx done - called in softirq context. The <cause_tx_done> argument
2899 nq = netdev_get_tx_queue(pp->dev, txq->id); in mvneta_tx_done_gbe()
2902 if (txq->count) in mvneta_tx_done_gbe()
2906 cause_tx_done &= ~((1 << txq->id)); in mvneta_tx_done_gbe()
2922 for (j = 7; j >= 0; j--) { in mvneta_addr_crc()
2933 * 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0xFF).
2935 * Table entries in the DA-Filter table. This method set the Special
2954 if (queue == -1) in mvneta_set_special_mcast_addr()
2967 * A CRC-8 is used as an index to the Other Multicast Table entries
2968 * in the DA-Filter table.
2969 * The method gets the CRC-8 value from the calling routine and
2971 * specified CRC-8 .
2986 if (queue == -1) { in mvneta_set_other_mcast_addr()
2999 * 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0xFF).
3001 * Table entries in the DA-Filter table.
3002 * 2) Other Multicast Table for multicast of another type. A CRC-8 value
3004 * DA-Filter table.
3017 if (queue == -1) { in mvneta_mcast_addr_set()
3018 if (pp->mcast_count[crc_result] == 0) { in mvneta_mcast_addr_set()
3019 netdev_info(pp->dev, "No valid Mcast for crc8=0x%02x\n", in mvneta_mcast_addr_set()
3021 return -EINVAL; in mvneta_mcast_addr_set()
3024 pp->mcast_count[crc_result]--; in mvneta_mcast_addr_set()
3025 if (pp->mcast_count[crc_result] != 0) { in mvneta_mcast_addr_set()
3026 netdev_info(pp->dev, in mvneta_mcast_addr_set()
3028 pp->mcast_count[crc_result], crc_result); in mvneta_mcast_addr_set()
3029 return -EINVAL; in mvneta_mcast_addr_set()
3032 pp->mcast_count[crc_result]++; in mvneta_mcast_addr_set()
3072 if (dev->flags & IFF_PROMISC) { in mvneta_set_rx_mode()
3075 mvneta_set_ucast_table(pp, pp->rxq_def); in mvneta_set_rx_mode()
3076 mvneta_set_special_mcast_table(pp, pp->rxq_def); in mvneta_set_rx_mode()
3077 mvneta_set_other_mcast_table(pp, pp->rxq_def); in mvneta_set_rx_mode()
3081 mvneta_set_ucast_table(pp, -1); in mvneta_set_rx_mode()
3082 mvneta_mac_addr_set(pp, dev->dev_addr, pp->rxq_def); in mvneta_set_rx_mode()
3084 if (dev->flags & IFF_ALLMULTI) { in mvneta_set_rx_mode()
3086 mvneta_set_special_mcast_table(pp, pp->rxq_def); in mvneta_set_rx_mode()
3087 mvneta_set_other_mcast_table(pp, pp->rxq_def); in mvneta_set_rx_mode()
3090 mvneta_set_special_mcast_table(pp, -1); in mvneta_set_rx_mode()
3091 mvneta_set_other_mcast_table(pp, -1); in mvneta_set_rx_mode()
3095 mvneta_mcast_addr_set(pp, ha->addr, in mvneta_set_rx_mode()
3096 pp->rxq_def); in mvneta_set_rx_mode()
3103 /* Interrupt handling - the callback for request_irq() */
3109 napi_schedule(&pp->napi); in mvneta_isr()
3114 /* Interrupt handling - the callback for request_percpu_irq() */
3119 disable_percpu_irq(port->pp->dev->irq); in mvneta_percpu_isr()
3120 napi_schedule(&port->napi); in mvneta_percpu_isr()
3129 phylink_mac_change(pp->phylink, !!(gmac_stat & MVNETA_GMAC_LINK_UP)); in mvneta_link_change()
3133 * Bits 0 - 7 of the causeRxTx register indicate that are transmitted
3134 * packets on the corresponding TXQ (Bit 0 is for TX queue 1).
3135 * Bits 8 -15 of the cause Rx Tx register indicate that are received
3144 struct mvneta_port *pp = netdev_priv(napi->dev); in mvneta_poll()
3145 struct mvneta_pcpu_port *port = this_cpu_ptr(pp->ports); in mvneta_poll()
3147 if (!netif_running(pp->dev)) { in mvneta_poll()
3164 /* Release Tx descriptors */ in mvneta_poll()
3173 cause_rx_tx |= pp->neta_armada3700 ? pp->cause_rx_tx : in mvneta_poll()
3174 port->cause_rx_tx; in mvneta_poll()
3178 rx_queue = rx_queue - 1; in mvneta_poll()
3179 if (pp->bm_priv) in mvneta_poll()
3181 &pp->rxqs[rx_queue]); in mvneta_poll()
3184 &pp->rxqs[rx_queue]); in mvneta_poll()
3191 if (pp->neta_armada3700) { in mvneta_poll()
3201 enable_percpu_irq(pp->dev->irq, 0); in mvneta_poll()
3205 if (pp->neta_armada3700) in mvneta_poll()
3206 pp->cause_rx_tx = cause_rx_tx; in mvneta_poll()
3208 port->cause_rx_tx = cause_rx_tx; in mvneta_poll()
3216 struct bpf_prog *xdp_prog = READ_ONCE(pp->xdp_prog); in mvneta_create_page_pool()
3222 .dev = pp->dev->dev.parent, in mvneta_create_page_pool()
3224 .offset = pp->rx_offset_correction, in mvneta_create_page_pool()
3229 rxq->page_pool = page_pool_create(&pp_params); in mvneta_create_page_pool()
3230 if (IS_ERR(rxq->page_pool)) { in mvneta_create_page_pool()
3231 err = PTR_ERR(rxq->page_pool); in mvneta_create_page_pool()
3232 rxq->page_pool = NULL; in mvneta_create_page_pool()
3236 err = xdp_rxq_info_reg(&rxq->xdp_rxq, pp->dev, rxq->id, 0); in mvneta_create_page_pool()
3240 err = xdp_rxq_info_reg_mem_model(&rxq->xdp_rxq, MEM_TYPE_PAGE_POOL, in mvneta_create_page_pool()
3241 rxq->page_pool); in mvneta_create_page_pool()
3248 xdp_rxq_info_unreg(&rxq->xdp_rxq); in mvneta_create_page_pool()
3250 page_pool_destroy(rxq->page_pool); in mvneta_create_page_pool()
3251 rxq->page_pool = NULL; in mvneta_create_page_pool()
3266 memset(rxq->descs + i, 0, sizeof(struct mvneta_rx_desc)); in mvneta_rxq_fill()
3267 if (mvneta_rx_refill(pp, rxq->descs + i, rxq, in mvneta_rxq_fill()
3269 netdev_err(pp->dev, in mvneta_rxq_fill()
3271 __func__, rxq->id, i, num); in mvneta_rxq_fill()
3284 /* Free all packets pending transmit from all TXQs and reset TX port */
3289 /* free the skb's in the tx ring */ in mvneta_tx_reset()
3291 mvneta_txq_done_force(pp, &pp->txqs[queue]); in mvneta_tx_reset()
3303 /* Rx/Tx queue initialization/cleanup methods */
3308 rxq->size = pp->rx_ring_size; in mvneta_rxq_sw_init()
3311 rxq->descs = dma_alloc_coherent(pp->dev->dev.parent, in mvneta_rxq_sw_init()
3312 rxq->size * MVNETA_DESC_ALIGNED_SIZE, in mvneta_rxq_sw_init()
3313 &rxq->descs_phys, GFP_KERNEL); in mvneta_rxq_sw_init()
3314 if (!rxq->descs) in mvneta_rxq_sw_init()
3315 return -ENOMEM; in mvneta_rxq_sw_init()
3317 rxq->last_desc = rxq->size - 1; in mvneta_rxq_sw_init()
3326 mvreg_write(pp, MVNETA_RXQ_BASE_ADDR_REG(rxq->id), rxq->descs_phys); in mvneta_rxq_hw_init()
3327 mvreg_write(pp, MVNETA_RXQ_SIZE_REG(rxq->id), rxq->size); in mvneta_rxq_hw_init()
3330 mvneta_rx_pkts_coal_set(pp, rxq, rxq->pkts_coal); in mvneta_rxq_hw_init()
3331 mvneta_rx_time_coal_set(pp, rxq, rxq->time_coal); in mvneta_rxq_hw_init()
3333 if (!pp->bm_priv) { in mvneta_rxq_hw_init()
3338 MVNETA_RX_BUF_SIZE(pp->pkt_size)); in mvneta_rxq_hw_init()
3340 mvneta_rxq_fill(pp, rxq, rxq->size); in mvneta_rxq_hw_init()
3344 NET_SKB_PAD - pp->rx_offset_correction); in mvneta_rxq_hw_init()
3350 mvneta_rxq_non_occup_desc_add(pp, rxq, rxq->size); in mvneta_rxq_hw_init()
3376 if (rxq->descs) in mvneta_rxq_deinit()
3377 dma_free_coherent(pp->dev->dev.parent, in mvneta_rxq_deinit()
3378 rxq->size * MVNETA_DESC_ALIGNED_SIZE, in mvneta_rxq_deinit()
3379 rxq->descs, in mvneta_rxq_deinit()
3380 rxq->descs_phys); in mvneta_rxq_deinit()
3382 rxq->descs = NULL; in mvneta_rxq_deinit()
3383 rxq->last_desc = 0; in mvneta_rxq_deinit()
3384 rxq->next_desc_to_proc = 0; in mvneta_rxq_deinit()
3385 rxq->descs_phys = 0; in mvneta_rxq_deinit()
3386 rxq->first_to_refill = 0; in mvneta_rxq_deinit()
3387 rxq->refill_num = 0; in mvneta_rxq_deinit()
3395 txq->size = pp->tx_ring_size; in mvneta_txq_sw_init()
3401 txq->tx_stop_threshold = txq->size - MVNETA_MAX_SKB_DESCS; in mvneta_txq_sw_init()
3402 txq->tx_wake_threshold = txq->tx_stop_threshold / 2; in mvneta_txq_sw_init()
3404 /* Allocate memory for TX descriptors */ in mvneta_txq_sw_init()
3405 txq->descs = dma_alloc_coherent(pp->dev->dev.parent, in mvneta_txq_sw_init()
3406 txq->size * MVNETA_DESC_ALIGNED_SIZE, in mvneta_txq_sw_init()
3407 &txq->descs_phys, GFP_KERNEL); in mvneta_txq_sw_init()
3408 if (!txq->descs) in mvneta_txq_sw_init()
3409 return -ENOMEM; in mvneta_txq_sw_init()
3411 txq->last_desc = txq->size - 1; in mvneta_txq_sw_init()
3413 txq->buf = kmalloc_array(txq->size, sizeof(*txq->buf), GFP_KERNEL); in mvneta_txq_sw_init()
3414 if (!txq->buf) in mvneta_txq_sw_init()
3415 return -ENOMEM; in mvneta_txq_sw_init()
3418 txq->tso_hdrs = dma_alloc_coherent(pp->dev->dev.parent, in mvneta_txq_sw_init()
3419 txq->size * TSO_HEADER_SIZE, in mvneta_txq_sw_init()
3420 &txq->tso_hdrs_phys, GFP_KERNEL); in mvneta_txq_sw_init()
3421 if (!txq->tso_hdrs) in mvneta_txq_sw_init()
3422 return -ENOMEM; in mvneta_txq_sw_init()
3425 if (pp->neta_armada3700) in mvneta_txq_sw_init()
3428 cpu = txq->id % num_present_cpus(); in mvneta_txq_sw_init()
3430 cpu = pp->rxq_def % num_present_cpus(); in mvneta_txq_sw_init()
3431 cpumask_set_cpu(cpu, &txq->affinity_mask); in mvneta_txq_sw_init()
3432 netif_set_xps_queue(pp->dev, &txq->affinity_mask, txq->id); in mvneta_txq_sw_init()
3441 mvreg_write(pp, MVETH_TXQ_TOKEN_CFG_REG(txq->id), 0x03ffffff); in mvneta_txq_hw_init()
3442 mvreg_write(pp, MVETH_TXQ_TOKEN_COUNT_REG(txq->id), 0x3fffffff); in mvneta_txq_hw_init()
3444 /* Set Tx descriptors queue starting address */ in mvneta_txq_hw_init()
3445 mvreg_write(pp, MVNETA_TXQ_BASE_ADDR_REG(txq->id), txq->descs_phys); in mvneta_txq_hw_init()
3446 mvreg_write(pp, MVNETA_TXQ_SIZE_REG(txq->id), txq->size); in mvneta_txq_hw_init()
3448 mvneta_tx_done_pkts_coal_set(pp, txq, txq->done_pkts_coal); in mvneta_txq_hw_init()
3451 /* Create and initialize a tx queue */
3470 struct netdev_queue *nq = netdev_get_tx_queue(pp->dev, txq->id); in mvneta_txq_sw_deinit()
3472 kfree(txq->buf); in mvneta_txq_sw_deinit()
3474 if (txq->tso_hdrs) in mvneta_txq_sw_deinit()
3475 dma_free_coherent(pp->dev->dev.parent, in mvneta_txq_sw_deinit()
3476 txq->size * TSO_HEADER_SIZE, in mvneta_txq_sw_deinit()
3477 txq->tso_hdrs, txq->tso_hdrs_phys); in mvneta_txq_sw_deinit()
3478 if (txq->descs) in mvneta_txq_sw_deinit()
3479 dma_free_coherent(pp->dev->dev.parent, in mvneta_txq_sw_deinit()
3480 txq->size * MVNETA_DESC_ALIGNED_SIZE, in mvneta_txq_sw_deinit()
3481 txq->descs, txq->descs_phys); in mvneta_txq_sw_deinit()
3485 txq->descs = NULL; in mvneta_txq_sw_deinit()
3486 txq->last_desc = 0; in mvneta_txq_sw_deinit()
3487 txq->next_desc_to_proc = 0; in mvneta_txq_sw_deinit()
3488 txq->descs_phys = 0; in mvneta_txq_sw_deinit()
3495 mvreg_write(pp, MVETH_TXQ_TOKEN_CFG_REG(txq->id), 0); in mvneta_txq_hw_deinit()
3496 mvreg_write(pp, MVETH_TXQ_TOKEN_COUNT_REG(txq->id), 0); in mvneta_txq_hw_deinit()
3498 /* Set Tx descriptors queue starting address and size */ in mvneta_txq_hw_deinit()
3499 mvreg_write(pp, MVNETA_TXQ_BASE_ADDR_REG(txq->id), 0); in mvneta_txq_hw_deinit()
3500 mvreg_write(pp, MVNETA_TXQ_SIZE_REG(txq->id), 0); in mvneta_txq_hw_deinit()
3510 /* Cleanup all Tx queues */
3516 mvneta_txq_deinit(pp, &pp->txqs[queue]); in mvneta_cleanup_txqs()
3525 mvneta_rxq_deinit(pp, &pp->rxqs[queue]); in mvneta_cleanup_rxqs()
3535 int err = mvneta_rxq_init(pp, &pp->rxqs[queue]); in mvneta_setup_rxqs()
3538 netdev_err(pp->dev, "%s: can't create rxq=%d\n", in mvneta_setup_rxqs()
3548 /* Init all tx queues */
3554 int err = mvneta_txq_init(pp, &pp->txqs[queue]); in mvneta_setup_txqs()
3556 netdev_err(pp->dev, "%s: can't create txq=%d\n", in mvneta_setup_txqs()
3570 ret = phy_set_mode_ext(pp->comphy, PHY_MODE_ETHERNET, interface); in mvneta_comphy_init()
3574 return phy_power_on(pp->comphy); in mvneta_comphy_init()
3582 if (pp->comphy) { in mvneta_config_interface()
3610 pp->phy_interface = interface; in mvneta_config_interface()
3619 WARN_ON(mvneta_config_interface(pp, pp->phy_interface)); in mvneta_start_dev()
3621 mvneta_max_rx_size_set(pp, pp->pkt_size); in mvneta_start_dev()
3622 mvneta_txq_max_tx_size_set(pp, pp->pkt_size); in mvneta_start_dev()
3624 /* start the Rx/Tx activity */ in mvneta_start_dev()
3627 if (!pp->neta_armada3700) { in mvneta_start_dev()
3631 per_cpu_ptr(pp->ports, cpu); in mvneta_start_dev()
3633 napi_enable(&port->napi); in mvneta_start_dev()
3636 napi_enable(&pp->napi); in mvneta_start_dev()
3646 phylink_start(pp->phylink); in mvneta_start_dev()
3649 phylink_speed_up(pp->phylink); in mvneta_start_dev()
3651 netif_tx_start_all_queues(pp->dev); in mvneta_start_dev()
3653 clear_bit(__MVNETA_DOWN, &pp->state); in mvneta_start_dev()
3660 set_bit(__MVNETA_DOWN, &pp->state); in mvneta_stop_dev()
3662 if (device_may_wakeup(&pp->dev->dev)) in mvneta_stop_dev()
3663 phylink_speed_down(pp->phylink, false); in mvneta_stop_dev()
3665 phylink_stop(pp->phylink); in mvneta_stop_dev()
3667 if (!pp->neta_armada3700) { in mvneta_stop_dev()
3670 per_cpu_ptr(pp->ports, cpu); in mvneta_stop_dev()
3672 napi_disable(&port->napi); in mvneta_stop_dev()
3675 napi_disable(&pp->napi); in mvneta_stop_dev()
3678 netif_carrier_off(pp->dev); in mvneta_stop_dev()
3681 netif_tx_stop_all_queues(pp->dev); in mvneta_stop_dev()
3695 WARN_ON(phy_power_off(pp->comphy)); in mvneta_stop_dev()
3702 enable_percpu_irq(pp->dev->irq, IRQ_TYPE_NONE); in mvneta_percpu_enable()
3709 disable_percpu_irq(pp->dev->irq); in mvneta_percpu_disable()
3724 if (pp->xdp_prog && mtu > MVNETA_MAX_RX_BUF_SIZE) { in mvneta_change_mtu()
3726 return -EINVAL; in mvneta_change_mtu()
3729 dev->mtu = mtu; in mvneta_change_mtu()
3732 if (pp->bm_priv) in mvneta_change_mtu()
3748 if (pp->bm_priv) in mvneta_change_mtu()
3751 pp->pkt_size = MVNETA_RX_PKT_SIZE(dev->mtu); in mvneta_change_mtu()
3778 if (pp->tx_csum_limit && dev->mtu > pp->tx_csum_limit) { in mvneta_fix_features()
3782 pp->tx_csum_limit); in mvneta_fix_features()
3814 mvneta_mac_addr_set(pp, dev->dev_addr, -1); in mvneta_set_mac_addr()
3817 mvneta_mac_addr_set(pp, sockaddr->sa_data, pp->rxq_def); in mvneta_set_mac_addr()
3827 struct net_device *ndev = to_net_dev(config->dev); in mvneta_validate()
3833 * "Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ... in mvneta_validate()
3834 * When <PortType> = 1 (1000BASE-X) this field must be set to 1." in mvneta_validate()
3836 if (phy_interface_mode_is_8023z(state->interface)) { in mvneta_validate()
3837 if (!phylink_test(state->advertising, Autoneg)) { in mvneta_validate()
3841 } else if (state->interface != PHY_INTERFACE_MODE_NA && in mvneta_validate()
3842 state->interface != PHY_INTERFACE_MODE_QSGMII && in mvneta_validate()
3843 state->interface != PHY_INTERFACE_MODE_SGMII && in mvneta_validate()
3844 !phy_interface_mode_is_rgmii(state->interface)) { in mvneta_validate()
3856 /* Half-duplex at speeds higher than 100Mbit is unsupported */ in mvneta_validate()
3857 if (pp->comphy || state->interface != PHY_INTERFACE_MODE_2500BASEX) { in mvneta_validate()
3861 if (pp->comphy || state->interface == PHY_INTERFACE_MODE_2500BASEX) { in mvneta_validate()
3866 if (!phy_interface_mode_is_8023z(state->interface)) { in mvneta_validate()
3867 /* 10M and 100M are only supported in non-802.3z mode */ in mvneta_validate()
3870 phylink_set(mask, 100baseT_Half); in mvneta_validate()
3871 phylink_set(mask, 100baseT_Full); in mvneta_validate()
3876 bitmap_and(state->advertising, state->advertising, mask, in mvneta_validate()
3888 struct net_device *ndev = to_net_dev(config->dev); in mvneta_mac_pcs_get_state()
3895 state->speed = in mvneta_mac_pcs_get_state()
3896 state->interface == PHY_INTERFACE_MODE_2500BASEX ? in mvneta_mac_pcs_get_state()
3899 state->speed = SPEED_100; in mvneta_mac_pcs_get_state()
3901 state->speed = SPEED_10; in mvneta_mac_pcs_get_state()
3903 state->an_complete = !!(gmac_stat & MVNETA_GMAC_AN_COMPLETE); in mvneta_mac_pcs_get_state()
3904 state->link = !!(gmac_stat & MVNETA_GMAC_LINK_UP); in mvneta_mac_pcs_get_state()
3905 state->duplex = !!(gmac_stat & MVNETA_GMAC_FULL_DUPLEX); in mvneta_mac_pcs_get_state()
3907 state->pause = 0; in mvneta_mac_pcs_get_state()
3909 state->pause |= MLO_PAUSE_RX; in mvneta_mac_pcs_get_state()
3911 state->pause |= MLO_PAUSE_TX; in mvneta_mac_pcs_get_state()
3916 struct net_device *ndev = to_net_dev(config->dev); in mvneta_mac_an_restart()
3929 struct net_device *ndev = to_net_dev(config->dev); in mvneta_mac_config()
3954 if (state->interface == PHY_INTERFACE_MODE_QSGMII || in mvneta_mac_config()
3955 state->interface == PHY_INTERFACE_MODE_SGMII || in mvneta_mac_config()
3956 phy_interface_mode_is_8023z(state->interface)) in mvneta_mac_config()
3959 if (phylink_test(state->advertising, Pause)) in mvneta_mac_config()
3963 /* Phy or fixed speed - nothing to do, leave the in mvneta_mac_config()
3964 * configured speed, duplex and flow control as-is. in mvneta_mac_config()
3966 } else if (state->interface == PHY_INTERFACE_MODE_SGMII) { in mvneta_mac_config()
3979 /* 802.3z negotiation - only 1000base-X */ in mvneta_mac_config()
3990 if (state->pause & MLO_PAUSE_AN && state->an_enabled) in mvneta_mac_config()
3995 * and in-band enable when the link is down, so force it down in mvneta_mac_config()
4010 if (state->interface == PHY_INTERFACE_MODE_2500BASEX) in mvneta_mac_config()
4013 if (pp->phy_interface != state->interface) { in mvneta_mac_config()
4014 if (pp->comphy) in mvneta_mac_config()
4015 WARN_ON(phy_power_off(pp->comphy)); in mvneta_mac_config()
4016 WARN_ON(mvneta_config_interface(pp, state->interface)); in mvneta_mac_config()
4052 struct net_device *ndev = to_net_dev(config->dev); in mvneta_mac_link_down()
4065 pp->eee_active = false; in mvneta_mac_link_down()
4075 struct net_device *ndev = to_net_dev(config->dev); in mvneta_mac_link_up()
4116 if (phy && pp->eee_enabled) { in mvneta_mac_link_up()
4117 pp->eee_active = phy_init_eee(phy, 0) >= 0; in mvneta_mac_link_up()
4118 mvneta_set_eee(pp, pp->eee_active && pp->tx_lpi_enabled); in mvneta_mac_link_up()
4134 int err = phylink_of_phy_connect(pp->phylink, pp->dn, 0); in mvneta_mdio_probe()
4137 netdev_err(pp->dev, "could not attach PHY: %d\n", err); in mvneta_mdio_probe()
4139 phylink_ethtool_get_wol(pp->phylink, &wol); in mvneta_mdio_probe()
4140 device_set_wakeup_capable(&pp->dev->dev, !!wol.supported); in mvneta_mdio_probe()
4144 device_set_wakeup_enable(&pp->dev->dev, !!wol.wolopts); in mvneta_mdio_probe()
4151 phylink_disconnect_phy(pp->phylink); in mvneta_mdio_remove()
4165 if (cpu_online(pp->rxq_def)) in mvneta_percpu_elect()
4166 elected_cpu = pp->rxq_def; in mvneta_percpu_elect()
4180 rxq_map |= MVNETA_CPU_RXQ_ACCESS(pp->rxq_def); in mvneta_percpu_elect()
4182 /* We update the TX queue map only if we have one in mvneta_percpu_elect()
4183 * queue. In this case we associate the TX queue to in mvneta_percpu_elect()
4210 struct mvneta_pcpu_port *port = per_cpu_ptr(pp->ports, cpu); in mvneta_cpu_online()
4212 /* Armada 3700's per-cpu interrupt for mvneta is broken, all interrupts in mvneta_cpu_online()
4213 * are routed to CPU 0, so we don't need all the cpu-hotplug support in mvneta_cpu_online()
4215 if (pp->neta_armada3700) in mvneta_cpu_online()
4218 spin_lock(&pp->lock); in mvneta_cpu_online()
4223 if (pp->is_stopped) { in mvneta_cpu_online()
4224 spin_unlock(&pp->lock); in mvneta_cpu_online()
4227 netif_tx_stop_all_queues(pp->dev); in mvneta_cpu_online()
4236 per_cpu_ptr(pp->ports, other_cpu); in mvneta_cpu_online()
4238 napi_synchronize(&other_port->napi); in mvneta_cpu_online()
4244 napi_enable(&port->napi); in mvneta_cpu_online()
4247 * Enable per-CPU interrupts on the CPU that is in mvneta_cpu_online()
4253 * Enable per-CPU interrupt on the one CPU we care in mvneta_cpu_online()
4263 netif_tx_start_all_queues(pp->dev); in mvneta_cpu_online()
4264 spin_unlock(&pp->lock); in mvneta_cpu_online()
4272 struct mvneta_pcpu_port *port = per_cpu_ptr(pp->ports, cpu); in mvneta_cpu_down_prepare()
4278 spin_lock(&pp->lock); in mvneta_cpu_down_prepare()
4281 spin_unlock(&pp->lock); in mvneta_cpu_down_prepare()
4283 napi_synchronize(&port->napi); in mvneta_cpu_down_prepare()
4284 napi_disable(&port->napi); in mvneta_cpu_down_prepare()
4285 /* Disable per-CPU interrupts on the CPU that is brought down. */ in mvneta_cpu_down_prepare()
4296 spin_lock(&pp->lock); in mvneta_cpu_dead()
4298 spin_unlock(&pp->lock); in mvneta_cpu_dead()
4304 netif_tx_start_all_queues(pp->dev); in mvneta_cpu_dead()
4313 pp->pkt_size = MVNETA_RX_PKT_SIZE(pp->dev->mtu); in mvneta_open()
4324 if (pp->neta_armada3700) in mvneta_open()
4325 ret = request_irq(pp->dev->irq, mvneta_isr, 0, in mvneta_open()
4326 dev->name, pp); in mvneta_open()
4328 ret = request_percpu_irq(pp->dev->irq, mvneta_percpu_isr, in mvneta_open()
4329 dev->name, pp->ports); in mvneta_open()
4331 netdev_err(pp->dev, "cannot request irq %d\n", pp->dev->irq); in mvneta_open()
4335 if (!pp->neta_armada3700) { in mvneta_open()
4336 /* Enable per-CPU interrupt on all the CPU to handle our RX in mvneta_open()
4341 pp->is_stopped = false; in mvneta_open()
4346 &pp->node_online); in mvneta_open()
4351 &pp->node_dead); in mvneta_open()
4367 if (!pp->neta_armada3700) in mvneta_open()
4369 &pp->node_dead); in mvneta_open()
4371 if (!pp->neta_armada3700) in mvneta_open()
4373 &pp->node_online); in mvneta_open()
4375 if (pp->neta_armada3700) { in mvneta_open()
4376 free_irq(pp->dev->irq, pp); in mvneta_open()
4379 free_percpu_irq(pp->dev->irq, pp->ports); in mvneta_open()
4393 if (!pp->neta_armada3700) { in mvneta_stop()
4399 spin_lock(&pp->lock); in mvneta_stop()
4400 pp->is_stopped = true; in mvneta_stop()
4401 spin_unlock(&pp->lock); in mvneta_stop()
4407 &pp->node_online); in mvneta_stop()
4409 &pp->node_dead); in mvneta_stop()
4411 free_percpu_irq(dev->irq, pp->ports); in mvneta_stop()
4415 free_irq(dev->irq, pp); in mvneta_stop()
4428 return phylink_mii_ioctl(pp->phylink, ifr, cmd); in mvneta_ioctl()
4438 if (prog && dev->mtu > MVNETA_MAX_RX_BUF_SIZE) { in mvneta_xdp_setup()
4440 return -EOPNOTSUPP; in mvneta_xdp_setup()
4443 if (pp->bm_priv) { in mvneta_xdp_setup()
4446 return -EOPNOTSUPP; in mvneta_xdp_setup()
4449 need_update = !!pp->xdp_prog != !!prog; in mvneta_xdp_setup()
4453 old_prog = xchg(&pp->xdp_prog, prog); in mvneta_xdp_setup()
4465 switch (xdp->command) { in mvneta_xdp()
4467 return mvneta_xdp_setup(dev, xdp->prog, xdp->extack); in mvneta_xdp()
4469 return -EINVAL; in mvneta_xdp()
4482 return phylink_ethtool_ksettings_set(pp->phylink, cmd); in mvneta_ethtool_set_link_ksettings()
4492 return phylink_ethtool_ksettings_get(pp->phylink, cmd); in mvneta_ethtool_get_link_ksettings()
4499 return phylink_ethtool_nway_reset(pp->phylink); in mvneta_ethtool_nway_reset()
4513 struct mvneta_rx_queue *rxq = &pp->rxqs[queue]; in mvneta_ethtool_set_coalesce()
4514 rxq->time_coal = c->rx_coalesce_usecs; in mvneta_ethtool_set_coalesce()
4515 rxq->pkts_coal = c->rx_max_coalesced_frames; in mvneta_ethtool_set_coalesce()
4516 mvneta_rx_pkts_coal_set(pp, rxq, rxq->pkts_coal); in mvneta_ethtool_set_coalesce()
4517 mvneta_rx_time_coal_set(pp, rxq, rxq->time_coal); in mvneta_ethtool_set_coalesce()
4521 struct mvneta_tx_queue *txq = &pp->txqs[queue]; in mvneta_ethtool_set_coalesce()
4522 txq->done_pkts_coal = c->tx_max_coalesced_frames; in mvneta_ethtool_set_coalesce()
4523 mvneta_tx_done_pkts_coal_set(pp, txq, txq->done_pkts_coal); in mvneta_ethtool_set_coalesce()
4538 c->rx_coalesce_usecs = pp->rxqs[0].time_coal; in mvneta_ethtool_get_coalesce()
4539 c->rx_max_coalesced_frames = pp->rxqs[0].pkts_coal; in mvneta_ethtool_get_coalesce()
4541 c->tx_max_coalesced_frames = pp->txqs[0].done_pkts_coal; in mvneta_ethtool_get_coalesce()
4549 strlcpy(drvinfo->driver, MVNETA_DRIVER_NAME, in mvneta_ethtool_get_drvinfo()
4550 sizeof(drvinfo->driver)); in mvneta_ethtool_get_drvinfo()
4551 strlcpy(drvinfo->version, MVNETA_DRIVER_VERSION, in mvneta_ethtool_get_drvinfo()
4552 sizeof(drvinfo->version)); in mvneta_ethtool_get_drvinfo()
4553 strlcpy(drvinfo->bus_info, dev_name(&dev->dev), in mvneta_ethtool_get_drvinfo()
4554 sizeof(drvinfo->bus_info)); in mvneta_ethtool_get_drvinfo()
4563 ring->rx_max_pending = MVNETA_MAX_RXD; in mvneta_ethtool_get_ringparam()
4564 ring->tx_max_pending = MVNETA_MAX_TXD; in mvneta_ethtool_get_ringparam()
4565 ring->rx_pending = pp->rx_ring_size; in mvneta_ethtool_get_ringparam()
4566 ring->tx_pending = pp->tx_ring_size; in mvneta_ethtool_get_ringparam()
4574 if ((ring->rx_pending == 0) || (ring->tx_pending == 0)) in mvneta_ethtool_set_ringparam()
4575 return -EINVAL; in mvneta_ethtool_set_ringparam()
4576 pp->rx_ring_size = ring->rx_pending < MVNETA_MAX_RXD ? in mvneta_ethtool_set_ringparam()
4577 ring->rx_pending : MVNETA_MAX_RXD; in mvneta_ethtool_set_ringparam()
4579 pp->tx_ring_size = clamp_t(u16, ring->tx_pending, in mvneta_ethtool_set_ringparam()
4581 if (pp->tx_ring_size != ring->tx_pending) in mvneta_ethtool_set_ringparam()
4582 netdev_warn(dev, "TX queue size set to %u (requested %u)\n", in mvneta_ethtool_set_ringparam()
4583 pp->tx_ring_size, ring->tx_pending); in mvneta_ethtool_set_ringparam()
4590 return -ENOMEM; in mvneta_ethtool_set_ringparam()
4602 phylink_ethtool_get_pauseparam(pp->phylink, pause); in mvneta_ethtool_get_pauseparam()
4610 return phylink_ethtool_set_pauseparam(pp->phylink, pause); in mvneta_ethtool_set_pauseparam()
4644 stats = per_cpu_ptr(pp->stats, cpu); in mvneta_ethtool_update_pcpu_stats()
4646 start = u64_stats_fetch_begin_irq(&stats->syncp); in mvneta_ethtool_update_pcpu_stats()
4647 skb_alloc_error = stats->es.skb_alloc_error; in mvneta_ethtool_update_pcpu_stats()
4648 refill_error = stats->es.refill_error; in mvneta_ethtool_update_pcpu_stats()
4649 xdp_redirect = stats->es.ps.xdp_redirect; in mvneta_ethtool_update_pcpu_stats()
4650 xdp_pass = stats->es.ps.xdp_pass; in mvneta_ethtool_update_pcpu_stats()
4651 xdp_drop = stats->es.ps.xdp_drop; in mvneta_ethtool_update_pcpu_stats()
4652 xdp_xmit = stats->es.ps.xdp_xmit; in mvneta_ethtool_update_pcpu_stats()
4653 xdp_xmit_err = stats->es.ps.xdp_xmit_err; in mvneta_ethtool_update_pcpu_stats()
4654 xdp_tx = stats->es.ps.xdp_tx; in mvneta_ethtool_update_pcpu_stats()
4655 xdp_tx_err = stats->es.ps.xdp_tx_err; in mvneta_ethtool_update_pcpu_stats()
4656 } while (u64_stats_fetch_retry_irq(&stats->syncp, start)); in mvneta_ethtool_update_pcpu_stats()
4658 es->skb_alloc_error += skb_alloc_error; in mvneta_ethtool_update_pcpu_stats()
4659 es->refill_error += refill_error; in mvneta_ethtool_update_pcpu_stats()
4660 es->ps.xdp_redirect += xdp_redirect; in mvneta_ethtool_update_pcpu_stats()
4661 es->ps.xdp_pass += xdp_pass; in mvneta_ethtool_update_pcpu_stats()
4662 es->ps.xdp_drop += xdp_drop; in mvneta_ethtool_update_pcpu_stats()
4663 es->ps.xdp_xmit += xdp_xmit; in mvneta_ethtool_update_pcpu_stats()
4664 es->ps.xdp_xmit_err += xdp_xmit_err; in mvneta_ethtool_update_pcpu_stats()
4665 es->ps.xdp_tx += xdp_tx; in mvneta_ethtool_update_pcpu_stats()
4666 es->ps.xdp_tx_err += xdp_tx_err; in mvneta_ethtool_update_pcpu_stats()
4674 void __iomem *base = pp->base; in mvneta_ethtool_update_stats()
4683 switch (s->type) { in mvneta_ethtool_update_stats()
4685 val = readl_relaxed(base + s->offset); in mvneta_ethtool_update_stats()
4686 pp->ethtool_stats[i] += val; in mvneta_ethtool_update_stats()
4689 /* Docs say to read low 32-bit then high */ in mvneta_ethtool_update_stats()
4690 low = readl_relaxed(base + s->offset); in mvneta_ethtool_update_stats()
4691 high = readl_relaxed(base + s->offset + 4); in mvneta_ethtool_update_stats()
4693 pp->ethtool_stats[i] += val; in mvneta_ethtool_update_stats()
4696 switch (s->offset) { in mvneta_ethtool_update_stats()
4698 val = phylink_get_eee_err(pp->phylink); in mvneta_ethtool_update_stats()
4699 pp->ethtool_stats[i] += val; in mvneta_ethtool_update_stats()
4702 pp->ethtool_stats[i] = stats.skb_alloc_error; in mvneta_ethtool_update_stats()
4705 pp->ethtool_stats[i] = stats.refill_error; in mvneta_ethtool_update_stats()
4708 pp->ethtool_stats[i] = stats.ps.xdp_redirect; in mvneta_ethtool_update_stats()
4711 pp->ethtool_stats[i] = stats.ps.xdp_pass; in mvneta_ethtool_update_stats()
4714 pp->ethtool_stats[i] = stats.ps.xdp_drop; in mvneta_ethtool_update_stats()
4717 pp->ethtool_stats[i] = stats.ps.xdp_tx; in mvneta_ethtool_update_stats()
4720 pp->ethtool_stats[i] = stats.ps.xdp_tx_err; in mvneta_ethtool_update_stats()
4723 pp->ethtool_stats[i] = stats.ps.xdp_xmit; in mvneta_ethtool_update_stats()
4726 pp->ethtool_stats[i] = stats.ps.xdp_xmit_err; in mvneta_ethtool_update_stats()
4743 *data++ = pp->ethtool_stats[i]; in mvneta_ethtool_get_stats()
4750 return -EOPNOTSUPP; in mvneta_ethtool_get_sset_count()
4762 switch (info->cmd) { in mvneta_ethtool_get_rxnfc()
4764 info->data = rxq_number; in mvneta_ethtool_get_rxnfc()
4767 return -EOPNOTSUPP; in mvneta_ethtool_get_rxnfc()
4769 return -EOPNOTSUPP; in mvneta_ethtool_get_rxnfc()
4778 netif_tx_stop_all_queues(pp->dev); in mvneta_config_rss()
4782 if (!pp->neta_armada3700) { in mvneta_config_rss()
4786 per_cpu_ptr(pp->ports, cpu); in mvneta_config_rss()
4788 napi_synchronize(&pcpu_port->napi); in mvneta_config_rss()
4789 napi_disable(&pcpu_port->napi); in mvneta_config_rss()
4792 napi_synchronize(&pp->napi); in mvneta_config_rss()
4793 napi_disable(&pp->napi); in mvneta_config_rss()
4796 pp->rxq_def = pp->indir[0]; in mvneta_config_rss()
4799 mvneta_set_rx_mode(pp->dev); in mvneta_config_rss()
4802 val = MVNETA_PORT_CONFIG_DEFL_VALUE(pp->rxq_def); in mvneta_config_rss()
4806 spin_lock(&pp->lock); in mvneta_config_rss()
4808 spin_unlock(&pp->lock); in mvneta_config_rss()
4810 if (!pp->neta_armada3700) { in mvneta_config_rss()
4814 per_cpu_ptr(pp->ports, cpu); in mvneta_config_rss()
4816 napi_enable(&pcpu_port->napi); in mvneta_config_rss()
4819 napi_enable(&pp->napi); in mvneta_config_rss()
4822 netif_tx_start_all_queues(pp->dev); in mvneta_config_rss()
4833 if (pp->neta_armada3700) in mvneta_ethtool_set_rxfh()
4834 return -EOPNOTSUPP; in mvneta_ethtool_set_rxfh()
4841 return -EOPNOTSUPP; in mvneta_ethtool_set_rxfh()
4846 memcpy(pp->indir, indir, MVNETA_RSS_LU_TABLE_SIZE); in mvneta_ethtool_set_rxfh()
4857 if (pp->neta_armada3700) in mvneta_ethtool_get_rxfh()
4858 return -EOPNOTSUPP; in mvneta_ethtool_get_rxfh()
4866 memcpy(indir, pp->indir, MVNETA_RSS_LU_TABLE_SIZE); in mvneta_ethtool_get_rxfh()
4876 phylink_ethtool_get_wol(pp->phylink, wol); in mvneta_ethtool_get_wol()
4885 ret = phylink_ethtool_set_wol(pp->phylink, wol); in mvneta_ethtool_set_wol()
4887 device_set_wakeup_enable(&dev->dev, !!wol->wolopts); in mvneta_ethtool_set_wol()
4893 struct ethtool_eee *eee) in mvneta_ethtool_get_eee() argument
4900 eee->eee_enabled = pp->eee_enabled; in mvneta_ethtool_get_eee()
4901 eee->eee_active = pp->eee_active; in mvneta_ethtool_get_eee()
4902 eee->tx_lpi_enabled = pp->tx_lpi_enabled; in mvneta_ethtool_get_eee()
4903 eee->tx_lpi_timer = (lpi_ctl0) >> 8; // * scale; in mvneta_ethtool_get_eee()
4905 return phylink_ethtool_get_eee(pp->phylink, eee); in mvneta_ethtool_get_eee()
4909 struct ethtool_eee *eee) in mvneta_ethtool_set_eee() argument
4915 * it being an 8-bit register. in mvneta_ethtool_set_eee()
4917 if (eee->tx_lpi_enabled && eee->tx_lpi_timer > 255) in mvneta_ethtool_set_eee()
4918 return -EINVAL; in mvneta_ethtool_set_eee()
4922 lpi_ctl0 |= eee->tx_lpi_timer << 8; in mvneta_ethtool_set_eee()
4925 pp->eee_enabled = eee->eee_enabled; in mvneta_ethtool_set_eee()
4926 pp->tx_lpi_enabled = eee->tx_lpi_enabled; in mvneta_ethtool_set_eee()
4928 mvneta_set_eee(pp, eee->tx_lpi_enabled && eee->eee_enabled); in mvneta_ethtool_set_eee()
4930 return phylink_ethtool_set_eee(pp->phylink, eee); in mvneta_ethtool_set_eee()
4944 val |= MVNETA_VLAN_PRIO_RXQ_MAP(i, pp->prio_tc_map[i]); in mvneta_setup_rx_prio_map()
4956 qopt->hw = TC_MQPRIO_HW_OFFLOAD_TCS; in mvneta_setup_mqprio()
4957 num_tc = qopt->num_tc; in mvneta_setup_mqprio()
4960 return -EINVAL; in mvneta_setup_mqprio()
4968 memcpy(pp->prio_tc_map, qopt->prio_tc_map, sizeof(pp->prio_tc_map)); in mvneta_setup_mqprio()
4972 netdev_set_num_tc(dev, qopt->num_tc); in mvneta_setup_mqprio()
4973 for (i = 0; i < qopt->num_tc; i++) in mvneta_setup_mqprio()
4974 netdev_set_tc_queue(dev, i, qopt->count[i], qopt->offset[i]); in mvneta_setup_mqprio()
4986 return -EOPNOTSUPP; in mvneta_setup_tc()
5043 pp->txqs = devm_kcalloc(dev, txq_number, sizeof(*pp->txqs), GFP_KERNEL); in mvneta_init()
5044 if (!pp->txqs) in mvneta_init()
5045 return -ENOMEM; in mvneta_init()
5047 /* Initialize TX descriptor rings */ in mvneta_init()
5049 struct mvneta_tx_queue *txq = &pp->txqs[queue]; in mvneta_init()
5050 txq->id = queue; in mvneta_init()
5051 txq->size = pp->tx_ring_size; in mvneta_init()
5052 txq->done_pkts_coal = MVNETA_TXDONE_COAL_PKTS; in mvneta_init()
5055 pp->rxqs = devm_kcalloc(dev, rxq_number, sizeof(*pp->rxqs), GFP_KERNEL); in mvneta_init()
5056 if (!pp->rxqs) in mvneta_init()
5057 return -ENOMEM; in mvneta_init()
5061 struct mvneta_rx_queue *rxq = &pp->rxqs[queue]; in mvneta_init()
5062 rxq->id = queue; in mvneta_init()
5063 rxq->size = pp->rx_ring_size; in mvneta_init()
5064 rxq->pkts_coal = MVNETA_RX_COAL_PKTS; in mvneta_init()
5065 rxq->time_coal = MVNETA_RX_COAL_USEC; in mvneta_init()
5066 rxq->buf_virt_addr in mvneta_init()
5067 = devm_kmalloc_array(pp->dev->dev.parent, in mvneta_init()
5068 rxq->size, in mvneta_init()
5069 sizeof(*rxq->buf_virt_addr), in mvneta_init()
5071 if (!rxq->buf_virt_addr) in mvneta_init()
5072 return -ENOMEM; in mvneta_init()
5098 for (i = 0; i < dram->num_cs; i++) { in mvneta_conf_mbus_windows()
5099 const struct mbus_dram_window *cs = dram->cs + i; in mvneta_conf_mbus_windows()
5102 (cs->base & 0xffff0000) | in mvneta_conf_mbus_windows()
5103 (cs->mbus_attr << 8) | in mvneta_conf_mbus_windows()
5104 dram->mbus_dram_target_id); in mvneta_conf_mbus_windows()
5107 (cs->size - 1) & 0xffff0000); in mvneta_conf_mbus_windows()
5136 return -EINVAL; in mvneta_port_power_up()
5144 struct device_node *dn = pdev->dev.of_node; in mvneta_probe()
5157 dev = devm_alloc_etherdev_mqs(&pdev->dev, sizeof(struct mvneta_port), in mvneta_probe()
5160 return -ENOMEM; in mvneta_probe()
5162 dev->irq = irq_of_parse_and_map(dn, 0); in mvneta_probe()
5163 if (dev->irq == 0) in mvneta_probe()
5164 return -EINVAL; in mvneta_probe()
5168 dev_err(&pdev->dev, "incorrect phy-mode\n"); in mvneta_probe()
5172 comphy = devm_of_phy_get(&pdev->dev, dn, NULL); in mvneta_probe()
5173 if (comphy == ERR_PTR(-EPROBE_DEFER)) { in mvneta_probe()
5174 err = -EPROBE_DEFER; in mvneta_probe()
5181 spin_lock_init(&pp->lock); in mvneta_probe()
5183 pp->phylink_config.dev = &dev->dev; in mvneta_probe()
5184 pp->phylink_config.type = PHYLINK_NETDEV; in mvneta_probe()
5186 phylink = phylink_create(&pp->phylink_config, pdev->dev.fwnode, in mvneta_probe()
5193 dev->tx_queue_len = MVNETA_MAX_TXD; in mvneta_probe()
5194 dev->watchdog_timeo = 5 * HZ; in mvneta_probe()
5195 dev->netdev_ops = &mvneta_netdev_ops; in mvneta_probe()
5197 dev->ethtool_ops = &mvneta_eth_tool_ops; in mvneta_probe()
5199 pp->phylink = phylink; in mvneta_probe()
5200 pp->comphy = comphy; in mvneta_probe()
5201 pp->phy_interface = phy_mode; in mvneta_probe()
5202 pp->dn = dn; in mvneta_probe()
5204 pp->rxq_def = rxq_def; in mvneta_probe()
5205 pp->indir[0] = rxq_def; in mvneta_probe()
5208 if (of_device_is_compatible(dn, "marvell,armada-3700-neta")) in mvneta_probe()
5209 pp->neta_armada3700 = true; in mvneta_probe()
5211 pp->clk = devm_clk_get(&pdev->dev, "core"); in mvneta_probe()
5212 if (IS_ERR(pp->clk)) in mvneta_probe()
5213 pp->clk = devm_clk_get(&pdev->dev, NULL); in mvneta_probe()
5214 if (IS_ERR(pp->clk)) { in mvneta_probe()
5215 err = PTR_ERR(pp->clk); in mvneta_probe()
5219 clk_prepare_enable(pp->clk); in mvneta_probe()
5221 pp->clk_bus = devm_clk_get(&pdev->dev, "bus"); in mvneta_probe()
5222 if (!IS_ERR(pp->clk_bus)) in mvneta_probe()
5223 clk_prepare_enable(pp->clk_bus); in mvneta_probe()
5225 pp->base = devm_platform_ioremap_resource(pdev, 0); in mvneta_probe()
5226 if (IS_ERR(pp->base)) { in mvneta_probe()
5227 err = PTR_ERR(pp->base); in mvneta_probe()
5231 /* Alloc per-cpu port structure */ in mvneta_probe()
5232 pp->ports = alloc_percpu(struct mvneta_pcpu_port); in mvneta_probe()
5233 if (!pp->ports) { in mvneta_probe()
5234 err = -ENOMEM; in mvneta_probe()
5238 /* Alloc per-cpu stats */ in mvneta_probe()
5239 pp->stats = netdev_alloc_pcpu_stats(struct mvneta_pcpu_stats); in mvneta_probe()
5240 if (!pp->stats) { in mvneta_probe()
5241 err = -ENOMEM; in mvneta_probe()
5245 err = of_get_mac_address(dn, dev->dev_addr); in mvneta_probe()
5252 memcpy(dev->dev_addr, hw_mac_addr, ETH_ALEN); in mvneta_probe()
5259 if (!of_property_read_u32(dn, "tx-csum-limit", &tx_csum_limit)) { in mvneta_probe()
5263 dev_info(&pdev->dev, in mvneta_probe()
5264 "Wrong TX csum limit in DT, set to %dB\n", in mvneta_probe()
5267 } else if (of_device_is_compatible(dn, "marvell,armada-370-neta")) { in mvneta_probe()
5273 pp->tx_csum_limit = tx_csum_limit; in mvneta_probe()
5275 pp->dram_target_info = mv_mbus_dram_info(); in mvneta_probe()
5280 if (pp->dram_target_info || pp->neta_armada3700) in mvneta_probe()
5281 mvneta_conf_mbus_windows(pp, pp->dram_target_info); in mvneta_probe()
5283 pp->tx_ring_size = MVNETA_MAX_TXD; in mvneta_probe()
5284 pp->rx_ring_size = MVNETA_MAX_RXD; in mvneta_probe()
5286 pp->dev = dev; in mvneta_probe()
5287 SET_NETDEV_DEV(dev, &pdev->dev); in mvneta_probe()
5289 pp->id = global_port_id++; in mvneta_probe()
5292 bm_node = of_parse_phandle(dn, "buffer-manager", 0); in mvneta_probe()
5294 pp->bm_priv = mvneta_bm_get(bm_node); in mvneta_probe()
5295 if (pp->bm_priv) { in mvneta_probe()
5298 dev_info(&pdev->dev, in mvneta_probe()
5300 mvneta_bm_put(pp->bm_priv); in mvneta_probe()
5301 pp->bm_priv = NULL; in mvneta_probe()
5305 * NET_SKB_PAD, exceeds 64B. It should be 64B for 64-bit in mvneta_probe()
5306 * platforms and 0B for 32-bit ones. in mvneta_probe()
5308 pp->rx_offset_correction = max(0, in mvneta_probe()
5309 NET_SKB_PAD - in mvneta_probe()
5315 if (!pp->bm_priv) in mvneta_probe()
5316 pp->rx_offset_correction = MVNETA_SKB_HEADROOM; in mvneta_probe()
5318 err = mvneta_init(&pdev->dev, pp); in mvneta_probe()
5322 err = mvneta_port_power_up(pp, pp->phy_interface); in mvneta_probe()
5324 dev_err(&pdev->dev, "can't power up port\n"); in mvneta_probe()
5328 /* Armada3700 network controller does not support per-cpu in mvneta_probe()
5331 if (pp->neta_armada3700) { in mvneta_probe()
5332 netif_napi_add(dev, &pp->napi, mvneta_poll, NAPI_POLL_WEIGHT); in mvneta_probe()
5336 per_cpu_ptr(pp->ports, cpu); in mvneta_probe()
5338 netif_napi_add(dev, &port->napi, mvneta_poll, in mvneta_probe()
5340 port->pp = pp; in mvneta_probe()
5344 dev->features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | in mvneta_probe()
5346 dev->hw_features |= dev->features; in mvneta_probe()
5347 dev->vlan_features |= dev->features; in mvneta_probe()
5348 dev->priv_flags |= IFF_LIVE_ADDR_CHANGE; in mvneta_probe()
5349 dev->gso_max_segs = MVNETA_MAX_TSO_SEGS; in mvneta_probe()
5351 /* MTU range: 68 - 9676 */ in mvneta_probe()
5352 dev->min_mtu = ETH_MIN_MTU; in mvneta_probe()
5353 /* 9676 == 9700 - 20 and rounding to 8 */ in mvneta_probe()
5354 dev->max_mtu = 9676; in mvneta_probe()
5358 dev_err(&pdev->dev, "failed to register\n"); in mvneta_probe()
5363 dev->dev_addr); in mvneta_probe()
5365 platform_set_drvdata(pdev, pp->dev); in mvneta_probe()
5370 if (pp->bm_priv) { in mvneta_probe()
5371 mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id); in mvneta_probe()
5372 mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_short, in mvneta_probe()
5373 1 << pp->id); in mvneta_probe()
5374 mvneta_bm_put(pp->bm_priv); in mvneta_probe()
5376 free_percpu(pp->stats); in mvneta_probe()
5378 free_percpu(pp->ports); in mvneta_probe()
5380 clk_disable_unprepare(pp->clk_bus); in mvneta_probe()
5381 clk_disable_unprepare(pp->clk); in mvneta_probe()
5383 if (pp->phylink) in mvneta_probe()
5384 phylink_destroy(pp->phylink); in mvneta_probe()
5386 irq_dispose_mapping(dev->irq); in mvneta_probe()
5397 clk_disable_unprepare(pp->clk_bus); in mvneta_remove()
5398 clk_disable_unprepare(pp->clk); in mvneta_remove()
5399 free_percpu(pp->ports); in mvneta_remove()
5400 free_percpu(pp->stats); in mvneta_remove()
5401 irq_dispose_mapping(dev->irq); in mvneta_remove()
5402 phylink_destroy(pp->phylink); in mvneta_remove()
5404 if (pp->bm_priv) { in mvneta_remove()
5405 mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id); in mvneta_remove()
5406 mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_short, in mvneta_remove()
5407 1 << pp->id); in mvneta_remove()
5408 mvneta_bm_put(pp->bm_priv); in mvneta_remove()
5424 if (!pp->neta_armada3700) { in mvneta_suspend()
5425 spin_lock(&pp->lock); in mvneta_suspend()
5426 pp->is_stopped = true; in mvneta_suspend()
5427 spin_unlock(&pp->lock); in mvneta_suspend()
5430 &pp->node_online); in mvneta_suspend()
5432 &pp->node_dead); in mvneta_suspend()
5440 struct mvneta_rx_queue *rxq = &pp->rxqs[queue]; in mvneta_suspend()
5446 struct mvneta_tx_queue *txq = &pp->txqs[queue]; in mvneta_suspend()
5453 clk_disable_unprepare(pp->clk_bus); in mvneta_suspend()
5454 clk_disable_unprepare(pp->clk); in mvneta_suspend()
5466 clk_prepare_enable(pp->clk); in mvneta_resume()
5467 if (!IS_ERR(pp->clk_bus)) in mvneta_resume()
5468 clk_prepare_enable(pp->clk_bus); in mvneta_resume()
5469 if (pp->dram_target_info || pp->neta_armada3700) in mvneta_resume()
5470 mvneta_conf_mbus_windows(pp, pp->dram_target_info); in mvneta_resume()
5471 if (pp->bm_priv) { in mvneta_resume()
5474 dev_info(&pdev->dev, "use SW buffer management\n"); in mvneta_resume()
5475 pp->rx_offset_correction = MVNETA_SKB_HEADROOM; in mvneta_resume()
5476 pp->bm_priv = NULL; in mvneta_resume()
5480 err = mvneta_port_power_up(pp, pp->phy_interface); in mvneta_resume()
5492 struct mvneta_rx_queue *rxq = &pp->rxqs[queue]; in mvneta_resume()
5494 rxq->next_desc_to_proc = 0; in mvneta_resume()
5499 struct mvneta_tx_queue *txq = &pp->txqs[queue]; in mvneta_resume()
5501 txq->next_desc_to_proc = 0; in mvneta_resume()
5505 if (!pp->neta_armada3700) { in mvneta_resume()
5506 spin_lock(&pp->lock); in mvneta_resume()
5507 pp->is_stopped = false; in mvneta_resume()
5508 spin_unlock(&pp->lock); in mvneta_resume()
5510 &pp->node_online); in mvneta_resume()
5512 &pp->node_dead); in mvneta_resume()
5527 { .compatible = "marvell,armada-370-neta" },
5528 { .compatible = "marvell,armada-xp-neta" },
5529 { .compatible = "marvell,armada-3700-neta" },
5581 MODULE_DESCRIPTION("Marvell NETA Ethernet Driver - www.marvell.com");
5582 MODULE_AUTHOR("Rami Rosen <rosenr@marvell.com>, Thomas Petazzoni <thomas.petazzoni@free-electrons.c…