1 // SPDX-License-Identifier: GPL-2.0
9  * igc_acquire_nvm_i225 - Acquire exclusive access to EEPROM
15  * EEPROM access and return -IGC_ERR_NVM (-1).
23  * igc_release_nvm_i225 - Release exclusive access to EEPROM
35  * igc_get_hw_semaphore_i225 - Acquire hardware semaphore
42 	s32 timeout = hw->nvm.word_size + 1;  in igc_get_hw_semaphore_i225()
60 		if (hw->dev_spec._base.clear_semaphore_once) {  in igc_get_hw_semaphore_i225()
61 			hw->dev_spec._base.clear_semaphore_once = false;  in igc_get_hw_semaphore_i225()
74 			hw_dbg("Driver can't access device - SMBI bit is set.\n");  in igc_get_hw_semaphore_i225()
75 			return -IGC_ERR_NVM;  in igc_get_hw_semaphore_i225()
95 		return -IGC_ERR_NVM;  in igc_get_hw_semaphore_i225()
102  * igc_acquire_swfw_sync_i225 - Acquire SW/FW semaphore
119 			ret_val = -IGC_ERR_SWFW_SYNC;  in igc_acquire_swfw_sync_i225()
120 			goto out;  in igc_acquire_swfw_sync_i225()
135 		ret_val = -IGC_ERR_SWFW_SYNC;  in igc_acquire_swfw_sync_i225()
136 		goto out;  in igc_acquire_swfw_sync_i225()
143 out:  in igc_acquire_swfw_sync_i225()
148  * igc_release_swfw_sync_i225 - Release SW/FW semaphore
170  * igc_read_nvm_srrd_i225 - Reads Shadow Ram using EERD register
172  * @offset: offset of word in the Shadow Ram to read
173  * @words: number of words to read
174  * @data: word read from the Shadow Ram
187 	 * to read in bursts than synchronizing access for each word.  in igc_read_nvm_srrd_i225()
190 		count = (words - i) / IGC_EERD_EEWR_MAX_COUNT > 0 ?  in igc_read_nvm_srrd_i225()
191 			IGC_EERD_EEWR_MAX_COUNT : (words - i);  in igc_read_nvm_srrd_i225()
193 		status = hw->nvm.ops.acquire(hw);  in igc_read_nvm_srrd_i225()
198 		hw->nvm.ops.release(hw);  in igc_read_nvm_srrd_i225()
207  * igc_write_nvm_srwr - Write to Shadow Ram using EEWR
221 	struct igc_nvm_info *nvm = &hw->nvm;  in igc_write_nvm_srwr()
222 	s32 ret_val = -IGC_ERR_NVM;  in igc_write_nvm_srwr()
229 	if (offset >= nvm->word_size || (words > (nvm->word_size - offset)) ||  in igc_write_nvm_srwr()
231 		hw_dbg("nvm parameter(s) out of bounds\n");  in igc_write_nvm_srwr()
236 		ret_val = -IGC_ERR_NVM;  in igc_write_nvm_srwr()
253 			hw_dbg("Shadow RAM write EEWR timed out\n");  in igc_write_nvm_srwr()
262  * igc_write_nvm_srwr_i225 - Write to Shadow RAM using EEWR
274  * If error code is returned, data and Shadow RAM may be inconsistent - buffer
288 		count = (words - i) / IGC_EERD_EEWR_MAX_COUNT > 0 ?  in igc_write_nvm_srwr_i225()
289 			IGC_EERD_EEWR_MAX_COUNT : (words - i);  in igc_write_nvm_srwr_i225()
291 		status = hw->nvm.ops.acquire(hw);  in igc_write_nvm_srwr_i225()
296 		hw->nvm.ops.release(hw);  in igc_write_nvm_srwr_i225()
305  * igc_validate_nvm_checksum_i225 - Validate EEPROM checksum
317 	status = hw->nvm.ops.acquire(hw);  in igc_validate_nvm_checksum_i225()
319 		goto out;  in igc_validate_nvm_checksum_i225()
321 	/* Replace the read function with semaphore grabbing with  in igc_validate_nvm_checksum_i225()
325 	read_op_ptr = hw->nvm.ops.read;  in igc_validate_nvm_checksum_i225()
326 	hw->nvm.ops.read = igc_read_nvm_eerd;  in igc_validate_nvm_checksum_i225()
330 	/* Revert original read operation. */  in igc_validate_nvm_checksum_i225()
331 	hw->nvm.ops.read = read_op_ptr;  in igc_validate_nvm_checksum_i225()
333 	hw->nvm.ops.release(hw);  in igc_validate_nvm_checksum_i225()
335 out:  in igc_validate_nvm_checksum_i225()
340  * igc_pool_flash_update_done_i225 - Pool FLUDONE status
345 	s32 ret_val = -IGC_ERR_NVM;  in igc_pool_flash_update_done_i225()
361  * igc_update_flash_i225 - Commit EEPROM to the flash
370 	if (ret_val == -IGC_ERR_NVM) {  in igc_update_flash_i225()
371 		hw_dbg("Flash update time out\n");  in igc_update_flash_i225()
372 		goto out;  in igc_update_flash_i225()
380 		hw_dbg("Flash update time out\n");  in igc_update_flash_i225()
384 out:  in igc_update_flash_i225()
389  * igc_update_nvm_checksum_i225 - Update EEPROM checksum
402 	/* Read the first word from the EEPROM. If this times out or fails, do  in igc_update_nvm_checksum_i225()
404 	 * EEPROM read fails  in igc_update_nvm_checksum_i225()
408 		hw_dbg("EEPROM read failed\n");  in igc_update_nvm_checksum_i225()
409 		goto out;  in igc_update_nvm_checksum_i225()
412 	ret_val = hw->nvm.ops.acquire(hw);  in igc_update_nvm_checksum_i225()
414 		goto out;  in igc_update_nvm_checksum_i225()
416 	/* Do not use hw->nvm.ops.write, hw->nvm.ops.read  in igc_update_nvm_checksum_i225()
424 			hw->nvm.ops.release(hw);  in igc_update_nvm_checksum_i225()
425 			hw_dbg("NVM Read Error while updating checksum.\n");  in igc_update_nvm_checksum_i225()
426 			goto out;  in igc_update_nvm_checksum_i225()
430 	checksum = (u16)NVM_SUM - checksum;  in igc_update_nvm_checksum_i225()
434 		hw->nvm.ops.release(hw);  in igc_update_nvm_checksum_i225()
436 		goto out;  in igc_update_nvm_checksum_i225()
439 	hw->nvm.ops.release(hw);  in igc_update_nvm_checksum_i225()
443 out:  in igc_update_nvm_checksum_i225()
448  * igc_get_flash_presence_i225 - Check if flash device is detected
464  * igc_init_nvm_params_i225 - Init NVM func ptrs.
469 	struct igc_nvm_info *nvm = &hw->nvm;  in igc_init_nvm_params_i225()
471 	nvm->ops.acquire = igc_acquire_nvm_i225;  in igc_init_nvm_params_i225()
472 	nvm->ops.release = igc_release_nvm_i225;  in igc_init_nvm_params_i225()
476 		hw->nvm.type = igc_nvm_flash_hw;  in igc_init_nvm_params_i225()
477 		nvm->ops.read = igc_read_nvm_srrd_i225;  in igc_init_nvm_params_i225()
478 		nvm->ops.write = igc_write_nvm_srwr_i225;  in igc_init_nvm_params_i225()
479 		nvm->ops.validate = igc_validate_nvm_checksum_i225;  in igc_init_nvm_params_i225()
480 		nvm->ops.update = igc_update_nvm_checksum_i225;  in igc_init_nvm_params_i225()
482 		hw->nvm.type = igc_nvm_invm;  in igc_init_nvm_params_i225()
483 		nvm->ops.read = igc_read_nvm_eerd;  in igc_init_nvm_params_i225()
484 		nvm->ops.write = NULL;  in igc_init_nvm_params_i225()
485 		nvm->ops.validate = NULL;  in igc_init_nvm_params_i225()
486 		nvm->ops.update = NULL;  in igc_init_nvm_params_i225()
492  *  igc_set_eee_i225 - Enable/disable EEE support
509 	if (hw->dev_spec._base.eee_enable) {  in igc_set_eee_i225()
547 /* igc_set_ltr_i225 - Set Latency Tolerance Reporting thresholds
562 		hw->mac.ops.get_speed_and_duplex(hw, &speed, &duplex);  in igc_set_ltr_i225()
567 		if (hw->dev_spec._base.eee_enable &&  in igc_set_ltr_i225()
593 			size -= (rd32(IGC_DMACR) &  in igc_set_ltr_i225()
609 			return -IGC_ERR_CONFIG;  in igc_set_ltr_i225()
624 		ltr_min -= 1;  in igc_set_ltr_i225()
626 		ltr_max -= 1;  in igc_set_ltr_i225()