491 				     rx_ring->q_index, rx_ring->q_vector->napi.napi_id))  in ice_setup_rx_ring()
954 	skb = __napi_alloc_skb(&rx_ring->q_vector->napi, ICE_RX_HDR_SIZE,  in ice_construct_skb()
1242 static void ice_net_dim(struct ice_q_vector *q_vector)  in ice_net_dim()  argument
1244 	struct ice_ring_container *tx = &q_vector->tx;  in ice_net_dim()
1245 	struct ice_ring_container *rx = &q_vector->rx;  in ice_net_dim()
1252 		ice_for_each_ring(ring, q_vector->tx) {  in ice_net_dim()
1257 		dim_update_sample(q_vector->total_events, packets, bytes,  in ice_net_dim()
1268 		ice_for_each_ring(ring, q_vector->rx) {  in ice_net_dim()
1273 		dim_update_sample(q_vector->total_events, packets, bytes,  in ice_net_dim()
1310 static void ice_update_ena_itr(struct ice_q_vector *q_vector)  in ice_update_ena_itr()  argument
1312 	struct ice_vsi *vsi = q_vector->vsi;  in ice_update_ena_itr()
1313 	bool wb_en = q_vector->wb_on_itr;  in ice_update_ena_itr()
1323 		q_vector->wb_on_itr = false;  in ice_update_ena_itr()
1326 	ice_net_dim(q_vector);  in ice_update_ena_itr()
1340 	wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);  in ice_update_ena_itr()
1357 static void ice_set_wb_on_itr(struct ice_q_vector *q_vector)  in ice_set_wb_on_itr()  argument
1359 	struct ice_vsi *vsi = q_vector->vsi;  in ice_set_wb_on_itr()
1362 	if (q_vector->wb_on_itr)  in ice_set_wb_on_itr()
1369 	wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),  in ice_set_wb_on_itr()
1374 	q_vector->wb_on_itr = true;  in ice_set_wb_on_itr()
1388 	struct ice_q_vector *q_vector =  in ice_napi_poll()  local
1398 	ice_for_each_ring(ring, q_vector->tx) {  in ice_napi_poll()
1412 	if (unlikely(q_vector->num_ring_rx > 1))  in ice_napi_poll()
1417 		budget_per_ring = max_t(int, budget / q_vector->num_ring_rx, 1);  in ice_napi_poll()
1422 	ice_for_each_ring(ring, q_vector->rx) {  in ice_napi_poll()
1443 		ice_set_wb_on_itr(q_vector);  in ice_napi_poll()
1451 		ice_update_ena_itr(q_vector);  in ice_napi_poll()
1453 		ice_set_wb_on_itr(q_vector);  in ice_napi_poll()