Lines Matching +full:8 +full:bit
19 #define PF_FW_ARQLEN_ARQVFE_M BIT(28)
20 #define PF_FW_ARQLEN_ARQOVFL_M BIT(29)
21 #define PF_FW_ARQLEN_ARQCRIT_M BIT(30)
22 #define PF_FW_ARQLEN_ARQENABLE_M BIT(31)
30 #define PF_FW_ATQLEN_ATQVFE_M BIT(28)
31 #define PF_FW_ATQLEN_ATQOVFL_M BIT(29)
32 #define PF_FW_ATQLEN_ATQCRIT_M BIT(30)
35 #define PF_FW_ATQLEN_ATQENABLE_M BIT(31)
43 #define PF_MBX_ARQLEN_ARQCRIT_M BIT(30)
44 #define PF_MBX_ARQLEN_ARQENABLE_M BIT(31)
52 #define PF_MBX_ATQLEN_ATQCRIT_M BIT(30)
53 #define PF_MBX_ATQLEN_ATQENABLE_M BIT(31)
70 #define PF_SB_ARQLEN_ARQVFE_M BIT(28)
72 #define PF_SB_ARQLEN_ARQOVFL_M BIT(29)
74 #define PF_SB_ARQLEN_ARQCRIT_M BIT(30)
76 #define PF_SB_ARQLEN_ARQENABLE_M BIT(31)
93 #define PF_SB_ATQLEN_ATQVFE_M BIT(28)
95 #define PF_SB_ATQLEN_ATQOVFL_M BIT(29)
97 #define PF_SB_ATQLEN_ATQCRIT_M BIT(30)
99 #define PF_SB_ATQLEN_ATQENABLE_M BIT(31)
135 #define QRXFLXP_CNTXT_RXDID_PRIO_S 8
136 #define QRXFLXP_CNTXT_RXDID_PRIO_M ICE_M(0x7, 8)
137 #define QRXFLXP_CNTXT_TS_M BIT(11)
142 #define GLGEN_GPIO_CTL_PIN_DIR_M BIT(4)
143 #define GLGEN_GPIO_CTL_PIN_FUNC_S 8
144 #define GLGEN_GPIO_CTL_PIN_FUNC_M ICE_M(0xF, 8)
153 #define GLGEN_RTRIG_CORER_M BIT(0)
154 #define GLGEN_RTRIG_GLOBR_M BIT(1)
158 #define PFGEN_CTRL_PFSWR_M BIT(0)
163 #define VPGEN_VFRSTAT_VFRD_M BIT(0)
165 #define VPGEN_VFRTRIG_VFSWR_M BIT(0)
167 #define GLINT_CTL_DIS_AUTOMASK_M BIT(0)
177 #define GLINT_DYN_CTL_INTENA_M BIT(0)
178 #define GLINT_DYN_CTL_CLEARPBA_M BIT(1)
179 #define GLINT_DYN_CTL_SWINT_TRIG_M BIT(2)
184 #define GLINT_DYN_CTL_SW_ITR_INDX_ENA_M BIT(24)
186 #define GLINT_DYN_CTL_WB_ON_ITR_M BIT(30)
187 #define GLINT_DYN_CTL_INTENA_MSK_M BIT(31)
190 #define GLINT_RATE_INTRL_ENA_M BIT(6)
197 #define GLINT_VECT2FUNC_IS_PF_M BIT(16)
202 #define PFINT_FW_CTL_CAUSE_ENA_M BIT(30)
207 #define PFINT_MBX_CTL_CAUSE_ENA_M BIT(30)
209 #define PFINT_OICR_TSYN_TX_M BIT(11)
210 #define PFINT_OICR_TSYN_EVNT_M BIT(12)
211 #define PFINT_OICR_ECC_ERR_M BIT(16)
212 #define PFINT_OICR_MAL_DETECT_M BIT(19)
213 #define PFINT_OICR_GRST_M BIT(20)
214 #define PFINT_OICR_PCI_EXCEPTION_M BIT(21)
215 #define PFINT_OICR_HMC_ERR_M BIT(26)
216 #define PFINT_OICR_PE_PUSH_M BIT(27)
217 #define PFINT_OICR_PE_CRITERR_M BIT(28)
218 #define PFINT_OICR_VFLR_M BIT(29)
219 #define PFINT_OICR_SWINT_M BIT(31)
224 #define PFINT_OICR_CTL_CAUSE_ENA_M BIT(30)
228 #define PFINT_SB_CTL_CAUSE_ENA_M BIT(30)
234 #define QINT_RQCTL_CAUSE_ENA_M BIT(30)
240 #define QINT_TQCTL_CAUSE_ENA_M BIT(30)
246 #define VPINT_ALLOC_VALID_M BIT(31)
252 #define VPINT_ALLOC_PCI_VALID_M BIT(31)
254 #define VPINT_MBX_CTL_CAUSE_ENA_M BIT(30)
260 #define QRX_CTRL_QENA_REQ_M BIT(0)
262 #define QRX_CTRL_QENA_STAT_M BIT(2)
274 #define VPLAN_RXQ_MAPENA_RX_ENA_M BIT(0)
281 #define VPLAN_TXQ_MAPENA_TX_ENA_M BIT(0)
283 #define PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX 8
288 #define GL_MDCK_TX_TDPU_RCU_ANTISPOOF_ITR_DIS_M BIT(1)
298 #define GL_MDET_RX_VALID_M BIT(31)
308 #define GL_MDET_TX_PQM_VALID_M BIT(31)
318 #define GL_MDET_TX_TCLAN_VALID_M BIT(31)
320 #define PF_MDET_RX_VALID_M BIT(0)
322 #define PF_MDET_TX_PQM_VALID_M BIT(0)
324 #define PF_MDET_TX_TCLAN_VALID_M BIT(0)
326 #define VP_MDET_RX_VALID_M BIT(0)
328 #define VP_MDET_TX_PQM_VALID_M BIT(0)
330 #define VP_MDET_TX_TCLAN_VALID_M BIT(0)
332 #define VP_MDET_TX_TDPU_VALID_M BIT(0)
334 #define GLNVM_FLA_LOCKED_M BIT(6)
339 #define GLNVM_ULD_PCIER_DONE_M BIT(0)
340 #define GLNVM_ULD_PCIER_DONE_1_M BIT(1)
341 #define GLNVM_ULD_CORER_DONE_M BIT(3)
342 #define GLNVM_ULD_GLOBR_DONE_M BIT(4)
343 #define GLNVM_ULD_POR_DONE_M BIT(5)
344 #define GLNVM_ULD_POR_DONE_1_M BIT(8)
345 #define GLNVM_ULD_PCIER_DONE_2_M BIT(9)
346 #define GLNVM_ULD_PE_DONE_M BIT(10)
348 #define GLPCI_CNF2_CACHELINE_SIZE_M BIT(1)
385 #define PFQF_FD_ENA_FD_ENA_M BIT(0)
389 #define GLPRT_BPRCL(_i) (0x00381380 + ((_i) * 8))
390 #define GLPRT_BPTCL(_i) (0x00381240 + ((_i) * 8))
391 #define GLPRT_CRCERRS(_i) (0x00380100 + ((_i) * 8))
392 #define GLPRT_GORCL(_i) (0x00380000 + ((_i) * 8))
393 #define GLPRT_GOTCL(_i) (0x00380B40 + ((_i) * 8))
394 #define GLPRT_ILLERRC(_i) (0x003801C0 + ((_i) * 8))
395 #define GLPRT_LXOFFRXC(_i) (0x003802C0 + ((_i) * 8))
396 #define GLPRT_LXOFFTXC(_i) (0x00381180 + ((_i) * 8))
397 #define GLPRT_LXONRXC(_i) (0x00380280 + ((_i) * 8))
398 #define GLPRT_LXONTXC(_i) (0x00381140 + ((_i) * 8))
399 #define GLPRT_MLFC(_i) (0x00380040 + ((_i) * 8))
400 #define GLPRT_MPRCL(_i) (0x00381340 + ((_i) * 8))
401 #define GLPRT_MPTCL(_i) (0x00381200 + ((_i) * 8))
402 #define GLPRT_MRFC(_i) (0x00380080 + ((_i) * 8))
403 #define GLPRT_PRC1023L(_i) (0x00380A00 + ((_i) * 8))
404 #define GLPRT_PRC127L(_i) (0x00380940 + ((_i) * 8))
405 #define GLPRT_PRC1522L(_i) (0x00380A40 + ((_i) * 8))
406 #define GLPRT_PRC255L(_i) (0x00380980 + ((_i) * 8))
407 #define GLPRT_PRC511L(_i) (0x003809C0 + ((_i) * 8))
408 #define GLPRT_PRC64L(_i) (0x00380900 + ((_i) * 8))
409 #define GLPRT_PRC9522L(_i) (0x00380A80 + ((_i) * 8))
410 #define GLPRT_PTC1023L(_i) (0x00380C80 + ((_i) * 8))
411 #define GLPRT_PTC127L(_i) (0x00380BC0 + ((_i) * 8))
412 #define GLPRT_PTC1522L(_i) (0x00380CC0 + ((_i) * 8))
413 #define GLPRT_PTC255L(_i) (0x00380C00 + ((_i) * 8))
414 #define GLPRT_PTC511L(_i) (0x00380C40 + ((_i) * 8))
415 #define GLPRT_PTC64L(_i) (0x00380B80 + ((_i) * 8))
416 #define GLPRT_PTC9522L(_i) (0x00380D00 + ((_i) * 8))
417 #define GLPRT_PXOFFRXC(_i, _j) (0x00380500 + ((_i) * 8 + (_j) * 64))
418 #define GLPRT_PXOFFTXC(_i, _j) (0x00380F40 + ((_i) * 8 + (_j) * 64))
419 #define GLPRT_PXONRXC(_i, _j) (0x00380300 + ((_i) * 8 + (_j) * 64))
420 #define GLPRT_PXONTXC(_i, _j) (0x00380D40 + ((_i) * 8 + (_j) * 64))
421 #define GLPRT_RFC(_i) (0x00380AC0 + ((_i) * 8))
422 #define GLPRT_RJC(_i) (0x00380B00 + ((_i) * 8))
423 #define GLPRT_RLEC(_i) (0x00380140 + ((_i) * 8))
424 #define GLPRT_ROC(_i) (0x00380240 + ((_i) * 8))
425 #define GLPRT_RUC(_i) (0x00380200 + ((_i) * 8))
426 #define GLPRT_RXON2OFFCNT(_i, _j) (0x00380700 + ((_i) * 8 + (_j) * 64))
427 #define GLPRT_TDOLD(_i) (0x00381280 + ((_i) * 8))
428 #define GLPRT_UPRCL(_i) (0x00381300 + ((_i) * 8))
429 #define GLPRT_UPTCL(_i) (0x003811C0 + ((_i) * 8))
430 #define GLSTAT_FD_CNT0L(_i) (0x003A0000 + ((_i) * 8))
431 #define GLV_BPRCL(_i) (0x003B6000 + ((_i) * 8))
432 #define GLV_BPTCL(_i) (0x0030E000 + ((_i) * 8))
433 #define GLV_GORCL(_i) (0x003B0000 + ((_i) * 8))
434 #define GLV_GOTCL(_i) (0x00300000 + ((_i) * 8))
435 #define GLV_MPRCL(_i) (0x003B4000 + ((_i) * 8))
436 #define GLV_MPTCL(_i) (0x0030C000 + ((_i) * 8))
439 #define GLV_UPRCL(_i) (0x003B2000 + ((_i) * 8))
440 #define GLV_UPTCL(_i) (0x0030A000 + ((_i) * 8))
443 #define GLTSYN_AUX_IN_0_INT_ENA_M BIT(4)
445 #define GLTSYN_AUX_OUT_0_OUT_ENA_M BIT(0)
451 #define GLTSYN_ENA_TSYN_ENA_M BIT(0)
462 #define GLTSYN_STAT_EVENT0_M BIT(0)
463 #define GLTSYN_STAT_EVENT1_M BIT(1)
464 #define GLTSYN_STAT_EVENT2_M BIT(2)
471 #define PFTSYN_SEM_BUSY_M BIT(0)
481 #define PFPM_APM_APME_M BIT(0)
483 #define PFPM_WUFC_MAG_M BIT(1)
485 #define PFPM_WUS_LNKC_M BIT(0)
486 #define PFPM_WUS_MAG_M BIT(1)
487 #define PFPM_WUS_MNG_M BIT(3)
488 #define PFPM_WUS_FW_RST_WK_M BIT(31)
490 #define VFINT_DYN_CTLN_CLEARPBA_M BIT(1)