Lines Matching refs:ew32
614 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000e_update_rdt_wa()
631 ew32(TCTL, tctl & ~E1000_TCTL_EN); in e1000e_update_tdt_wa()
1105 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000_print_hw_hang()
1111 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000_print_hw_hang()
1783 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_intr_msi()
1863 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_intr()
1907 ew32(ICS, (icr & adapter->eiac_mask)); in e1000_msix_other()
1917 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK); in e1000_msix_other()
1934 ew32(ICS, tx_ring->ims_val); in e1000_intr_msix_tx()
1937 ew32(IMS, adapter->tx_ring->ims_val); in e1000_intr_msix_tx()
1989 ew32(RFCTL, rfctl); in e1000_configure_msix()
2025 ew32(IVAR, ivar); in e1000_configure_msix()
2030 ew32(CTRL_EXT, ctrl_ext); in e1000_configure_msix()
2225 ew32(IMC, ~0); in e1000_irq_disable()
2227 ew32(EIAC_82574, 0); in e1000_irq_disable()
2249 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); in e1000_irq_enable()
2250 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | in e1000_irq_enable()
2253 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER); in e1000_irq_enable()
2255 ew32(IMS, IMS_ENABLE_MASK); in e1000_irq_enable()
2278 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); in e1000e_get_hw_control()
2281 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); in e1000e_get_hw_control()
2304 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); in e1000e_release_hw_control()
2307 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); in e1000e_release_hw_control()
2631 ew32(ITR, new_itr); in e1000e_write_itr()
2695 ew32(IMS, adapter->rx_ring->ims_val); in e1000e_poll()
2772 ew32(RCTL, rctl); in e1000e_vlan_filter_disable()
2796 ew32(RCTL, rctl); in e1000e_vlan_filter_enable()
2812 ew32(CTRL, ctrl); in e1000e_vlan_strip_disable()
2827 ew32(CTRL, ctrl); in e1000e_vlan_strip_enable()
2901 ew32(MDEF(i), (E1000_MDEF_PORT_623 | in e1000_init_manageability_pt()
2913 ew32(MANC2H, manc2h); in e1000_init_manageability_pt()
2914 ew32(MANC, manc); in e1000_init_manageability_pt()
2933 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32))); in e1000_configure_tx()
2934 ew32(TDBAH(0), (tdba >> 32)); in e1000_configure_tx()
2935 ew32(TDLEN(0), tdlen); in e1000_configure_tx()
2936 ew32(TDH(0), 0); in e1000_configure_tx()
2937 ew32(TDT(0), 0); in e1000_configure_tx()
2948 ew32(TIDV, adapter->tx_int_delay); in e1000_configure_tx()
2950 ew32(TADV, adapter->tx_abs_int_delay); in e1000_configure_tx()
2967 ew32(TXDCTL(0), txdctl); in e1000_configure_tx()
2970 ew32(TXDCTL(1), er32(TXDCTL(0))); in e1000_configure_tx()
2985 ew32(TARC(0), tarc); in e1000_configure_tx()
2992 ew32(TARC(0), tarc); in e1000_configure_tx()
2995 ew32(TARC(1), tarc); in e1000_configure_tx()
3008 ew32(TCTL, tctl); in e1000_configure_tx()
3018 ew32(IOSFPC, reg_val); in e1000_configure_tx()
3027 ew32(TARC(0), reg_val); in e1000_configure_tx()
3123 ew32(RFCTL, rfctl); in e1000_setup_rctl()
3165 ew32(PSRCTL, psrctl); in e1000_setup_rctl()
3185 ew32(RCTL, rctl); in e1000_setup_rctl()
3222 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_configure_rx()
3235 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); in e1000_configure_rx()
3236 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); in e1000_configure_rx()
3240 ew32(RDTR, adapter->rx_int_delay); in e1000_configure_rx()
3243 ew32(RADV, adapter->rx_abs_int_delay); in e1000_configure_rx()
3250 ew32(IAM, 0xffffffff); in e1000_configure_rx()
3251 ew32(CTRL_EXT, ctrl_ext); in e1000_configure_rx()
3258 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32))); in e1000_configure_rx()
3259 ew32(RDBAH(0), (rdba >> 32)); in e1000_configure_rx()
3260 ew32(RDLEN(0), rdlen); in e1000_configure_rx()
3261 ew32(RDH(0), 0); in e1000_configure_rx()
3262 ew32(RDT(0), 0); in e1000_configure_rx()
3278 ew32(RXCSUM, rxcsum); in e1000_configure_rx()
3291 ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8)); in e1000_configure_rx()
3303 ew32(RCTL, rctl); in e1000_configure_rx()
3393 ew32(RAH(rar_entries), 0); in e1000e_write_uc_addr_list()
3394 ew32(RAL(rar_entries), 0); in e1000e_write_uc_addr_list()
3453 ew32(RCTL, rctl); in e1000e_set_rx_mode()
3470 ew32(RSSRK(i), rss_key[i]); in e1000e_setup_rss_hash()
3474 ew32(RETA(i), 0); in e1000e_setup_rss_hash()
3482 ew32(RXCSUM, rxcsum); in e1000e_setup_rss_hash()
3490 ew32(MRQC, mrqc); in e1000e_setup_rss_hash()
3515 ew32(FEXTNVM7, fextnvm7 | BIT(0)); in e1000e_get_base_timinca()
3711 ew32(TSYNCTXCTL, regval); in e1000e_config_hwtstamp()
3722 ew32(TSYNCRXCTL, regval); in e1000e_config_hwtstamp()
3736 ew32(RXMTRL, rxmtrl); in e1000e_config_hwtstamp()
3743 ew32(RXUDP, rxudp); in e1000e_config_hwtstamp()
3823 ew32(TCTL, tctl | E1000_TCTL_EN); in e1000_flush_tx_ring()
3836 ew32(TDT(0), tx_ring->next_to_use); in e1000_flush_tx_ring()
3852 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_flush_rx_ring()
3865 ew32(RXDCTL(0), rxdctl); in e1000_flush_rx_ring()
3867 ew32(RCTL, rctl | E1000_RCTL_EN); in e1000_flush_rx_ring()
3870 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_flush_rx_ring()
3894 ew32(FEXTNVM11, fext_nvm11); in e1000_flush_desc_rings()
3936 ew32(TIMINCA, timinca); in e1000e_systim_reset()
3975 ew32(PBA, pba); in e1000e_reset()
4017 ew32(PBA, pba); in e1000e_reset()
4040 ew32(PBA, pba); in e1000e_reset()
4084 ew32(PBA, pba); in e1000e_reset()
4129 ew32(WUC, 0); in e1000e_reset()
4137 ew32(VET, ETH_P_8021Q); in e1000e_reset()
4199 ew32(FEXTNVM7, reg); in e1000e_reset()
4204 ew32(FEXTNVM9, reg); in e1000e_reset()
4220 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER); in e1000e_trigger_lsc()
4222 ew32(ICS, E1000_ICS_LSC); in e1000e_trigger_lsc()
4249 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000e_flush_descriptors()
4250 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); in e1000e_flush_descriptors()
4258 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000e_flush_descriptors()
4259 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); in e1000e_flush_descriptors()
4288 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000e_down()
4296 ew32(TCTL, tctl); in e1000e_down()
4553 ew32(ICS, E1000_ICS_RXSEQ); in e1000_test_msi_interrupt()
5154 ew32(RCTL, rctl | E1000_RCTL_EN); in e1000e_enable_receives()
5297 ew32(TARC(0), tarc0); in e1000_watchdog_task()
5330 ew32(TCTL, tctl); in e1000_watchdog_task()
5418 ew32(ICS, adapter->rx_ring->ims_val); in e1000_watchdog_task()
5420 ew32(ICS, E1000_ICS_RXDMT0); in e1000_watchdog_task()
6301 ew32(WUFC, wufc); in e1000_init_phy_wakeup()
6302 ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME | in e1000_init_phy_wakeup()
6354 ew32(H2ME, mac_data); in e1000e_s0ix_entry_flow()
6381 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_entry_flow()
6398 ew32(EXTCNF_CTRL, mac_data); in e1000e_s0ix_entry_flow()
6403 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_entry_flow()
6408 ew32(DPGFR, mac_data); in e1000e_s0ix_entry_flow()
6413 ew32(FEXTNVM12, mac_data); in e1000e_s0ix_entry_flow()
6418 ew32(FEXTNVM9, mac_data); in e1000e_s0ix_entry_flow()
6423 ew32(FEXTNVM6, mac_data); in e1000e_s0ix_entry_flow()
6428 ew32(FEXTNVM8, mac_data); in e1000e_s0ix_entry_flow()
6433 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_entry_flow()
6440 ew32(FEXTNVM5, mac_data); in e1000e_s0ix_entry_flow()
6447 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_entry_flow()
6452 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_entry_flow()
6460 ew32(TDFH, 0); in e1000e_s0ix_entry_flow()
6463 ew32(TDFT, 0); in e1000e_s0ix_entry_flow()
6466 ew32(TDFHS, 0); in e1000e_s0ix_entry_flow()
6469 ew32(TDFTS, 0); in e1000e_s0ix_entry_flow()
6472 ew32(TDFPC, 0); in e1000e_s0ix_entry_flow()
6475 ew32(RDFH, 0); in e1000e_s0ix_entry_flow()
6478 ew32(RDFT, 0); in e1000e_s0ix_entry_flow()
6481 ew32(RDFHS, 0); in e1000e_s0ix_entry_flow()
6484 ew32(RDFTS, 0); in e1000e_s0ix_entry_flow()
6487 ew32(RDFPC, 0); in e1000e_s0ix_entry_flow()
6503 ew32(H2ME, mac_data); in e1000e_s0ix_exit_flow()
6532 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_exit_flow()
6537 ew32(FEXTNVM8, mac_data); in e1000e_s0ix_exit_flow()
6542 ew32(FEXTNVM6, mac_data); in e1000e_s0ix_exit_flow()
6547 ew32(FEXTNVM9, mac_data); in e1000e_s0ix_exit_flow()
6554 ew32(FEXTNVM12, mac_data); in e1000e_s0ix_exit_flow()
6561 ew32(DPGFR, mac_data); in e1000e_s0ix_exit_flow()
6566 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_exit_flow()
6573 ew32(FEXTNVM5, mac_data); in e1000e_s0ix_exit_flow()
6599 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_exit_flow()
6605 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_exit_flow()
6611 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_exit_flow()
6675 ew32(RCTL, rctl); in __e1000_shutdown()
6682 ew32(CTRL, ctrl); in __e1000_shutdown()
6690 ew32(CTRL_EXT, ctrl_ext); in __e1000_shutdown()
6706 ew32(WUFC, wufc); in __e1000_shutdown()
6707 ew32(WUC, E1000_WUC_PME_EN); in __e1000_shutdown()
6710 ew32(WUC, 0); in __e1000_shutdown()
6711 ew32(WUFC, 0); in __e1000_shutdown()
6964 ew32(WUS, ~0); in __e1000_resume()
7217 ew32(WUS, ~0); in e1000_io_slot_reset()