182 	u32 command_config;		/* 0x008 Ctrl and cfg */  member
379 	tmp = ioread32be(&regs->command_config);  in reset()
383 	iowrite32be(tmp, &regs->command_config);  in reset()
388 	} while ((ioread32be(&regs->command_config) & CMD_CFG_SW_RESET) &&  in reset()
431 	iowrite32be(tmp, &regs->command_config);  in init()
723 	tmp = ioread32be(&regs->command_config);  in memac_enable()
729 	iowrite32be(tmp, &regs->command_config);  in memac_enable()
742 	tmp = ioread32be(&regs->command_config);  in memac_disable()
748 	iowrite32be(tmp, &regs->command_config);  in memac_disable()
761 	tmp = ioread32be(&regs->command_config);  in memac_set_promiscuous()
767 	iowrite32be(tmp, &regs->command_config);  in memac_set_promiscuous()
857 	tmp = ioread32be(&regs->command_config);  in memac_set_tx_pause_frames()
860 	iowrite32be(tmp, &regs->command_config);  in memac_set_tx_pause_frames()
889 	tmp = ioread32be(&regs->command_config);  in memac_accept_rx_pause_frames()
895 	iowrite32be(tmp, &regs->command_config);  in memac_accept_rx_pause_frames()
1078 		reg32 = ioread32be(&memac->regs->command_config);  in memac_init()
1080 		iowrite32be(reg32, &memac->regs->command_config);  in memac_init()