Lines Matching +full:num +full:- +full:ss +full:- +full:bits
23 * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
179 unsigned int in_use; /* # of in-use command descriptors */
227 unsigned int avail; /* available bits - quota */
237 unsigned int max_avail; /* max bits to be sent to any port */
239 unsigned int num; /* num skbs in per port queues */ member
264 unsigned int intrtimer_nres; /* no-resource interrupt timer */
265 unsigned int fixed_intrtimer;/* non-adaptive interrupt timer */
286 struct sched *s = sge->tx_sched; in tx_sched_stop()
289 tasklet_kill(&s->sched_tsk); in tx_sched_stop()
292 __skb_queue_purge(&s->p[s->port].skbq); in tx_sched_stop()
297 * re-computes scheduler parameters to scope with the change.
302 struct sched *s = sge->tx_sched; in t1_sched_update_parms()
303 struct sched_port *p = &s->p[port]; in t1_sched_update_parms()
308 p->speed = speed; in t1_sched_update_parms()
310 p->mtu = mtu; in t1_sched_update_parms()
313 unsigned long long drain = 1024ULL * p->speed * (p->mtu - 40); in t1_sched_update_parms()
314 do_div(drain, (p->mtu + 50) * 1000); in t1_sched_update_parms()
315 p->drain_bits_per_1024ns = (unsigned int) drain; in t1_sched_update_parms()
317 if (p->speed < 1000) in t1_sched_update_parms()
318 p->drain_bits_per_1024ns = in t1_sched_update_parms()
319 90 * p->drain_bits_per_1024ns / 100; in t1_sched_update_parms()
322 if (board_info(sge->adapter)->board == CHBT_BOARD_CHT204) { in t1_sched_update_parms()
323 p->drain_bits_per_1024ns -= 16; in t1_sched_update_parms()
324 s->max_avail = max(4096U, p->mtu + 16 + 14 + 4); in t1_sched_update_parms()
325 max_avail_segs = max(1U, 4096 / (p->mtu - 40)); in t1_sched_update_parms()
327 s->max_avail = 16384; in t1_sched_update_parms()
328 max_avail_segs = max(1U, 9000 / (p->mtu - 40)); in t1_sched_update_parms()
332 "max_avail_segs %u drain_bits_per_1024ns %u\n", p->mtu, in t1_sched_update_parms()
333 p->speed, s->max_avail, max_avail_segs, in t1_sched_update_parms()
334 p->drain_bits_per_1024ns); in t1_sched_update_parms()
336 return max_avail_segs * (p->mtu - 40); in t1_sched_update_parms()
347 struct sched *s = sge->tx_sched;
350 s->max_avail = val;
362 struct sched *s = sge->tx_sched;
363 struct sched_port *p = &s->p[port];
364 p->drain_bits_per_1024ns = val * 1024 / 1000;
380 return -ENOMEM; in tx_sched_init()
383 tasklet_setup(&s->sched_tsk, restart_sched); in tx_sched_init()
384 s->sge = sge; in tx_sched_init()
385 sge->tx_sched = s; in tx_sched_init()
388 skb_queue_head_init(&s->p[i].skbq); in tx_sched_init()
397 * and updates the per port quota (number of bits that can be sent to the any
402 struct sched *s = sge->tx_sched; in sched_update_avail()
407 delta_time_ns = ktime_to_ns(ktime_sub(now, s->last_updated)); in sched_update_avail()
414 struct sched_port *p = &s->p[i]; in sched_update_avail()
417 delta_avail = (p->drain_bits_per_1024ns * delta_time_ns) >> 13; in sched_update_avail()
418 p->avail = min(p->avail + delta_avail, s->max_avail); in sched_update_avail()
421 s->last_updated = now; in sched_update_avail()
437 struct sched *s = sge->tx_sched; in sched_skb()
443 if (!s->num) in sched_skb()
446 skbq = &s->p[skb->dev->if_port].skbq; in sched_skb()
448 s->num++; in sched_skb()
457 s->port = (s->port + 1) & (MAX_NPORTS - 1); in sched_skb()
458 skbq = &s->p[s->port].skbq; in sched_skb()
465 len = skb->len; in sched_skb()
466 if (len <= s->p[s->port].avail) { in sched_skb()
467 s->p[s->port].avail -= len; in sched_skb()
468 s->num--; in sched_skb()
475 if (update-- && sched_update_avail(sge)) in sched_skb()
482 if (s->num && !skb) { in sched_skb()
483 struct cmdQ *q = &sge->cmdQ[0]; in sched_skb()
484 clear_bit(CMDQ_STAT_LAST_PKT_DB, &q->status); in sched_skb()
485 if (test_and_set_bit(CMDQ_STAT_RUNNING, &q->status) == 0) { in sched_skb()
486 set_bit(CMDQ_STAT_LAST_PKT_DB, &q->status); in sched_skb()
487 writel(F_CMDQ0_ENABLE, sge->adapter->regs + A_SG_DOORBELL); in sched_skb()
501 writel(val, adapter->regs + A_SG_DOORBELL); in doorbell_pio()
510 unsigned int cidx = q->cidx; in free_freelQ_buffers()
512 while (q->credits--) { in free_freelQ_buffers()
513 struct freelQ_ce *ce = &q->centries[cidx]; in free_freelQ_buffers()
515 dma_unmap_single(&pdev->dev, dma_unmap_addr(ce, dma_addr), in free_freelQ_buffers()
517 dev_kfree_skb(ce->skb); in free_freelQ_buffers()
518 ce->skb = NULL; in free_freelQ_buffers()
519 if (++cidx == q->size) in free_freelQ_buffers()
529 struct pci_dev *pdev = sge->adapter->pdev; in free_rx_resources()
532 if (sge->respQ.entries) { in free_rx_resources()
533 size = sizeof(struct respQ_e) * sge->respQ.size; in free_rx_resources()
534 dma_free_coherent(&pdev->dev, size, sge->respQ.entries, in free_rx_resources()
535 sge->respQ.dma_addr); in free_rx_resources()
539 struct freelQ *q = &sge->freelQ[i]; in free_rx_resources()
541 if (q->centries) { in free_rx_resources()
543 kfree(q->centries); in free_rx_resources()
545 if (q->entries) { in free_rx_resources()
546 size = sizeof(struct freelQ_e) * q->size; in free_rx_resources()
547 dma_free_coherent(&pdev->dev, size, q->entries, in free_rx_resources()
548 q->dma_addr); in free_rx_resources()
559 struct pci_dev *pdev = sge->adapter->pdev; in alloc_rx_resources()
563 struct freelQ *q = &sge->freelQ[i]; in alloc_rx_resources()
565 q->genbit = 1; in alloc_rx_resources()
566 q->size = p->freelQ_size[i]; in alloc_rx_resources()
567 q->dma_offset = sge->rx_pkt_pad ? 0 : NET_IP_ALIGN; in alloc_rx_resources()
568 size = sizeof(struct freelQ_e) * q->size; in alloc_rx_resources()
569 q->entries = dma_alloc_coherent(&pdev->dev, size, in alloc_rx_resources()
570 &q->dma_addr, GFP_KERNEL); in alloc_rx_resources()
571 if (!q->entries) in alloc_rx_resources()
574 size = sizeof(struct freelQ_ce) * q->size; in alloc_rx_resources()
575 q->centries = kzalloc(size, GFP_KERNEL); in alloc_rx_resources()
576 if (!q->centries) in alloc_rx_resources()
587 sge->freelQ[!sge->jumbo_fl].rx_buffer_size = SGE_RX_SM_BUF_SIZE + in alloc_rx_resources()
589 sge->freelQ[!sge->jumbo_fl].dma_offset; in alloc_rx_resources()
591 size = (16 * 1024) - SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); in alloc_rx_resources()
593 sge->freelQ[sge->jumbo_fl].rx_buffer_size = size; in alloc_rx_resources()
599 sge->freelQ[!sge->jumbo_fl].recycleq_idx = 0; in alloc_rx_resources()
600 sge->freelQ[sge->jumbo_fl].recycleq_idx = 1; in alloc_rx_resources()
602 sge->respQ.genbit = 1; in alloc_rx_resources()
603 sge->respQ.size = SGE_RESPQ_E_N; in alloc_rx_resources()
604 sge->respQ.credits = 0; in alloc_rx_resources()
605 size = sizeof(struct respQ_e) * sge->respQ.size; in alloc_rx_resources()
606 sge->respQ.entries = in alloc_rx_resources()
607 dma_alloc_coherent(&pdev->dev, size, &sge->respQ.dma_addr, in alloc_rx_resources()
609 if (!sge->respQ.entries) in alloc_rx_resources()
615 return -ENOMEM; in alloc_rx_resources()
624 struct pci_dev *pdev = sge->adapter->pdev; in free_cmdQ_buffers()
625 unsigned int cidx = q->cidx; in free_cmdQ_buffers()
627 q->in_use -= n; in free_cmdQ_buffers()
628 ce = &q->centries[cidx]; in free_cmdQ_buffers()
629 while (n--) { in free_cmdQ_buffers()
631 dma_unmap_single(&pdev->dev, in free_cmdQ_buffers()
635 if (q->sop) in free_cmdQ_buffers()
636 q->sop = 0; in free_cmdQ_buffers()
638 if (ce->skb) { in free_cmdQ_buffers()
639 dev_kfree_skb_any(ce->skb); in free_cmdQ_buffers()
640 q->sop = 1; in free_cmdQ_buffers()
643 if (++cidx == q->size) { in free_cmdQ_buffers()
645 ce = q->centries; in free_cmdQ_buffers()
648 q->cidx = cidx; in free_cmdQ_buffers()
658 struct pci_dev *pdev = sge->adapter->pdev; in free_tx_resources()
662 struct cmdQ *q = &sge->cmdQ[i]; in free_tx_resources()
664 if (q->centries) { in free_tx_resources()
665 if (q->in_use) in free_tx_resources()
666 free_cmdQ_buffers(sge, q, q->in_use); in free_tx_resources()
667 kfree(q->centries); in free_tx_resources()
669 if (q->entries) { in free_tx_resources()
670 size = sizeof(struct cmdQ_e) * q->size; in free_tx_resources()
671 dma_free_coherent(&pdev->dev, size, q->entries, in free_tx_resources()
672 q->dma_addr); in free_tx_resources()
682 struct pci_dev *pdev = sge->adapter->pdev; in alloc_tx_resources()
686 struct cmdQ *q = &sge->cmdQ[i]; in alloc_tx_resources()
688 q->genbit = 1; in alloc_tx_resources()
689 q->sop = 1; in alloc_tx_resources()
690 q->size = p->cmdQ_size[i]; in alloc_tx_resources()
691 q->in_use = 0; in alloc_tx_resources()
692 q->status = 0; in alloc_tx_resources()
693 q->processed = q->cleaned = 0; in alloc_tx_resources()
694 q->stop_thres = 0; in alloc_tx_resources()
695 spin_lock_init(&q->lock); in alloc_tx_resources()
696 size = sizeof(struct cmdQ_e) * q->size; in alloc_tx_resources()
697 q->entries = dma_alloc_coherent(&pdev->dev, size, in alloc_tx_resources()
698 &q->dma_addr, GFP_KERNEL); in alloc_tx_resources()
699 if (!q->entries) in alloc_tx_resources()
702 size = sizeof(struct cmdQ_ce) * q->size; in alloc_tx_resources()
703 q->centries = kzalloc(size, GFP_KERNEL); in alloc_tx_resources()
704 if (!q->centries) in alloc_tx_resources()
715 sge->cmdQ[0].stop_thres = sge->adapter->params.nports * in alloc_tx_resources()
721 return -ENOMEM; in alloc_tx_resources()
728 writel((u32)addr, adapter->regs + base_reg_lo); in setup_ring_params()
729 writel(addr >> 32, adapter->regs + base_reg_hi); in setup_ring_params()
730 writel(size, adapter->regs + size_reg); in setup_ring_params()
738 struct sge *sge = adapter->sge; in t1_vlan_mode()
741 sge->sge_control |= F_VLAN_XTRACT; in t1_vlan_mode()
743 sge->sge_control &= ~F_VLAN_XTRACT; in t1_vlan_mode()
744 if (adapter->open_device_map) { in t1_vlan_mode()
745 writel(sge->sge_control, adapter->regs + A_SG_CONTROL); in t1_vlan_mode()
746 readl(adapter->regs + A_SG_CONTROL); /* flush */ in t1_vlan_mode()
752 * but sge->sge_control is setup and ready to go.
756 struct adapter *ap = sge->adapter; in configure_sge()
758 writel(0, ap->regs + A_SG_CONTROL); in configure_sge()
759 setup_ring_params(ap, sge->cmdQ[0].dma_addr, sge->cmdQ[0].size, in configure_sge()
761 setup_ring_params(ap, sge->cmdQ[1].dma_addr, sge->cmdQ[1].size, in configure_sge()
763 setup_ring_params(ap, sge->freelQ[0].dma_addr, in configure_sge()
764 sge->freelQ[0].size, A_SG_FL0BASELWR, in configure_sge()
766 setup_ring_params(ap, sge->freelQ[1].dma_addr, in configure_sge()
767 sge->freelQ[1].size, A_SG_FL1BASELWR, in configure_sge()
771 writel(SGE_RX_SM_BUF_SIZE + 1, ap->regs + A_SG_FLTHRESHOLD); in configure_sge()
773 setup_ring_params(ap, sge->respQ.dma_addr, sge->respQ.size, in configure_sge()
775 writel((u32)sge->respQ.size - 1, ap->regs + A_SG_RSPQUEUECREDIT); in configure_sge()
777 sge->sge_control = F_CMDQ0_ENABLE | F_CMDQ1_ENABLE | F_FL0_ENABLE | in configure_sge()
780 V_RX_PKT_OFFSET(sge->rx_pkt_pad); in configure_sge()
783 sge->sge_control |= F_ENABLE_BIG_ENDIAN; in configure_sge()
786 /* Initialize no-resource timer */ in configure_sge()
787 sge->intrtimer_nres = SGE_INTRTIMER_NRES * core_ticks_per_usec(ap); in configure_sge()
793 * Return the payload capacity of the jumbo free-list buffers.
797 return sge->freelQ[sge->jumbo_fl].rx_buffer_size - in jumbo_payload_capacity()
798 sge->freelQ[sge->jumbo_fl].dma_offset - in jumbo_payload_capacity()
809 for_each_port(sge->adapter, i) in t1_sge_destroy()
810 free_percpu(sge->port_stats[i]); in t1_sge_destroy()
812 kfree(sge->tx_sched); in t1_sge_destroy()
822 * It is possible that the generation bits already match, indicating that the
826 * If the SGE doesn't automatically align packets properly (!sge->rx_pkt_pad),
832 struct pci_dev *pdev = sge->adapter->pdev; in refill_free_list()
833 struct freelQ_ce *ce = &q->centries[q->pidx]; in refill_free_list()
834 struct freelQ_e *e = &q->entries[q->pidx]; in refill_free_list()
835 unsigned int dma_len = q->rx_buffer_size - q->dma_offset; in refill_free_list()
837 while (q->credits < q->size) { in refill_free_list()
841 skb = dev_alloc_skb(q->rx_buffer_size); in refill_free_list()
845 skb_reserve(skb, q->dma_offset); in refill_free_list()
846 mapping = dma_map_single(&pdev->dev, skb->data, dma_len, in refill_free_list()
848 skb_reserve(skb, sge->rx_pkt_pad); in refill_free_list()
850 ce->skb = skb; in refill_free_list()
853 e->addr_lo = (u32)mapping; in refill_free_list()
854 e->addr_hi = (u64)mapping >> 32; in refill_free_list()
855 e->len_gen = V_CMD_LEN(dma_len) | V_CMD_GEN1(q->genbit); in refill_free_list()
857 e->gen2 = V_CMD_GEN2(q->genbit); in refill_free_list()
861 if (++q->pidx == q->size) { in refill_free_list()
862 q->pidx = 0; in refill_free_list()
863 q->genbit ^= 1; in refill_free_list()
864 ce = q->centries; in refill_free_list()
865 e = q->entries; in refill_free_list()
867 q->credits++; in refill_free_list()
878 struct adapter *adapter = sge->adapter; in freelQs_empty()
879 u32 irq_reg = readl(adapter->regs + A_SG_INT_ENABLE); in freelQs_empty()
882 refill_free_list(sge, &sge->freelQ[0]); in freelQs_empty()
883 refill_free_list(sge, &sge->freelQ[1]); in freelQs_empty()
885 if (sge->freelQ[0].credits > (sge->freelQ[0].size >> 2) && in freelQs_empty()
886 sge->freelQ[1].credits > (sge->freelQ[1].size >> 2)) { in freelQs_empty()
888 irqholdoff_reg = sge->fixed_intrtimer; in freelQs_empty()
892 irqholdoff_reg = sge->intrtimer_nres; in freelQs_empty()
894 writel(irqholdoff_reg, adapter->regs + A_SG_INTRTIMER); in freelQs_empty()
895 writel(irq_reg, adapter->regs + A_SG_INT_ENABLE); in freelQs_empty()
911 u32 val = readl(sge->adapter->regs + A_PL_ENABLE); in t1_sge_intr_disable()
913 writel(val & ~SGE_PL_INTR_MASK, sge->adapter->regs + A_PL_ENABLE); in t1_sge_intr_disable()
914 writel(0, sge->adapter->regs + A_SG_INT_ENABLE); in t1_sge_intr_disable()
923 u32 val = readl(sge->adapter->regs + A_PL_ENABLE); in t1_sge_intr_enable()
925 if (sge->adapter->port[0].dev->hw_features & NETIF_F_TSO) in t1_sge_intr_enable()
927 writel(en, sge->adapter->regs + A_SG_INT_ENABLE); in t1_sge_intr_enable()
928 writel(val | SGE_PL_INTR_MASK, sge->adapter->regs + A_PL_ENABLE); in t1_sge_intr_enable()
936 writel(SGE_PL_INTR_MASK, sge->adapter->regs + A_PL_CAUSE); in t1_sge_intr_clear()
937 writel(0xffffffff, sge->adapter->regs + A_SG_INT_CAUSE); in t1_sge_intr_clear()
945 struct adapter *adapter = sge->adapter; in t1_sge_intr_error_handler()
946 u32 cause = readl(adapter->regs + A_SG_INT_CAUSE); in t1_sge_intr_error_handler()
949 if (adapter->port[0].dev->hw_features & NETIF_F_TSO) in t1_sge_intr_error_handler()
952 sge->stats.respQ_empty++; in t1_sge_intr_error_handler()
954 sge->stats.respQ_overflow++; in t1_sge_intr_error_handler()
956 adapter->name); in t1_sge_intr_error_handler()
959 sge->stats.freelistQ_empty++; in t1_sge_intr_error_handler()
963 sge->stats.pkt_too_big++; in t1_sge_intr_error_handler()
965 adapter->name); in t1_sge_intr_error_handler()
968 sge->stats.pkt_mismatch++; in t1_sge_intr_error_handler()
969 pr_alert("%s: SGE packet mismatch\n", adapter->name); in t1_sge_intr_error_handler()
973 adapter->pending_thread_intr |= F_PL_INTR_SGE_ERR; in t1_sge_intr_error_handler()
977 writel(cause, adapter->regs + A_SG_INT_CAUSE); in t1_sge_intr_error_handler()
983 return &sge->stats; in t1_sge_get_intr_counts()
987 struct sge_port_stats *ss) in t1_sge_get_port_stats() argument
991 memset(ss, 0, sizeof(*ss)); in t1_sge_get_port_stats()
993 struct sge_port_stats *st = per_cpu_ptr(sge->port_stats[port], cpu); in t1_sge_get_port_stats()
995 ss->rx_cso_good += st->rx_cso_good; in t1_sge_get_port_stats()
996 ss->tx_cso += st->tx_cso; in t1_sge_get_port_stats()
997 ss->tx_tso += st->tx_tso; in t1_sge_get_port_stats()
998 ss->tx_need_hdrroom += st->tx_need_hdrroom; in t1_sge_get_port_stats()
999 ss->vlan_xtract += st->vlan_xtract; in t1_sge_get_port_stats()
1000 ss->vlan_insert += st->vlan_insert; in t1_sge_get_port_stats()
1005 * recycle_fl_buf - recycle a free list buffer
1014 struct freelQ_e *from = &fl->entries[idx]; in recycle_fl_buf()
1015 struct freelQ_e *to = &fl->entries[fl->pidx]; in recycle_fl_buf()
1017 fl->centries[fl->pidx] = fl->centries[idx]; in recycle_fl_buf()
1018 to->addr_lo = from->addr_lo; in recycle_fl_buf()
1019 to->addr_hi = from->addr_hi; in recycle_fl_buf()
1020 to->len_gen = G_CMD_LEN(from->len_gen) | V_CMD_GEN1(fl->genbit); in recycle_fl_buf()
1022 to->gen2 = V_CMD_GEN2(fl->genbit); in recycle_fl_buf()
1023 fl->credits++; in recycle_fl_buf()
1025 if (++fl->pidx == fl->size) { in recycle_fl_buf()
1026 fl->pidx = 0; in recycle_fl_buf()
1027 fl->genbit ^= 1; in recycle_fl_buf()
1036 * get_packet - return the next ingress packet buffer
1052 const struct freelQ_ce *ce = &fl->centries[fl->cidx]; in get_packet()
1053 struct pci_dev *pdev = adapter->pdev; in get_packet()
1057 skb = napi_alloc_skb(&adapter->napi, len); in get_packet()
1062 dma_sync_single_for_cpu(&pdev->dev, in get_packet()
1066 skb_copy_from_linear_data(ce->skb, skb->data, len); in get_packet()
1067 dma_sync_single_for_device(&pdev->dev, in get_packet()
1071 recycle_fl_buf(fl, fl->cidx); in get_packet()
1076 if (fl->credits < 2) { in get_packet()
1077 recycle_fl_buf(fl, fl->cidx); in get_packet()
1081 dma_unmap_single(&pdev->dev, dma_unmap_addr(ce, dma_addr), in get_packet()
1083 skb = ce->skb; in get_packet()
1084 prefetch(skb->data); in get_packet()
1091 * unexpected_offload - handle an unexpected offload packet
1101 struct freelQ_ce *ce = &fl->centries[fl->cidx]; in unexpected_offload()
1102 struct sk_buff *skb = ce->skb; in unexpected_offload()
1104 dma_sync_single_for_cpu(&adapter->pdev->dev, in unexpected_offload()
1108 adapter->name, *skb->data); in unexpected_offload()
1109 recycle_fl_buf(fl, fl->cidx); in unexpected_offload()
1127 unsigned int nfrags = skb_shinfo(skb)->nr_frags; in compute_large_page_tx_descs()
1131 len -= SGE_TX_DESC_MAX_PLEN; in compute_large_page_tx_descs()
1133 for (i = 0; nfrags--; i++) { in compute_large_page_tx_descs()
1134 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in compute_large_page_tx_descs()
1138 len -= SGE_TX_DESC_MAX_PLEN; in compute_large_page_tx_descs()
1157 e->addr_lo = (u32)mapping; in write_tx_desc()
1158 e->addr_hi = (u64)mapping >> 32; in write_tx_desc()
1159 e->len_gen = V_CMD_LEN(len) | V_CMD_GEN1(gen); in write_tx_desc()
1160 e->flags = F_CMD_DATAVALID | V_CMD_EOP(eop) | V_CMD_GEN2(gen); in write_tx_desc()
1183 *desc_len -= SGE_TX_DESC_MAX_PLEN; in write_large_page_tx_descs()
1186 ce1->skb = NULL; in write_large_page_tx_descs()
1192 if (++pidx == q->size) { in write_large_page_tx_descs()
1195 ce1 = q->centries; in write_large_page_tx_descs()
1196 e1 = q->entries; in write_large_page_tx_descs()
1218 nfrags = skb_shinfo(skb)->nr_frags; in write_tx_descs()
1220 e = e1 = &q->entries[pidx]; in write_tx_descs()
1221 ce = &q->centries[pidx]; in write_tx_descs()
1223 mapping = dma_map_single(&adapter->pdev->dev, skb->data, in write_tx_descs()
1234 e->addr_lo = (u32)desc_mapping; in write_tx_descs()
1235 e->addr_hi = (u64)desc_mapping >> 32; in write_tx_descs()
1236 e->len_gen = V_CMD_LEN(first_desc_len) | V_CMD_GEN1(gen); in write_tx_descs()
1237 ce->skb = NULL; in write_tx_descs()
1243 desc_len -= first_desc_len; in write_tx_descs()
1246 if (++pidx == q->size) { in write_tx_descs()
1249 e1 = q->entries; in write_tx_descs()
1250 ce = q->centries; in write_tx_descs()
1261 ce->skb = NULL; in write_tx_descs()
1265 for (i = 0; nfrags--; i++) { in write_tx_descs()
1266 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in write_tx_descs()
1269 if (++pidx == q->size) { in write_tx_descs()
1272 e1 = q->entries; in write_tx_descs()
1273 ce = q->centries; in write_tx_descs()
1276 mapping = skb_frag_dma_map(&adapter->pdev->dev, frag, 0, in write_tx_descs()
1287 ce->skb = NULL; in write_tx_descs()
1291 ce->skb = skb; in write_tx_descs()
1293 e->flags = flags; in write_tx_descs()
1301 unsigned int reclaim = q->processed - q->cleaned; in reclaim_completed_tx()
1305 q->processed, q->cleaned); in reclaim_completed_tx()
1307 q->cleaned += reclaim; in reclaim_completed_tx()
1318 struct sge *sge = s->sge; in restart_sched()
1319 struct adapter *adapter = sge->adapter; in restart_sched()
1320 struct cmdQ *q = &sge->cmdQ[0]; in restart_sched()
1324 spin_lock(&q->lock); in restart_sched()
1327 credits = q->size - q->in_use; in restart_sched()
1331 count = 1 + skb_shinfo(skb)->nr_frags; in restart_sched()
1333 q->in_use += count; in restart_sched()
1334 genbit = q->genbit; in restart_sched()
1335 pidx = q->pidx; in restart_sched()
1336 q->pidx += count; in restart_sched()
1337 if (q->pidx >= q->size) { in restart_sched()
1338 q->pidx -= q->size; in restart_sched()
1339 q->genbit ^= 1; in restart_sched()
1342 credits = q->size - q->in_use; in restart_sched()
1347 clear_bit(CMDQ_STAT_LAST_PKT_DB, &q->status); in restart_sched()
1348 if (test_and_set_bit(CMDQ_STAT_RUNNING, &q->status) == 0) { in restart_sched()
1349 set_bit(CMDQ_STAT_LAST_PKT_DB, &q->status); in restart_sched()
1350 writel(F_CMDQ0_ENABLE, adapter->regs + A_SG_DOORBELL); in restart_sched()
1353 spin_unlock(&q->lock); in restart_sched()
1357 * sge_rx - process an ingress ethernet packet
1368 struct adapter *adapter = sge->adapter; in sge_rx()
1372 skb = get_packet(adapter, fl, len - sge->rx_pkt_pad); in sge_rx()
1374 sge->stats.rx_drops++; in sge_rx()
1378 p = (const struct cpl_rx_pkt *) skb->data; in sge_rx()
1379 if (p->iff >= adapter->params.nports) { in sge_rx()
1385 st = this_cpu_ptr(sge->port_stats[p->iff]); in sge_rx()
1386 dev = adapter->port[p->iff].dev; in sge_rx()
1388 skb->protocol = eth_type_trans(skb, dev); in sge_rx()
1389 if ((dev->features & NETIF_F_RXCSUM) && p->csum == 0xffff && in sge_rx()
1390 skb->protocol == htons(ETH_P_IP) && in sge_rx()
1391 (skb->data[9] == IPPROTO_TCP || skb->data[9] == IPPROTO_UDP)) { in sge_rx()
1392 ++st->rx_cso_good; in sge_rx()
1393 skb->ip_summed = CHECKSUM_UNNECESSARY; in sge_rx()
1397 if (p->vlan_valid) { in sge_rx()
1398 st->vlan_xtract++; in sge_rx()
1399 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), ntohs(p->vlan)); in sge_rx()
1410 unsigned int r = q->processed - q->cleaned; in enough_free_Tx_descs()
1412 return q->in_use - r < (q->size >> 1); in enough_free_Tx_descs()
1421 struct adapter *adap = sge->adapter; in restart_tx_queues()
1424 if (!enough_free_Tx_descs(&sge->cmdQ[0])) in restart_tx_queues()
1428 struct net_device *nd = adap->port[i].dev; in restart_tx_queues()
1430 if (test_and_clear_bit(nd->if_port, &sge->stopped_tx_queues) && in restart_tx_queues()
1432 sge->stats.cmdQ_restarted[2]++; in restart_tx_queues()
1446 struct sge *sge = adapter->sge; in update_tx_info()
1447 struct cmdQ *cmdq = &sge->cmdQ[0]; in update_tx_info()
1449 cmdq->processed += pr0; in update_tx_info()
1455 clear_bit(CMDQ_STAT_RUNNING, &cmdq->status); in update_tx_info()
1457 if (cmdq->cleaned + cmdq->in_use != cmdq->processed && in update_tx_info()
1458 !test_and_set_bit(CMDQ_STAT_LAST_PKT_DB, &cmdq->status)) { in update_tx_info()
1459 set_bit(CMDQ_STAT_RUNNING, &cmdq->status); in update_tx_info()
1460 writel(F_CMDQ0_ENABLE, adapter->regs + A_SG_DOORBELL); in update_tx_info()
1462 if (sge->tx_sched) in update_tx_info()
1463 tasklet_hi_schedule(&sge->tx_sched->sched_tsk); in update_tx_info()
1468 if (unlikely(sge->stopped_tx_queues != 0)) in update_tx_info()
1480 struct sge *sge = adapter->sge; in process_responses()
1481 struct respQ *q = &sge->respQ; in process_responses()
1482 struct respQ_e *e = &q->entries[q->cidx]; in process_responses()
1487 while (done < budget && e->GenerationBit == q->genbit) { in process_responses()
1488 flags |= e->Qsleeping; in process_responses()
1490 cmdq_processed[0] += e->Cmdq0CreditReturn; in process_responses()
1491 cmdq_processed[1] += e->Cmdq1CreditReturn; in process_responses()
1494 * ping-pong of TX state information on MP where the sender in process_responses()
1503 sge->cmdQ[1].processed += cmdq_processed[1]; in process_responses()
1507 if (likely(e->DataValid)) { in process_responses()
1508 struct freelQ *fl = &sge->freelQ[e->FreelistQid]; in process_responses()
1510 BUG_ON(!e->Sop || !e->Eop); in process_responses()
1511 if (unlikely(e->Offload)) in process_responses()
1514 sge_rx(sge, fl, e->BufferLength); in process_responses()
1520 * single free-list buffer; cf. the BUG above. in process_responses()
1522 if (++fl->cidx == fl->size) in process_responses()
1523 fl->cidx = 0; in process_responses()
1524 prefetch(fl->centries[fl->cidx].skb); in process_responses()
1526 if (unlikely(--fl->credits < in process_responses()
1527 fl->size - SGE_FREEL_REFILL_THRESH)) in process_responses()
1530 sge->stats.pure_rsps++; in process_responses()
1533 if (unlikely(++q->cidx == q->size)) { in process_responses()
1534 q->cidx = 0; in process_responses()
1535 q->genbit ^= 1; in process_responses()
1536 e = q->entries; in process_responses()
1540 if (++q->credits > SGE_RESPQ_REPLENISH_THRES) { in process_responses()
1541 writel(q->credits, adapter->regs + A_SG_RSPQUEUECREDIT); in process_responses()
1542 q->credits = 0; in process_responses()
1547 sge->cmdQ[1].processed += cmdq_processed[1]; in process_responses()
1554 const struct respQ *Q = &adapter->sge->respQ; in responses_pending()
1555 const struct respQ_e *e = &Q->entries[Q->cidx]; in responses_pending()
1557 return e->GenerationBit == Q->genbit; in responses_pending()
1562 * non data-carrying) responses. Such respones are too light-weight to justify
1566 * encounters a valid data-carrying response, 0 otherwise.
1570 struct sge *sge = adapter->sge; in process_pure_responses()
1571 struct respQ *q = &sge->respQ; in process_pure_responses()
1572 struct respQ_e *e = &q->entries[q->cidx]; in process_pure_responses()
1573 const struct freelQ *fl = &sge->freelQ[e->FreelistQid]; in process_pure_responses()
1577 prefetch(fl->centries[fl->cidx].skb); in process_pure_responses()
1578 if (e->DataValid) in process_pure_responses()
1582 flags |= e->Qsleeping; in process_pure_responses()
1584 cmdq_processed[0] += e->Cmdq0CreditReturn; in process_pure_responses()
1585 cmdq_processed[1] += e->Cmdq1CreditReturn; in process_pure_responses()
1588 if (unlikely(++q->cidx == q->size)) { in process_pure_responses()
1589 q->cidx = 0; in process_pure_responses()
1590 q->genbit ^= 1; in process_pure_responses()
1591 e = q->entries; in process_pure_responses()
1595 if (++q->credits > SGE_RESPQ_REPLENISH_THRES) { in process_pure_responses()
1596 writel(q->credits, adapter->regs + A_SG_RSPQUEUECREDIT); in process_pure_responses()
1597 q->credits = 0; in process_pure_responses()
1599 sge->stats.pure_rsps++; in process_pure_responses()
1600 } while (e->GenerationBit == q->genbit && !e->DataValid); in process_pure_responses()
1603 sge->cmdQ[1].processed += cmdq_processed[1]; in process_pure_responses()
1605 return e->GenerationBit == q->genbit; in process_pure_responses()
1620 writel(adapter->sge->respQ.cidx, in t1_poll()
1621 adapter->regs + A_SG_SLEEPING); in t1_poll()
1631 spin_lock_irq(&adapter->async_lock); in t1_interrupt_thread()
1632 pending_thread_intr = adapter->pending_thread_intr; in t1_interrupt_thread()
1633 adapter->pending_thread_intr = 0; in t1_interrupt_thread()
1634 spin_unlock_irq(&adapter->async_lock); in t1_interrupt_thread()
1645 adapter->name); in t1_interrupt_thread()
1646 t1_sge_stop(adapter->sge); in t1_interrupt_thread()
1650 spin_lock_irq(&adapter->async_lock); in t1_interrupt_thread()
1651 adapter->slow_intr_mask |= F_PL_INTR_EXT; in t1_interrupt_thread()
1653 writel(F_PL_INTR_EXT, adapter->regs + A_PL_CAUSE); in t1_interrupt_thread()
1654 writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA, in t1_interrupt_thread()
1655 adapter->regs + A_PL_ENABLE); in t1_interrupt_thread()
1656 spin_unlock_irq(&adapter->async_lock); in t1_interrupt_thread()
1664 struct sge *sge = adapter->sge; in t1_interrupt()
1668 writel(F_PL_INTR_SGE_DATA, adapter->regs + A_PL_CAUSE); in t1_interrupt()
1670 if (napi_schedule_prep(&adapter->napi)) { in t1_interrupt()
1672 __napi_schedule(&adapter->napi); in t1_interrupt()
1675 writel(sge->respQ.cidx, adapter->regs + A_SG_SLEEPING); in t1_interrupt()
1677 napi_enable(&adapter->napi); in t1_interrupt()
1683 spin_lock(&adapter->async_lock); in t1_interrupt()
1685 spin_unlock(&adapter->async_lock); in t1_interrupt()
1688 sge->stats.unhandled_irqs++; in t1_interrupt()
1709 struct sge *sge = adapter->sge; in t1_sge_tx()
1710 struct cmdQ *q = &sge->cmdQ[qid]; in t1_sge_tx()
1713 spin_lock(&q->lock); in t1_sge_tx()
1717 pidx = q->pidx; in t1_sge_tx()
1718 credits = q->size - q->in_use; in t1_sge_tx()
1719 count = 1 + skb_shinfo(skb)->nr_frags; in t1_sge_tx()
1726 set_bit(dev->if_port, &sge->stopped_tx_queues); in t1_sge_tx()
1727 sge->stats.cmdQ_full[2]++; in t1_sge_tx()
1729 adapter->name); in t1_sge_tx()
1731 spin_unlock(&q->lock); in t1_sge_tx()
1735 if (unlikely(credits - count < q->stop_thres)) { in t1_sge_tx()
1737 set_bit(dev->if_port, &sge->stopped_tx_queues); in t1_sge_tx()
1738 sge->stats.cmdQ_full[2]++; in t1_sge_tx()
1744 if (sge->tx_sched && !qid && skb->dev) { in t1_sge_tx()
1752 spin_unlock(&q->lock); in t1_sge_tx()
1755 pidx = q->pidx; in t1_sge_tx()
1756 count = 1 + skb_shinfo(skb)->nr_frags; in t1_sge_tx()
1760 q->in_use += count; in t1_sge_tx()
1761 genbit = q->genbit; in t1_sge_tx()
1762 pidx = q->pidx; in t1_sge_tx()
1763 q->pidx += count; in t1_sge_tx()
1764 if (q->pidx >= q->size) { in t1_sge_tx()
1765 q->pidx -= q->size; in t1_sge_tx()
1766 q->genbit ^= 1; in t1_sge_tx()
1768 spin_unlock(&q->lock); in t1_sge_tx()
1782 clear_bit(CMDQ_STAT_LAST_PKT_DB, &q->status); in t1_sge_tx()
1783 if (test_and_set_bit(CMDQ_STAT_RUNNING, &q->status) == 0) { in t1_sge_tx()
1784 set_bit(CMDQ_STAT_LAST_PKT_DB, &q->status); in t1_sge_tx()
1785 writel(F_CMDQ0_ENABLE, adapter->regs + A_SG_DOORBELL); in t1_sge_tx()
1790 if (spin_trylock(&q->lock)) { in t1_sge_tx()
1791 credits = q->size - q->in_use; in t1_sge_tx()
1802 * eth_hdr_len - return the length of an Ethernet header
1811 return e->h_proto == htons(ETH_P_8021Q) ? VLAN_ETH_HLEN : ETH_HLEN; in eth_hdr_len()
1819 struct adapter *adapter = dev->ml_priv; in t1_start_xmit()
1820 struct sge *sge = adapter->sge; in t1_start_xmit()
1821 struct sge_port_stats *st = this_cpu_ptr(sge->port_stats[dev->if_port]); in t1_start_xmit()
1826 if (skb->protocol == htons(ETH_P_CPL5)) in t1_start_xmit()
1830 * We are using a non-standard hard_header_len. in t1_start_xmit()
1833 if (unlikely(skb_headroom(skb) < dev->hard_header_len - ETH_HLEN)) { in t1_start_xmit()
1835 ++st->tx_need_hdrroom; in t1_start_xmit()
1841 if (skb_shinfo(skb)->gso_size) { in t1_start_xmit()
1845 ++st->tx_tso; in t1_start_xmit()
1851 hdr->opcode = CPL_TX_PKT_LSO; in t1_start_xmit()
1852 hdr->ip_csum_dis = hdr->l4_csum_dis = 0; in t1_start_xmit()
1853 hdr->ip_hdr_words = ip_hdr(skb)->ihl; in t1_start_xmit()
1854 hdr->tcp_hdr_words = tcp_hdr(skb)->doff; in t1_start_xmit()
1855 hdr->eth_type_mss = htons(MK_ETH_TYPE_MSS(eth_type, in t1_start_xmit()
1856 skb_shinfo(skb)->gso_size)); in t1_start_xmit()
1857 hdr->len = htonl(skb->len - sizeof(*hdr)); in t1_start_xmit()
1866 if (unlikely(skb->len < ETH_HLEN || in t1_start_xmit()
1867 skb->len > dev->mtu + eth_hdr_len(skb->data))) { in t1_start_xmit()
1869 skb->len, eth_hdr_len(skb->data), dev->mtu); in t1_start_xmit()
1874 if (skb->ip_summed == CHECKSUM_PARTIAL && in t1_start_xmit()
1875 ip_hdr(skb)->protocol == IPPROTO_UDP) { in t1_start_xmit()
1886 if ((unlikely(!adapter->sge->espibug_skb[dev->if_port]))) { in t1_start_xmit()
1887 if (skb->protocol == htons(ETH_P_ARP) && in t1_start_xmit()
1888 arp_hdr(skb)->ar_op == htons(ARPOP_REQUEST)) { in t1_start_xmit()
1889 adapter->sge->espibug_skb[dev->if_port] = skb; in t1_start_xmit()
1890 /* We want to re-use this skb later. We in t1_start_xmit()
1899 cpl->opcode = CPL_TX_PKT; in t1_start_xmit()
1900 cpl->ip_csum_dis = 1; /* SW calculates IP csum */ in t1_start_xmit()
1901 cpl->l4_csum_dis = skb->ip_summed == CHECKSUM_PARTIAL ? 0 : 1; in t1_start_xmit()
1904 st->tx_cso += (skb->ip_summed == CHECKSUM_PARTIAL); in t1_start_xmit()
1906 cpl->iff = dev->if_port; in t1_start_xmit()
1909 cpl->vlan_valid = 1; in t1_start_xmit()
1910 cpl->vlan = htons(skb_vlan_tag_get(skb)); in t1_start_xmit()
1911 st->vlan_insert++; in t1_start_xmit()
1913 cpl->vlan_valid = 0; in t1_start_xmit()
1937 struct cmdQ *q = &sge->cmdQ[i]; in sge_tx_reclaim_cb()
1939 if (!spin_trylock(&q->lock)) in sge_tx_reclaim_cb()
1943 if (i == 0 && q->in_use) { /* flush pending credits */ in sge_tx_reclaim_cb()
1944 writel(F_CMDQ0_ENABLE, sge->adapter->regs + A_SG_DOORBELL); in sge_tx_reclaim_cb()
1946 spin_unlock(&q->lock); in sge_tx_reclaim_cb()
1948 mod_timer(&sge->tx_reclaim_timer, jiffies + TX_RECLAIM_PERIOD); in sge_tx_reclaim_cb()
1956 sge->fixed_intrtimer = p->rx_coalesce_usecs * in t1_sge_set_coalesce_params()
1957 core_ticks_per_usec(sge->adapter); in t1_sge_set_coalesce_params()
1958 writel(sge->fixed_intrtimer, sge->adapter->regs + A_SG_INTRTIMER); in t1_sge_set_coalesce_params()
1969 return -ENOMEM; in t1_sge_configure()
1972 return -ENOMEM; in t1_sge_configure()
1982 p->large_buf_capacity = jumbo_payload_capacity(sge); in t1_sge_configure()
1992 writel(0, sge->adapter->regs + A_SG_CONTROL); in t1_sge_stop()
1993 readl(sge->adapter->regs + A_SG_CONTROL); /* flush */ in t1_sge_stop()
1995 if (is_T2(sge->adapter)) in t1_sge_stop()
1996 del_timer_sync(&sge->espibug_timer); in t1_sge_stop()
1998 del_timer_sync(&sge->tx_reclaim_timer); in t1_sge_stop()
1999 if (sge->tx_sched) in t1_sge_stop()
2003 kfree_skb(sge->espibug_skb[i]); in t1_sge_stop()
2011 refill_free_list(sge, &sge->freelQ[0]); in t1_sge_start()
2012 refill_free_list(sge, &sge->freelQ[1]); in t1_sge_start()
2014 writel(sge->sge_control, sge->adapter->regs + A_SG_CONTROL); in t1_sge_start()
2015 doorbell_pio(sge->adapter, F_FL0_ENABLE | F_FL1_ENABLE); in t1_sge_start()
2016 readl(sge->adapter->regs + A_SG_CONTROL); /* flush */ in t1_sge_start()
2018 mod_timer(&sge->tx_reclaim_timer, jiffies + TX_RECLAIM_PERIOD); in t1_sge_start()
2020 if (is_T2(sge->adapter)) in t1_sge_start()
2021 mod_timer(&sge->espibug_timer, jiffies + sge->espibug_timeout); in t1_sge_start()
2030 struct adapter *adapter = sge->adapter; in espibug_workaround_t204()
2031 unsigned int nports = adapter->params.nports; in espibug_workaround_t204()
2034 if (adapter->open_device_map & PORT_MASK) { in espibug_workaround_t204()
2041 struct sk_buff *skb = sge->espibug_skb[i]; in espibug_workaround_t204()
2043 if (!netif_running(adapter->port[i].dev) || in espibug_workaround_t204()
2044 netif_queue_stopped(adapter->port[i].dev) || in espibug_workaround_t204()
2048 if (!skb->cb[0]) { in espibug_workaround_t204()
2054 skb->len - 10, in espibug_workaround_t204()
2057 skb->cb[0] = 0xff; in espibug_workaround_t204()
2064 t1_sge_tx(skb, adapter, 0, adapter->port[i].dev); in espibug_workaround_t204()
2067 mod_timer(&sge->espibug_timer, jiffies + sge->espibug_timeout); in espibug_workaround_t204()
2073 struct adapter *adapter = sge->adapter; in espibug_workaround()
2075 if (netif_running(adapter->port[0].dev)) { in espibug_workaround()
2076 struct sk_buff *skb = sge->espibug_skb[0]; in espibug_workaround()
2080 if (!skb->cb[0]) { in espibug_workaround()
2086 skb->len - 10, in espibug_workaround()
2089 skb->cb[0] = 0xff; in espibug_workaround()
2096 t1_sge_tx(skb, adapter, 0, adapter->port[0].dev); in espibug_workaround()
2099 mod_timer(&sge->espibug_timer, jiffies + sge->espibug_timeout); in espibug_workaround()
2113 sge->adapter = adapter; in t1_sge_create()
2114 sge->netdev = adapter->port[0].dev; in t1_sge_create()
2115 sge->rx_pkt_pad = t1_is_T1B(adapter) ? 0 : 2; in t1_sge_create()
2116 sge->jumbo_fl = t1_is_T1B(adapter) ? 1 : 0; in t1_sge_create()
2119 sge->port_stats[i] = alloc_percpu(struct sge_port_stats); in t1_sge_create()
2120 if (!sge->port_stats[i]) in t1_sge_create()
2124 timer_setup(&sge->tx_reclaim_timer, sge_tx_reclaim_cb, 0); in t1_sge_create()
2126 if (is_T2(sge->adapter)) { in t1_sge_create()
2127 timer_setup(&sge->espibug_timer, in t1_sge_create()
2128 adapter->params.nports > 1 ? espibug_workaround_t204 : espibug_workaround, in t1_sge_create()
2131 if (adapter->params.nports > 1) in t1_sge_create()
2134 sge->espibug_timeout = 1; in t1_sge_create()
2136 if (adapter->params.nports > 1) in t1_sge_create()
2137 sge->espibug_timeout = HZ/100; in t1_sge_create()
2141 p->cmdQ_size[0] = SGE_CMDQ0_E_N; in t1_sge_create()
2142 p->cmdQ_size[1] = SGE_CMDQ1_E_N; in t1_sge_create()
2143 p->freelQ_size[!sge->jumbo_fl] = SGE_FREEL_SIZE; in t1_sge_create()
2144 p->freelQ_size[sge->jumbo_fl] = SGE_JUMBO_FREEL_SIZE; in t1_sge_create()
2145 if (sge->tx_sched) { in t1_sge_create()
2146 if (board_info(sge->adapter)->board == CHBT_BOARD_CHT204) in t1_sge_create()
2147 p->rx_coalesce_usecs = 15; in t1_sge_create()
2149 p->rx_coalesce_usecs = 50; in t1_sge_create()
2151 p->rx_coalesce_usecs = 50; in t1_sge_create()
2153 p->coalesce_enable = 0; in t1_sge_create()
2154 p->sample_interval_usecs = 0; in t1_sge_create()
2159 free_percpu(sge->port_stats[i]); in t1_sge_create()
2160 --i; in t1_sge_create()