Lines Matching +full:0 +full:x100008
48 #define A_ELMER0_VERSION 0x100000
49 #define A_ELMER0_PHY_CFG 0x100004
50 #define A_ELMER0_INT_ENABLE 0x100008
51 #define A_ELMER0_INT_CAUSE 0x10000c
52 #define A_ELMER0_GPI_CFG 0x100010
53 #define A_ELMER0_GPI_STAT 0x100014
54 #define A_ELMER0_GPO 0x100018
55 #define A_ELMER0_PORT0_MI1_CFG 0x400000
57 #define S_MI1_MDI_ENABLE 0
70 #define M_MI1_SOF 0x3
75 #define M_MI1_CLK_DIV 0xff
79 #define A_ELMER0_PORT0_MI1_ADDR 0x400004
81 #define S_MI1_REG_ADDR 0
82 #define M_MI1_REG_ADDR 0x1f
87 #define M_MI1_PHY_ADDR 0x1f
91 #define A_ELMER0_PORT0_MI1_DATA 0x400008
93 #define S_MI1_DATA 0
94 #define M_MI1_DATA 0xffff
98 #define A_ELMER0_PORT0_MI1_OP 0x40000c
100 #define S_MI1_OP 0
101 #define M_MI1_OP 0x3
113 #define A_ELMER0_PORT1_MI1_CFG 0x500000
114 #define A_ELMER0_PORT1_MI1_ADDR 0x500004
115 #define A_ELMER0_PORT1_MI1_DATA 0x500008
116 #define A_ELMER0_PORT1_MI1_OP 0x50000c
117 #define A_ELMER0_PORT2_MI1_CFG 0x600000
118 #define A_ELMER0_PORT2_MI1_ADDR 0x600004
119 #define A_ELMER0_PORT2_MI1_DATA 0x600008
120 #define A_ELMER0_PORT2_MI1_OP 0x60000c
121 #define A_ELMER0_PORT3_MI1_CFG 0x700000
122 #define A_ELMER0_PORT3_MI1_ADDR 0x700004
123 #define A_ELMER0_PORT3_MI1_DATA 0x700008
124 #define A_ELMER0_PORT3_MI1_OP 0x70000c
127 #define ELMER0_GP_BIT0 0x0001
128 #define ELMER0_GP_BIT1 0x0002
129 #define ELMER0_GP_BIT2 0x0004
130 #define ELMER0_GP_BIT3 0x0008
131 #define ELMER0_GP_BIT4 0x0010
132 #define ELMER0_GP_BIT5 0x0020
133 #define ELMER0_GP_BIT6 0x0040
134 #define ELMER0_GP_BIT7 0x0080
135 #define ELMER0_GP_BIT8 0x0100
136 #define ELMER0_GP_BIT9 0x0200
137 #define ELMER0_GP_BIT10 0x0400
138 #define ELMER0_GP_BIT11 0x0800
139 #define ELMER0_GP_BIT12 0x1000
140 #define ELMER0_GP_BIT13 0x2000
141 #define ELMER0_GP_BIT14 0x4000
142 #define ELMER0_GP_BIT15 0x8000
143 #define ELMER0_GP_BIT16 0x10000
144 #define ELMER0_GP_BIT17 0x20000
145 #define ELMER0_GP_BIT18 0x40000
146 #define ELMER0_GP_BIT19 0x80000
151 #define MI1_OP_INDIRECT_ADDRESS 0