Lines Matching refs:GRC_MODE
3548 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3549 tw32(GRC_MODE, grc_mode | GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
3559 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3560 tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
6439 tg3_rd32_loop(tp, regs, GRC_MODE, 0x4c); in tg3_dump_legacy_regs()
9246 tw32(GRC_MODE, tp->grc_mode); in tg3_chip_reset()
9927 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9931 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
9937 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9942 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9946 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
9953 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9964 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9968 tw32(GRC_MODE, val | GRC_MODE_PCIE_DL_SEL); in tg3_reset_hw()
9976 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
10070 tw32(GRC_MODE, tp->grc_mode | val); in tg3_reset_hw()
16757 val = tr32(GRC_MODE); in tg3_get_invariants()
16768 tw32(GRC_MODE, val | tp->grc_mode); in tg3_get_invariants()