Lines Matching +full:10 +full:gbase +full:- +full:kr
2 * AMD 10Gb Ethernet driver
125 #include "xgbe-common.h"
148 /* Rate-change complete wait/retry count */
151 /* CDR delay values for KR support (in usec) */
157 #define XGBE_RRC_FREQUENCY 10
276 ((_x)->extd[XGBE_SFP_EXTD_SFF_8472] && \
277 !((_x)->extd[XGBE_SFP_EXTD_DIAG] & XGBE_SFP_EXTD_DIAG_ADDR_CHANGE))
284 #define XGBE_BEL_FUSE_VENDOR "BEL-FUSE "
285 #define XGBE_BEL_FUSE_PARTNO "1GBT-SFP06 "
304 /* Re-driver related definitions */
373 /* Re-driver support */
380 /* KR AN support */
393 return pdata->i2c_if.i2c_xfer(pdata, i2c_op); in xgbe_phy_i2c_xfer()
399 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_redrv_write()
424 i2c_op.target = phy_data->redrv_addr; in xgbe_phy_redrv_write()
429 if ((ret == -EAGAIN) && retry--) in xgbe_phy_redrv_write()
438 i2c_op.target = phy_data->redrv_addr; in xgbe_phy_redrv_write()
443 if ((ret == -EAGAIN) && retry--) in xgbe_phy_redrv_write()
450 netif_dbg(pdata, drv, pdata->netdev, in xgbe_phy_redrv_write()
452 ret = -EIO; in xgbe_phy_redrv_write()
472 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_write()
494 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_read()
508 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_read()
516 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_put_mux()
520 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT) in xgbe_phy_sfp_put_mux()
526 i2c_op.target = phy_data->sfp_mux_address; in xgbe_phy_sfp_put_mux()
535 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_get_mux()
539 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT) in xgbe_phy_sfp_get_mux()
543 mux_channel = 1 << phy_data->sfp_mux_channel; in xgbe_phy_sfp_get_mux()
545 i2c_op.target = phy_data->sfp_mux_address; in xgbe_phy_sfp_get_mux()
559 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_get_comm_ownership()
575 XP_SET_BITS(mutex_id, XP_I2C_MUTEX, ID, phy_data->port_id); in xgbe_phy_get_comm_ownership()
596 netdev_err(pdata->netdev, "unable to obtain hardware mutexes\n"); in xgbe_phy_get_comm_ownership()
598 return -ETIMEDOUT; in xgbe_phy_get_comm_ownership()
604 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_write()
607 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL45) in xgbe_phy_mdio_mii_write()
608 return -ENOTSUPP; in xgbe_phy_mdio_mii_write()
610 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL22) in xgbe_phy_mdio_mii_write()
611 return -ENOTSUPP; in xgbe_phy_mdio_mii_write()
614 return pdata->hw_if.write_ext_mii_regs(pdata, addr, reg, val); in xgbe_phy_mdio_mii_write()
641 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_write()
642 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_write()
649 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_write()
651 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_write()
654 ret = -ENOTSUPP; in xgbe_phy_mii_write()
664 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_read()
667 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL45) in xgbe_phy_mdio_mii_read()
668 return -ENOTSUPP; in xgbe_phy_mdio_mii_read()
670 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL22) in xgbe_phy_mdio_mii_read()
671 return -ENOTSUPP; in xgbe_phy_mdio_mii_read()
674 return pdata->hw_if.read_ext_mii_regs(pdata, addr, reg); in xgbe_phy_mdio_mii_read()
701 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_read()
702 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_read()
709 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_read()
711 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_read()
714 ret = -ENOTSUPP; in xgbe_phy_mii_read()
723 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_sfp_phy_settings()
724 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_phy_settings()
726 if (!phy_data->sfp_mod_absent && !phy_data->sfp_changed) in xgbe_phy_sfp_phy_settings()
731 if (phy_data->sfp_mod_absent) { in xgbe_phy_sfp_phy_settings()
732 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
733 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
734 pdata->phy.autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
735 pdata->phy.pause_autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
748 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
753 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
754 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
755 pdata->phy.autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
756 pdata->phy.pause_autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
760 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) { in xgbe_phy_sfp_phy_settings()
761 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) in xgbe_phy_sfp_phy_settings()
763 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_sfp_phy_settings()
766 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_sfp_phy_settings()
775 pdata->phy.speed = SPEED_10000; in xgbe_phy_sfp_phy_settings()
776 pdata->phy.duplex = DUPLEX_FULL; in xgbe_phy_sfp_phy_settings()
777 pdata->phy.autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
778 pdata->phy.pause_autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
779 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_sfp_phy_settings()
780 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
802 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
803 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
804 pdata->phy.autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
805 pdata->phy.pause_autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
809 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
828 sfp_base = sfp_eeprom->base; in xgbe_phy_sfp_bit_rate()
849 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_free_phy_device()
851 if (phy_data->phydev) { in xgbe_phy_free_phy_device()
852 phy_detach(phy_data->phydev); in xgbe_phy_free_phy_device()
853 phy_device_remove(phy_data->phydev); in xgbe_phy_free_phy_device()
854 phy_device_free(phy_data->phydev); in xgbe_phy_free_phy_device()
855 phy_data->phydev = NULL; in xgbe_phy_free_phy_device()
862 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_finisar_phy_quirks()
863 unsigned int phy_id = phy_data->phydev->phy_id; in xgbe_phy_finisar_phy_quirks()
865 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_finisar_phy_quirks()
871 /* Enable Base-T AN */ in xgbe_phy_finisar_phy_quirks()
872 phy_write(phy_data->phydev, 0x16, 0x0001); in xgbe_phy_finisar_phy_quirks()
873 phy_write(phy_data->phydev, 0x00, 0x9140); in xgbe_phy_finisar_phy_quirks()
874 phy_write(phy_data->phydev, 0x16, 0x0000); in xgbe_phy_finisar_phy_quirks()
876 /* Enable SGMII at 100Base-T/1000Base-T Full Duplex */ in xgbe_phy_finisar_phy_quirks()
877 phy_write(phy_data->phydev, 0x1b, 0x9084); in xgbe_phy_finisar_phy_quirks()
878 phy_write(phy_data->phydev, 0x09, 0x0e00); in xgbe_phy_finisar_phy_quirks()
879 phy_write(phy_data->phydev, 0x00, 0x8140); in xgbe_phy_finisar_phy_quirks()
880 phy_write(phy_data->phydev, 0x04, 0x0d01); in xgbe_phy_finisar_phy_quirks()
881 phy_write(phy_data->phydev, 0x00, 0x9140); in xgbe_phy_finisar_phy_quirks()
890 linkmode_copy(phy_data->phydev->supported, supported); in xgbe_phy_finisar_phy_quirks()
892 phy_support_asym_pause(phy_data->phydev); in xgbe_phy_finisar_phy_quirks()
894 netif_dbg(pdata, drv, pdata->netdev, in xgbe_phy_finisar_phy_quirks()
903 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_belfuse_phy_quirks()
904 struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom; in xgbe_phy_belfuse_phy_quirks()
905 unsigned int phy_id = phy_data->phydev->phy_id; in xgbe_phy_belfuse_phy_quirks()
908 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_belfuse_phy_quirks()
911 if (memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME], in xgbe_phy_belfuse_phy_quirks()
915 /* For Bel-Fuse, use the extra AN flag */ in xgbe_phy_belfuse_phy_quirks()
916 pdata->an_again = 1; in xgbe_phy_belfuse_phy_quirks()
918 if (memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_PN], in xgbe_phy_belfuse_phy_quirks()
925 /* Reset PHY - wait for self-clearing reset bit to clear */ in xgbe_phy_belfuse_phy_quirks()
926 genphy_soft_reset(phy_data->phydev); in xgbe_phy_belfuse_phy_quirks()
929 phy_write(phy_data->phydev, 0x18, 0x7007); in xgbe_phy_belfuse_phy_quirks()
930 reg = phy_read(phy_data->phydev, 0x18); in xgbe_phy_belfuse_phy_quirks()
931 phy_write(phy_data->phydev, 0x18, reg & ~0x0080); in xgbe_phy_belfuse_phy_quirks()
934 phy_write(phy_data->phydev, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
935 reg = phy_read(phy_data->phydev, 0x1c); in xgbe_phy_belfuse_phy_quirks()
938 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg | 0x0001); in xgbe_phy_belfuse_phy_quirks()
941 reg = phy_read(phy_data->phydev, 0x00); in xgbe_phy_belfuse_phy_quirks()
942 phy_write(phy_data->phydev, 0x00, reg | 0x00800); in xgbe_phy_belfuse_phy_quirks()
944 /* Configure SGMII-to-Copper mode */ in xgbe_phy_belfuse_phy_quirks()
945 phy_write(phy_data->phydev, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
946 reg = phy_read(phy_data->phydev, 0x1c); in xgbe_phy_belfuse_phy_quirks()
949 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg | 0x0004); in xgbe_phy_belfuse_phy_quirks()
952 reg = phy_read(phy_data->phydev, 0x00); in xgbe_phy_belfuse_phy_quirks()
953 phy_write(phy_data->phydev, 0x00, reg & ~0x00800); in xgbe_phy_belfuse_phy_quirks()
956 phy_write(phy_data->phydev, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
957 reg = phy_read(phy_data->phydev, 0x1c); in xgbe_phy_belfuse_phy_quirks()
960 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg); in xgbe_phy_belfuse_phy_quirks()
963 reg = phy_read(phy_data->phydev, 0x00); in xgbe_phy_belfuse_phy_quirks()
964 phy_write(phy_data->phydev, 0x00, reg & ~0x00800); in xgbe_phy_belfuse_phy_quirks()
972 linkmode_copy(phy_data->phydev->supported, supported); in xgbe_phy_belfuse_phy_quirks()
973 phy_support_asym_pause(phy_data->phydev); in xgbe_phy_belfuse_phy_quirks()
975 netif_dbg(pdata, drv, pdata->netdev, in xgbe_phy_belfuse_phy_quirks()
992 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_find_phy_device()
993 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_find_phy_device()
998 if (phy_data->phydev) in xgbe_phy_find_phy_device()
1002 pdata->an_again = 0; in xgbe_phy_find_phy_device()
1005 if (phy_data->phydev_mode == XGBE_MDIO_MODE_NONE) in xgbe_phy_find_phy_device()
1009 if ((phy_data->port_mode == XGBE_PORT_MODE_SFP) && in xgbe_phy_find_phy_device()
1010 !phy_data->sfp_phy_avail) in xgbe_phy_find_phy_device()
1014 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr, in xgbe_phy_find_phy_device()
1015 phy_data->phydev_mode); in xgbe_phy_find_phy_device()
1017 netdev_err(pdata->netdev, in xgbe_phy_find_phy_device()
1019 phy_data->mdio_addr, phy_data->phydev_mode); in xgbe_phy_find_phy_device()
1024 phydev = get_phy_device(phy_data->mii, phy_data->mdio_addr, in xgbe_phy_find_phy_device()
1025 (phy_data->phydev_mode == XGBE_MDIO_MODE_CL45)); in xgbe_phy_find_phy_device()
1027 netdev_err(pdata->netdev, "get_phy_device failed\n"); in xgbe_phy_find_phy_device()
1028 return -ENODEV; in xgbe_phy_find_phy_device()
1030 netif_dbg(pdata, drv, pdata->netdev, "external PHY id is %#010x\n", in xgbe_phy_find_phy_device()
1031 phydev->phy_id); in xgbe_phy_find_phy_device()
1037 netdev_err(pdata->netdev, "phy_device_register failed\n"); in xgbe_phy_find_phy_device()
1042 ret = phy_attach_direct(pdata->netdev, phydev, phydev->dev_flags, in xgbe_phy_find_phy_device()
1045 netdev_err(pdata->netdev, "phy_attach_direct failed\n"); in xgbe_phy_find_phy_device()
1050 phy_data->phydev = phydev; in xgbe_phy_find_phy_device()
1054 linkmode_and(phydev->advertising, phydev->advertising, in xgbe_phy_find_phy_device()
1055 lks->link_modes.advertising); in xgbe_phy_find_phy_device()
1057 phy_start_aneg(phy_data->phydev); in xgbe_phy_find_phy_device()
1064 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_external_phy()
1067 if (!phy_data->sfp_changed) in xgbe_phy_sfp_external_phy()
1070 phy_data->sfp_phy_avail = 0; in xgbe_phy_sfp_external_phy()
1072 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_sfp_external_phy()
1081 phy_data->sfp_phy_avail = 1; in xgbe_phy_sfp_external_phy()
1086 u8 *sfp_extd = phy_data->sfp_eeprom.extd; in xgbe_phy_check_sfp_rx_los()
1091 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_RX_LOS) in xgbe_phy_check_sfp_rx_los()
1094 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_rx_los)) in xgbe_phy_check_sfp_rx_los()
1102 u8 *sfp_extd = phy_data->sfp_eeprom.extd; in xgbe_phy_check_sfp_tx_fault()
1107 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_TX_FAULT) in xgbe_phy_check_sfp_tx_fault()
1110 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_tx_fault)) in xgbe_phy_check_sfp_tx_fault()
1118 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_MOD_ABSENT) in xgbe_phy_check_sfp_mod_absent()
1121 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_mod_absent)) in xgbe_phy_check_sfp_mod_absent()
1129 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_parse_eeprom()
1130 struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom; in xgbe_phy_sfp_parse_eeprom()
1133 sfp_base = sfp_eeprom->base; in xgbe_phy_sfp_parse_eeprom()
1142 phy_data->sfp_tx_fault = xgbe_phy_check_sfp_tx_fault(phy_data); in xgbe_phy_sfp_parse_eeprom()
1143 phy_data->sfp_rx_los = xgbe_phy_check_sfp_rx_los(phy_data); in xgbe_phy_sfp_parse_eeprom()
1147 phy_data->sfp_cable = XGBE_SFP_CABLE_PASSIVE; in xgbe_phy_sfp_parse_eeprom()
1148 phy_data->sfp_cable_len = sfp_base[XGBE_SFP_BASE_CU_CABLE_LEN]; in xgbe_phy_sfp_parse_eeprom()
1150 phy_data->sfp_cable = XGBE_SFP_CABLE_ACTIVE; in xgbe_phy_sfp_parse_eeprom()
1155 phy_data->sfp_base = XGBE_SFP_BASE_10000_SR; in xgbe_phy_sfp_parse_eeprom()
1157 phy_data->sfp_base = XGBE_SFP_BASE_10000_LR; in xgbe_phy_sfp_parse_eeprom()
1159 phy_data->sfp_base = XGBE_SFP_BASE_10000_LRM; in xgbe_phy_sfp_parse_eeprom()
1161 phy_data->sfp_base = XGBE_SFP_BASE_10000_ER; in xgbe_phy_sfp_parse_eeprom()
1163 phy_data->sfp_base = XGBE_SFP_BASE_1000_SX; in xgbe_phy_sfp_parse_eeprom()
1165 phy_data->sfp_base = XGBE_SFP_BASE_1000_LX; in xgbe_phy_sfp_parse_eeprom()
1167 phy_data->sfp_base = XGBE_SFP_BASE_1000_CX; in xgbe_phy_sfp_parse_eeprom()
1169 phy_data->sfp_base = XGBE_SFP_BASE_1000_T; in xgbe_phy_sfp_parse_eeprom()
1170 else if ((phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE) && in xgbe_phy_sfp_parse_eeprom()
1172 phy_data->sfp_base = XGBE_SFP_BASE_10000_CR; in xgbe_phy_sfp_parse_eeprom()
1174 switch (phy_data->sfp_base) { in xgbe_phy_sfp_parse_eeprom()
1176 phy_data->sfp_speed = XGBE_SFP_SPEED_100_1000; in xgbe_phy_sfp_parse_eeprom()
1181 phy_data->sfp_speed = XGBE_SFP_SPEED_1000; in xgbe_phy_sfp_parse_eeprom()
1188 phy_data->sfp_speed = XGBE_SFP_SPEED_10000; in xgbe_phy_sfp_parse_eeprom()
1201 netif_dbg(pdata, drv, pdata->netdev, "SFP detected:\n"); in xgbe_phy_sfp_eeprom_info()
1202 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME], in xgbe_phy_sfp_eeprom_info()
1205 netif_dbg(pdata, drv, pdata->netdev, " vendor: %s\n", in xgbe_phy_sfp_eeprom_info()
1208 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_PN], in xgbe_phy_sfp_eeprom_info()
1211 netif_dbg(pdata, drv, pdata->netdev, " part number: %s\n", in xgbe_phy_sfp_eeprom_info()
1214 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_REV], in xgbe_phy_sfp_eeprom_info()
1217 netif_dbg(pdata, drv, pdata->netdev, " revision level: %s\n", in xgbe_phy_sfp_eeprom_info()
1220 memcpy(sfp_data, &sfp_eeprom->extd[XGBE_SFP_BASE_VENDOR_SN], in xgbe_phy_sfp_eeprom_info()
1223 netif_dbg(pdata, drv, pdata->netdev, " serial number: %s\n", in xgbe_phy_sfp_eeprom_info()
1231 for (cc = 0; len; buf++, len--) in xgbe_phy_sfp_verify_eeprom()
1239 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_read_eeprom()
1246 dev_err_once(pdata->dev, "%s: I2C error setting SFP MUX\n", in xgbe_phy_sfp_read_eeprom()
1247 netdev_name(pdata->netdev)); in xgbe_phy_sfp_read_eeprom()
1257 dev_err_once(pdata->dev, "%s: I2C error reading SFP EEPROM\n", in xgbe_phy_sfp_read_eeprom()
1258 netdev_name(pdata->netdev)); in xgbe_phy_sfp_read_eeprom()
1265 sizeof(sfp_eeprom.base) - 1)) { in xgbe_phy_sfp_read_eeprom()
1266 ret = -EINVAL; in xgbe_phy_sfp_read_eeprom()
1272 sizeof(sfp_eeprom.extd) - 1)) { in xgbe_phy_sfp_read_eeprom()
1273 ret = -EINVAL; in xgbe_phy_sfp_read_eeprom()
1278 if (memcmp(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom))) { in xgbe_phy_sfp_read_eeprom()
1279 phy_data->sfp_changed = 1; in xgbe_phy_sfp_read_eeprom()
1284 memcpy(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom)); in xgbe_phy_sfp_read_eeprom()
1288 phy_data->sfp_changed = 0; in xgbe_phy_sfp_read_eeprom()
1299 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_signals()
1305 ret = xgbe_phy_i2c_read(pdata, phy_data->sfp_gpio_address, in xgbe_phy_sfp_signals()
1309 dev_err_once(pdata->dev, "%s: I2C error reading SFP GPIOs\n", in xgbe_phy_sfp_signals()
1310 netdev_name(pdata->netdev)); in xgbe_phy_sfp_signals()
1314 phy_data->sfp_gpio_inputs = (gpio_ports[1] << 8) | gpio_ports[0]; in xgbe_phy_sfp_signals()
1316 phy_data->sfp_mod_absent = xgbe_phy_check_sfp_mod_absent(phy_data); in xgbe_phy_sfp_signals()
1321 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_mod_absent()
1325 phy_data->sfp_mod_absent = 1; in xgbe_phy_sfp_mod_absent()
1326 phy_data->sfp_phy_avail = 0; in xgbe_phy_sfp_mod_absent()
1327 memset(&phy_data->sfp_eeprom, 0, sizeof(phy_data->sfp_eeprom)); in xgbe_phy_sfp_mod_absent()
1332 phy_data->sfp_rx_los = 0; in xgbe_phy_sfp_reset()
1333 phy_data->sfp_tx_fault = 0; in xgbe_phy_sfp_reset()
1334 phy_data->sfp_mod_absent = 1; in xgbe_phy_sfp_reset()
1335 phy_data->sfp_base = XGBE_SFP_BASE_UNKNOWN; in xgbe_phy_sfp_reset()
1336 phy_data->sfp_cable = XGBE_SFP_CABLE_UNKNOWN; in xgbe_phy_sfp_reset()
1337 phy_data->sfp_speed = XGBE_SFP_SPEED_UNKNOWN; in xgbe_phy_sfp_reset()
1342 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_detect()
1354 if (phy_data->sfp_mod_absent) { in xgbe_phy_sfp_detect()
1380 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_module_eeprom()
1386 rem = eeprom->len; in xgbe_phy_module_eeprom()
1388 if (!eeprom->len) { in xgbe_phy_module_eeprom()
1389 ret = -EINVAL; in xgbe_phy_module_eeprom()
1393 if ((eeprom->offset + eeprom->len) > XGBE_SFP_EEPROM_MAX) { in xgbe_phy_module_eeprom()
1394 ret = -EINVAL; in xgbe_phy_module_eeprom()
1398 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) { in xgbe_phy_module_eeprom()
1399 ret = -ENXIO; in xgbe_phy_module_eeprom()
1403 if (!netif_running(pdata->netdev)) { in xgbe_phy_module_eeprom()
1404 ret = -EIO; in xgbe_phy_module_eeprom()
1408 if (phy_data->sfp_mod_absent) { in xgbe_phy_module_eeprom()
1409 ret = -EIO; in xgbe_phy_module_eeprom()
1415 ret = -EIO; in xgbe_phy_module_eeprom()
1421 netdev_err(pdata->netdev, "I2C error setting SFP MUX\n"); in xgbe_phy_module_eeprom()
1422 ret = -EIO; in xgbe_phy_module_eeprom()
1432 netdev_err(pdata->netdev, in xgbe_phy_module_eeprom()
1434 ret = -EIO; in xgbe_phy_module_eeprom()
1448 netdev_err(pdata->netdev, in xgbe_phy_module_eeprom()
1450 ret = -EIO; in xgbe_phy_module_eeprom()
1455 for (i = 0, j = eeprom->offset; i < eeprom->len; i++, j++) { in xgbe_phy_module_eeprom()
1461 rem--; in xgbe_phy_module_eeprom()
1471 eeprom->len -= rem; in xgbe_phy_module_eeprom()
1479 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_module_info()
1481 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_module_info()
1482 return -ENXIO; in xgbe_phy_module_info()
1484 if (!netif_running(pdata->netdev)) in xgbe_phy_module_info()
1485 return -EIO; in xgbe_phy_module_info()
1487 if (phy_data->sfp_mod_absent) in xgbe_phy_module_info()
1488 return -EIO; in xgbe_phy_module_info()
1490 if (XGBE_SFP_DIAGS_SUPPORTED(&phy_data->sfp_eeprom)) { in xgbe_phy_module_info()
1491 modinfo->type = ETH_MODULE_SFF_8472; in xgbe_phy_module_info()
1492 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; in xgbe_phy_module_info()
1494 modinfo->type = ETH_MODULE_SFF_8079; in xgbe_phy_module_info()
1495 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; in xgbe_phy_module_info()
1503 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_phydev_flowctrl()
1504 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_phydev_flowctrl()
1508 pdata->phy.tx_pause = 0; in xgbe_phy_phydev_flowctrl()
1509 pdata->phy.rx_pause = 0; in xgbe_phy_phydev_flowctrl()
1511 if (!phy_data->phydev) in xgbe_phy_phydev_flowctrl()
1514 lcl_adv = linkmode_adv_to_lcl_adv_t(phy_data->phydev->advertising); in xgbe_phy_phydev_flowctrl()
1516 if (phy_data->phydev->pause) { in xgbe_phy_phydev_flowctrl()
1520 if (phy_data->phydev->asym_pause) { in xgbe_phy_phydev_flowctrl()
1527 pdata->phy.tx_pause = 1; in xgbe_phy_phydev_flowctrl()
1529 pdata->phy.rx_pause = 1; in xgbe_phy_phydev_flowctrl()
1534 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an37_sgmii_outcome()
1541 if (pdata->phy.pause_autoneg) in xgbe_phy_an37_sgmii_outcome()
1544 switch (pdata->an_status & XGBE_SGMII_AN_LINK_SPEED) { in xgbe_phy_an37_sgmii_outcome()
1546 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { in xgbe_phy_an37_sgmii_outcome()
1550 /* Half-duplex not supported */ in xgbe_phy_an37_sgmii_outcome()
1556 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { in xgbe_phy_an37_sgmii_outcome()
1560 /* Half-duplex not supported */ in xgbe_phy_an37_sgmii_outcome()
1574 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an37_outcome()
1589 if (pdata->phy.pause_autoneg) { in xgbe_phy_an37_outcome()
1590 /* Set flow control based on auto-negotiation result */ in xgbe_phy_an37_outcome()
1591 pdata->phy.tx_pause = 0; in xgbe_phy_an37_outcome()
1592 pdata->phy.rx_pause = 0; in xgbe_phy_an37_outcome()
1595 pdata->phy.tx_pause = 1; in xgbe_phy_an37_outcome()
1596 pdata->phy.rx_pause = 1; in xgbe_phy_an37_outcome()
1599 pdata->phy.rx_pause = 1; in xgbe_phy_an37_outcome()
1601 pdata->phy.tx_pause = 1; in xgbe_phy_an37_outcome()
1617 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an73_redrv_outcome()
1618 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an73_redrv_outcome()
1626 if (pdata->phy.pause_autoneg) in xgbe_phy_an73_redrv_outcome()
1639 switch (phy_data->port_mode) { in xgbe_phy_an73_redrv_outcome()
1649 switch (phy_data->port_mode) { in xgbe_phy_an73_redrv_outcome()
1658 switch (phy_data->sfp_base) { in xgbe_phy_an73_redrv_outcome()
1660 if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1661 (phy_data->phydev->speed == SPEED_100)) in xgbe_phy_an73_redrv_outcome()
1675 if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1676 (phy_data->phydev->speed == SPEED_100)) in xgbe_phy_an73_redrv_outcome()
1697 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an73_outcome()
1712 if (pdata->phy.pause_autoneg) { in xgbe_phy_an73_outcome()
1713 /* Set flow control based on auto-negotiation result */ in xgbe_phy_an73_outcome()
1714 pdata->phy.tx_pause = 0; in xgbe_phy_an73_outcome()
1715 pdata->phy.rx_pause = 0; in xgbe_phy_an73_outcome()
1718 pdata->phy.tx_pause = 1; in xgbe_phy_an73_outcome()
1719 pdata->phy.rx_pause = 1; in xgbe_phy_an73_outcome()
1722 pdata->phy.rx_pause = 1; in xgbe_phy_an73_outcome()
1724 pdata->phy.tx_pause = 1; in xgbe_phy_an73_outcome()
1755 switch (pdata->an_mode) { in xgbe_phy_an_outcome()
1772 struct ethtool_link_ksettings *slks = &pdata->phy.lks; in xgbe_phy_an_advertising()
1773 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_advertising()
1777 /* Without a re-driver, just return current advertising */ in xgbe_phy_an_advertising()
1778 if (!phy_data->redrv) in xgbe_phy_an_advertising()
1781 /* With the KR re-driver we need to advertise a single speed */ in xgbe_phy_an_advertising()
1786 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_an_advertising()
1789 switch (phy_data->port_mode) { in xgbe_phy_an_advertising()
1803 if (phy_data->phydev && in xgbe_phy_an_advertising()
1804 (phy_data->phydev->speed == SPEED_10000)) in xgbe_phy_an_advertising()
1813 switch (phy_data->sfp_base) { in xgbe_phy_an_advertising()
1833 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an_config()
1834 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_config()
1841 if (!phy_data->phydev) in xgbe_phy_an_config()
1844 phy_data->phydev->autoneg = pdata->phy.autoneg; in xgbe_phy_an_config()
1845 linkmode_and(phy_data->phydev->advertising, in xgbe_phy_an_config()
1846 phy_data->phydev->supported, in xgbe_phy_an_config()
1847 lks->link_modes.advertising); in xgbe_phy_an_config()
1849 if (pdata->phy.autoneg != AUTONEG_ENABLE) { in xgbe_phy_an_config()
1850 phy_data->phydev->speed = pdata->phy.speed; in xgbe_phy_an_config()
1851 phy_data->phydev->duplex = pdata->phy.duplex; in xgbe_phy_an_config()
1854 ret = phy_start_aneg(phy_data->phydev); in xgbe_phy_an_config()
1861 switch (phy_data->sfp_base) { in xgbe_phy_an_sfp_mode()
1875 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_mode()
1877 /* A KR re-driver will always require CL73 AN */ in xgbe_phy_an_mode()
1878 if (phy_data->redrv) in xgbe_phy_an_mode()
1881 switch (phy_data->port_mode) { in xgbe_phy_an_mode()
1907 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode_mdio()
1910 redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000); in xgbe_phy_set_redrv_mode_mdio()
1913 return pdata->hw_if.write_ext_mii_regs(pdata, phy_data->redrv_addr, in xgbe_phy_set_redrv_mode_mdio()
1920 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode_i2c()
1925 redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000); in xgbe_phy_set_redrv_mode_i2c()
1934 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode()
1938 if (!phy_data->redrv) in xgbe_phy_set_redrv_mode()
1942 if ((phy_data->port_mode == XGBE_PORT_MODE_SFP) && in xgbe_phy_set_redrv_mode()
1943 (phy_data->sfp_base != XGBE_SFP_BASE_1000_CX) && in xgbe_phy_set_redrv_mode()
1944 (phy_data->sfp_base != XGBE_SFP_BASE_10000_CR)) in xgbe_phy_set_redrv_mode()
1951 if (phy_data->redrv_if) in xgbe_phy_set_redrv_mode()
1976 netif_err(pdata, link, pdata->netdev, "firmware mailbox reset performed\n"); in xgbe_phy_rx_reset()
1988 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_perform_ratechange()
2004 while (wait--) { in xgbe_phy_perform_ratechange()
2011 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_perform_ratechange()
2023 netif_dbg(pdata, link, pdata->netdev, "receiver reset complete\n"); in xgbe_phy_rrc()
2028 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_power_off()
2033 phy_data->cur_mode = XGBE_MODE_UNKNOWN; in xgbe_phy_power_off()
2035 netif_dbg(pdata, link, pdata->netdev, "phy powered off\n"); in xgbe_phy_power_off()
2040 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfi_mode()
2044 /* 10G/SFI */ in xgbe_phy_sfi_mode()
2045 if (phy_data->sfp_cable != XGBE_SFP_CABLE_PASSIVE) { in xgbe_phy_sfi_mode()
2048 if (phy_data->sfp_cable_len <= 1) in xgbe_phy_sfi_mode()
2050 else if (phy_data->sfp_cable_len <= 3) in xgbe_phy_sfi_mode()
2056 phy_data->cur_mode = XGBE_MODE_SFI; in xgbe_phy_sfi_mode()
2058 netif_dbg(pdata, link, pdata->netdev, "10GbE SFI mode set\n"); in xgbe_phy_sfi_mode()
2063 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_x_mode()
2070 phy_data->cur_mode = XGBE_MODE_X; in xgbe_phy_x_mode()
2072 netif_dbg(pdata, link, pdata->netdev, "1GbE X mode set\n"); in xgbe_phy_x_mode()
2077 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sgmii_1000_mode()
2084 phy_data->cur_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_sgmii_1000_mode()
2086 netif_dbg(pdata, link, pdata->netdev, "1GbE SGMII mode set\n"); in xgbe_phy_sgmii_1000_mode()
2091 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sgmii_100_mode()
2098 phy_data->cur_mode = XGBE_MODE_SGMII_100; in xgbe_phy_sgmii_100_mode()
2100 netif_dbg(pdata, link, pdata->netdev, "100MbE SGMII mode set\n"); in xgbe_phy_sgmii_100_mode()
2105 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kr_mode()
2109 /* 10G/KR */ in xgbe_phy_kr_mode()
2112 phy_data->cur_mode = XGBE_MODE_KR; in xgbe_phy_kr_mode()
2114 netif_dbg(pdata, link, pdata->netdev, "10GbE KR mode set\n"); in xgbe_phy_kr_mode()
2119 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kx_2500_mode()
2126 phy_data->cur_mode = XGBE_MODE_KX_2500; in xgbe_phy_kx_2500_mode()
2128 netif_dbg(pdata, link, pdata->netdev, "2.5GbE KX mode set\n"); in xgbe_phy_kx_2500_mode()
2133 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kx_1000_mode()
2140 phy_data->cur_mode = XGBE_MODE_KX_1000; in xgbe_phy_kx_1000_mode()
2142 netif_dbg(pdata, link, pdata->netdev, "1GbE KX mode set\n"); in xgbe_phy_kx_1000_mode()
2147 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cur_mode()
2149 return phy_data->cur_mode; in xgbe_phy_cur_mode()
2154 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_switch_baset_mode()
2156 /* No switching if not 10GBase-T */ in xgbe_phy_switch_baset_mode()
2157 if (phy_data->port_mode != XGBE_PORT_MODE_10GBASE_T) in xgbe_phy_switch_baset_mode()
2177 /* If we are in KR switch to KX, and vice-versa */ in xgbe_phy_switch_bp_mode()
2189 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_switch_mode()
2191 switch (phy_data->port_mode) { in xgbe_phy_switch_mode()
2248 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) in xgbe_phy_get_sfp_mode()
2285 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_get_mode()
2287 switch (phy_data->port_mode) { in xgbe_phy_get_mode()
2339 if (pdata->phy.autoneg == AUTONEG_ENABLE) { in xgbe_phy_check_mode()
2344 cur_mode = xgbe_phy_get_mode(pdata, pdata->phy.speed); in xgbe_phy_check_mode()
2355 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_basex_mode()
2372 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_baset_mode()
2395 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_sfp_mode()
2396 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_use_sfp_mode()
2400 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2405 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2410 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2415 if (phy_data->sfp_mod_absent) in xgbe_phy_use_sfp_mode()
2431 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_bp_2500_mode()
2445 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_bp_mode()
2461 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_use_mode()
2463 switch (phy_data->port_mode) { in xgbe_phy_use_mode()
2488 return (phy_data->port_mode == XGBE_PORT_MODE_1000BASE_X); in xgbe_phy_valid_speed_basex_mode()
2490 return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_R); in xgbe_phy_valid_speed_basex_mode()
2504 return (phy_data->port_mode == XGBE_PORT_MODE_NBASE_T); in xgbe_phy_valid_speed_baset_mode()
2506 return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T); in xgbe_phy_valid_speed_baset_mode()
2517 return (phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000); in xgbe_phy_valid_speed_sfp_mode()
2519 return ((phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000) || in xgbe_phy_valid_speed_sfp_mode()
2520 (phy_data->sfp_speed == XGBE_SFP_SPEED_1000)); in xgbe_phy_valid_speed_sfp_mode()
2522 return (phy_data->sfp_speed == XGBE_SFP_SPEED_10000); in xgbe_phy_valid_speed_sfp_mode()
2551 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_valid_speed()
2553 switch (phy_data->port_mode) { in xgbe_phy_valid_speed()
2575 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_link_status()
2581 if (phy_data->port_mode == XGBE_PORT_MODE_SFP) { in xgbe_phy_link_status()
2585 if (phy_data->sfp_changed) { in xgbe_phy_link_status()
2590 if (phy_data->sfp_mod_absent || phy_data->sfp_rx_los) in xgbe_phy_link_status()
2594 if (phy_data->phydev) { in xgbe_phy_link_status()
2596 ret = phy_read_status(phy_data->phydev); in xgbe_phy_link_status()
2600 if ((pdata->phy.autoneg == AUTONEG_ENABLE) && in xgbe_phy_link_status()
2601 !phy_aneg_done(phy_data->phydev)) in xgbe_phy_link_status()
2604 if (!phy_data->phydev->link) in xgbe_phy_link_status()
2616 if (pdata->phy.autoneg == AUTONEG_ENABLE && in xgbe_phy_link_status()
2617 phy_data->port_mode == XGBE_PORT_MODE_BACKPLANE) { in xgbe_phy_link_status()
2618 if (!test_bit(XGBE_LINK_INIT, &pdata->dev_state)) { in xgbe_phy_link_status()
2619 netif_carrier_off(pdata->netdev); in xgbe_phy_link_status()
2625 if (phy_data->rrc_count++ > XGBE_RRC_FREQUENCY) { in xgbe_phy_link_status()
2626 phy_data->rrc_count = 0; in xgbe_phy_link_status()
2635 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_gpio_setup()
2637 phy_data->sfp_gpio_address = XGBE_GPIO_ADDRESS_PCA9555 + in xgbe_phy_sfp_gpio_setup()
2638 XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2641 phy_data->sfp_gpio_mask = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2644 phy_data->sfp_gpio_rx_los = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2646 phy_data->sfp_gpio_tx_fault = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2648 phy_data->sfp_gpio_mod_absent = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2650 phy_data->sfp_gpio_rate_select = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2654 dev_dbg(pdata->dev, "SFP: gpio_address=%#x\n", in xgbe_phy_sfp_gpio_setup()
2655 phy_data->sfp_gpio_address); in xgbe_phy_sfp_gpio_setup()
2656 dev_dbg(pdata->dev, "SFP: gpio_mask=%#x\n", in xgbe_phy_sfp_gpio_setup()
2657 phy_data->sfp_gpio_mask); in xgbe_phy_sfp_gpio_setup()
2658 dev_dbg(pdata->dev, "SFP: gpio_rx_los=%u\n", in xgbe_phy_sfp_gpio_setup()
2659 phy_data->sfp_gpio_rx_los); in xgbe_phy_sfp_gpio_setup()
2660 dev_dbg(pdata->dev, "SFP: gpio_tx_fault=%u\n", in xgbe_phy_sfp_gpio_setup()
2661 phy_data->sfp_gpio_tx_fault); in xgbe_phy_sfp_gpio_setup()
2662 dev_dbg(pdata->dev, "SFP: gpio_mod_absent=%u\n", in xgbe_phy_sfp_gpio_setup()
2663 phy_data->sfp_gpio_mod_absent); in xgbe_phy_sfp_gpio_setup()
2664 dev_dbg(pdata->dev, "SFP: gpio_rate_select=%u\n", in xgbe_phy_sfp_gpio_setup()
2665 phy_data->sfp_gpio_rate_select); in xgbe_phy_sfp_gpio_setup()
2671 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_comm_setup()
2674 mux_addr_hi = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_HI); in xgbe_phy_sfp_comm_setup()
2675 mux_addr_lo = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_LO); in xgbe_phy_sfp_comm_setup()
2679 phy_data->sfp_comm = XGBE_SFP_COMM_PCA9545; in xgbe_phy_sfp_comm_setup()
2680 phy_data->sfp_mux_address = (mux_addr_hi << 2) + mux_addr_lo; in xgbe_phy_sfp_comm_setup()
2681 phy_data->sfp_mux_channel = XP_GET_BITS(pdata->pp4, XP_PROP_4, in xgbe_phy_sfp_comm_setup()
2685 dev_dbg(pdata->dev, "SFP: mux_address=%#x\n", in xgbe_phy_sfp_comm_setup()
2686 phy_data->sfp_mux_address); in xgbe_phy_sfp_comm_setup()
2687 dev_dbg(pdata->dev, "SFP: mux_channel=%u\n", in xgbe_phy_sfp_comm_setup()
2688 phy_data->sfp_mux_channel); in xgbe_phy_sfp_comm_setup()
2700 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_int_mdio_reset()
2703 ret = pdata->hw_if.set_gpio(pdata, phy_data->mdio_reset_gpio); in xgbe_phy_int_mdio_reset()
2707 ret = pdata->hw_if.clr_gpio(pdata, phy_data->mdio_reset_gpio); in xgbe_phy_int_mdio_reset()
2714 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_i2c_mdio_reset()
2720 ret = xgbe_phy_i2c_read(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
2732 if (phy_data->mdio_reset_gpio < 8) in xgbe_phy_i2c_mdio_reset()
2733 gpio_data[1] |= (1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
2735 gpio_data[2] |= (1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
2738 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
2744 if (phy_data->mdio_reset_gpio < 8) in xgbe_phy_i2c_mdio_reset()
2745 gpio_data[1] &= ~(1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
2747 gpio_data[2] &= ~(1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
2750 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
2758 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_reset()
2761 if (phy_data->conn_type != XGBE_CONN_TYPE_MDIO) in xgbe_phy_mdio_reset()
2768 if (phy_data->mdio_reset == XGBE_MDIO_RESET_I2C_GPIO) in xgbe_phy_mdio_reset()
2770 else if (phy_data->mdio_reset == XGBE_MDIO_RESET_INT_GPIO) in xgbe_phy_mdio_reset()
2780 if (!phy_data->redrv) in xgbe_phy_redrv_error()
2783 if (phy_data->redrv_if >= XGBE_PHY_REDRV_IF_MAX) in xgbe_phy_redrv_error()
2786 switch (phy_data->redrv_model) { in xgbe_phy_redrv_error()
2788 if (phy_data->redrv_lane > 3) in xgbe_phy_redrv_error()
2792 if (phy_data->redrv_lane > 1) in xgbe_phy_redrv_error()
2804 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_reset_setup()
2806 if (phy_data->conn_type != XGBE_CONN_TYPE_MDIO) in xgbe_phy_mdio_reset_setup()
2809 phy_data->mdio_reset = XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET); in xgbe_phy_mdio_reset_setup()
2810 switch (phy_data->mdio_reset) { in xgbe_phy_mdio_reset_setup()
2816 dev_err(pdata->dev, "unsupported MDIO reset (%#x)\n", in xgbe_phy_mdio_reset_setup()
2817 phy_data->mdio_reset); in xgbe_phy_mdio_reset_setup()
2818 return -EINVAL; in xgbe_phy_mdio_reset_setup()
2821 if (phy_data->mdio_reset == XGBE_MDIO_RESET_I2C_GPIO) { in xgbe_phy_mdio_reset_setup()
2822 phy_data->mdio_reset_addr = XGBE_GPIO_ADDRESS_PCA9555 + in xgbe_phy_mdio_reset_setup()
2823 XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
2825 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
2827 } else if (phy_data->mdio_reset == XGBE_MDIO_RESET_INT_GPIO) { in xgbe_phy_mdio_reset_setup()
2828 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
2837 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_port_mode_mismatch()
2839 switch (phy_data->port_mode) { in xgbe_phy_port_mode_mismatch()
2842 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
2843 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
2847 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) in xgbe_phy_port_mode_mismatch()
2851 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
2852 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)) in xgbe_phy_port_mode_mismatch()
2856 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_port_mode_mismatch()
2860 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
2861 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
2862 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500)) in xgbe_phy_port_mode_mismatch()
2866 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
2867 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
2868 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
2872 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) in xgbe_phy_port_mode_mismatch()
2876 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
2877 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
2878 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
2890 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_conn_type_mismatch()
2892 switch (phy_data->port_mode) { in xgbe_phy_conn_type_mismatch()
2896 if (phy_data->conn_type == XGBE_CONN_TYPE_BACKPLANE) in xgbe_phy_conn_type_mismatch()
2904 if (phy_data->conn_type == XGBE_CONN_TYPE_MDIO) in xgbe_phy_conn_type_mismatch()
2908 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_conn_type_mismatch()
2920 if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS)) in xgbe_phy_port_enabled()
2922 if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE)) in xgbe_phy_port_enabled()
2930 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cdr_track()
2932 if (!pdata->debugfs_an_cdr_workaround) in xgbe_phy_cdr_track()
2935 if (!phy_data->phy_cdr_notrack) in xgbe_phy_cdr_track()
2938 usleep_range(phy_data->phy_cdr_delay, in xgbe_phy_cdr_track()
2939 phy_data->phy_cdr_delay + 500); in xgbe_phy_cdr_track()
2945 phy_data->phy_cdr_notrack = 0; in xgbe_phy_cdr_track()
2950 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cdr_notrack()
2952 if (!pdata->debugfs_an_cdr_workaround) in xgbe_phy_cdr_notrack()
2955 if (phy_data->phy_cdr_notrack) in xgbe_phy_cdr_notrack()
2964 phy_data->phy_cdr_notrack = 1; in xgbe_phy_cdr_notrack()
2969 if (!pdata->debugfs_an_cdr_track_early) in xgbe_phy_kr_training_post()
2975 if (pdata->debugfs_an_cdr_track_early) in xgbe_phy_kr_training_pre()
2981 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_post()
2983 switch (pdata->an_mode) { in xgbe_phy_an_post()
2986 if (phy_data->cur_mode != XGBE_MODE_KR) in xgbe_phy_an_post()
2991 switch (pdata->an_result) { in xgbe_phy_an_post()
2996 if (phy_data->phy_cdr_delay < XGBE_CDR_DELAY_MAX) in xgbe_phy_an_post()
2997 phy_data->phy_cdr_delay += XGBE_CDR_DELAY_INC; in xgbe_phy_an_post()
2999 phy_data->phy_cdr_delay = XGBE_CDR_DELAY_INIT; in xgbe_phy_an_post()
3010 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_pre()
3012 switch (pdata->an_mode) { in xgbe_phy_an_pre()
3015 if (phy_data->cur_mode != XGBE_MODE_KR) in xgbe_phy_an_pre()
3027 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_stop()
3043 pdata->i2c_if.i2c_stop(pdata); in xgbe_phy_stop()
3048 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_start()
3052 ret = pdata->i2c_if.i2c_start(pdata); in xgbe_phy_start()
3056 /* Set the proper MDIO mode for the re-driver */ in xgbe_phy_start()
3057 if (phy_data->redrv && !phy_data->redrv_if) { in xgbe_phy_start()
3058 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr, in xgbe_phy_start()
3061 netdev_err(pdata->netdev, in xgbe_phy_start()
3063 phy_data->redrv_addr); in xgbe_phy_start()
3069 xgbe_phy_set_mode(pdata, phy_data->start_mode); in xgbe_phy_start()
3075 switch (phy_data->port_mode) { in xgbe_phy_start()
3091 pdata->i2c_if.i2c_stop(pdata); in xgbe_phy_start()
3098 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_reset()
3103 cur_mode = phy_data->cur_mode; in xgbe_phy_reset()
3107 if (!phy_data->phydev) in xgbe_phy_reset()
3115 return phy_init_hw(phy_data->phydev); in xgbe_phy_reset()
3120 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_exit()
3123 mdiobus_unregister(phy_data->mii); in xgbe_phy_exit()
3128 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_init()
3135 dev_info(pdata->dev, "device is not enabled\n"); in xgbe_phy_init()
3136 return -ENODEV; in xgbe_phy_init()
3140 ret = pdata->i2c_if.i2c_init(pdata); in xgbe_phy_init()
3144 phy_data = devm_kzalloc(pdata->dev, sizeof(*phy_data), GFP_KERNEL); in xgbe_phy_init()
3146 return -ENOMEM; in xgbe_phy_init()
3147 pdata->phy_data = phy_data; in xgbe_phy_init()
3149 phy_data->port_mode = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_MODE); in xgbe_phy_init()
3150 phy_data->port_id = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_ID); in xgbe_phy_init()
3151 phy_data->port_speeds = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS); in xgbe_phy_init()
3152 phy_data->conn_type = XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE); in xgbe_phy_init()
3153 phy_data->mdio_addr = XP_GET_BITS(pdata->pp0, XP_PROP_0, MDIO_ADDR); in xgbe_phy_init()
3155 dev_dbg(pdata->dev, "port mode=%u\n", phy_data->port_mode); in xgbe_phy_init()
3156 dev_dbg(pdata->dev, "port id=%u\n", phy_data->port_id); in xgbe_phy_init()
3157 dev_dbg(pdata->dev, "port speeds=%#x\n", phy_data->port_speeds); in xgbe_phy_init()
3158 dev_dbg(pdata->dev, "conn type=%u\n", phy_data->conn_type); in xgbe_phy_init()
3159 dev_dbg(pdata->dev, "mdio addr=%u\n", phy_data->mdio_addr); in xgbe_phy_init()
3162 phy_data->redrv = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_PRESENT); in xgbe_phy_init()
3163 phy_data->redrv_if = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_IF); in xgbe_phy_init()
3164 phy_data->redrv_addr = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_ADDR); in xgbe_phy_init()
3165 phy_data->redrv_lane = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_LANE); in xgbe_phy_init()
3166 phy_data->redrv_model = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_MODEL); in xgbe_phy_init()
3167 if (phy_data->redrv && netif_msg_probe(pdata)) { in xgbe_phy_init()
3168 dev_dbg(pdata->dev, "redrv present\n"); in xgbe_phy_init()
3169 dev_dbg(pdata->dev, "redrv i/f=%u\n", phy_data->redrv_if); in xgbe_phy_init()
3170 dev_dbg(pdata->dev, "redrv addr=%#x\n", phy_data->redrv_addr); in xgbe_phy_init()
3171 dev_dbg(pdata->dev, "redrv lane=%u\n", phy_data->redrv_lane); in xgbe_phy_init()
3172 dev_dbg(pdata->dev, "redrv model=%u\n", phy_data->redrv_model); in xgbe_phy_init()
3177 dev_err(pdata->dev, "phy mode/connection mismatch (%#x/%#x)\n", in xgbe_phy_init()
3178 phy_data->port_mode, phy_data->conn_type); in xgbe_phy_init()
3179 return -EINVAL; in xgbe_phy_init()
3184 dev_err(pdata->dev, "phy mode/speed mismatch (%#x/%#x)\n", in xgbe_phy_init()
3185 phy_data->port_mode, phy_data->port_speeds); in xgbe_phy_init()
3186 return -EINVAL; in xgbe_phy_init()
3194 /* Validate the re-driver information */ in xgbe_phy_init()
3196 dev_err(pdata->dev, "phy re-driver settings error\n"); in xgbe_phy_init()
3197 return -EINVAL; in xgbe_phy_init()
3199 pdata->kr_redrv = phy_data->redrv; in xgbe_phy_init()
3202 phy_data->cur_mode = XGBE_MODE_UNKNOWN; in xgbe_phy_init()
3207 switch (phy_data->port_mode) { in xgbe_phy_init()
3216 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3218 phy_data->start_mode = XGBE_MODE_KX_1000; in xgbe_phy_init()
3220 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_init()
3222 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_init()
3224 phy_data->start_mode = XGBE_MODE_KR; in xgbe_phy_init()
3227 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3234 phy_data->start_mode = XGBE_MODE_KX_2500; in xgbe_phy_init()
3236 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3239 /* MDIO 1GBase-T support */ in xgbe_phy_init()
3245 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3247 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3249 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3251 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3254 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3257 /* MDIO Base-X support */ in xgbe_phy_init()
3264 phy_data->start_mode = XGBE_MODE_X; in xgbe_phy_init()
3266 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3269 /* MDIO NBase-T support */ in xgbe_phy_init()
3275 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3277 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3279 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3281 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3283 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) { in xgbe_phy_init()
3285 phy_data->start_mode = XGBE_MODE_KX_2500; in xgbe_phy_init()
3288 phy_data->phydev_mode = XGBE_MDIO_MODE_CL45; in xgbe_phy_init()
3291 /* 10GBase-T support */ in xgbe_phy_init()
3297 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3299 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3301 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3303 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3305 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_init()
3307 phy_data->start_mode = XGBE_MODE_KR; in xgbe_phy_init()
3310 phy_data->phydev_mode = XGBE_MDIO_MODE_CL45; in xgbe_phy_init()
3313 /* 10GBase-R support */ in xgbe_phy_init()
3323 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_init()
3325 phy_data->start_mode = XGBE_MODE_SFI; in xgbe_phy_init()
3327 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3337 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) in xgbe_phy_init()
3338 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3339 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_init()
3340 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3341 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) in xgbe_phy_init()
3342 phy_data->start_mode = XGBE_MODE_SFI; in xgbe_phy_init()
3344 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3349 return -EINVAL; in xgbe_phy_init()
3353 dev_dbg(pdata->dev, "phy supported=0x%*pb\n", in xgbe_phy_init()
3355 lks->link_modes.supported); in xgbe_phy_init()
3357 if ((phy_data->conn_type & XGBE_CONN_TYPE_MDIO) && in xgbe_phy_init()
3358 (phy_data->phydev_mode != XGBE_MDIO_MODE_NONE)) { in xgbe_phy_init()
3359 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr, in xgbe_phy_init()
3360 phy_data->phydev_mode); in xgbe_phy_init()
3362 dev_err(pdata->dev, in xgbe_phy_init()
3364 phy_data->mdio_addr, phy_data->phydev_mode); in xgbe_phy_init()
3365 return -EINVAL; in xgbe_phy_init()
3369 if (phy_data->redrv && !phy_data->redrv_if) { in xgbe_phy_init()
3370 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr, in xgbe_phy_init()
3373 dev_err(pdata->dev, in xgbe_phy_init()
3375 phy_data->redrv_addr); in xgbe_phy_init()
3376 return -EINVAL; in xgbe_phy_init()
3380 phy_data->phy_cdr_delay = XGBE_CDR_DELAY_INIT; in xgbe_phy_init()
3383 mii = devm_mdiobus_alloc(pdata->dev); in xgbe_phy_init()
3385 dev_err(pdata->dev, "mdiobus_alloc failed\n"); in xgbe_phy_init()
3386 return -ENOMEM; in xgbe_phy_init()
3389 mii->priv = pdata; in xgbe_phy_init()
3390 mii->name = "amd-xgbe-mii"; in xgbe_phy_init()
3391 mii->read = xgbe_phy_mii_read; in xgbe_phy_init()
3392 mii->write = xgbe_phy_mii_write; in xgbe_phy_init()
3393 mii->parent = pdata->dev; in xgbe_phy_init()
3394 mii->phy_mask = ~0; in xgbe_phy_init()
3395 snprintf(mii->id, sizeof(mii->id), "%s", dev_name(pdata->dev)); in xgbe_phy_init()
3398 dev_err(pdata->dev, "mdiobus_register failed\n"); in xgbe_phy_init()
3401 phy_data->mii = mii; in xgbe_phy_init()
3408 struct xgbe_phy_impl_if *phy_impl = &phy_if->phy_impl; in xgbe_init_function_ptrs_phy_v2()
3410 phy_impl->init = xgbe_phy_init; in xgbe_init_function_ptrs_phy_v2()
3411 phy_impl->exit = xgbe_phy_exit; in xgbe_init_function_ptrs_phy_v2()
3413 phy_impl->reset = xgbe_phy_reset; in xgbe_init_function_ptrs_phy_v2()
3414 phy_impl->start = xgbe_phy_start; in xgbe_init_function_ptrs_phy_v2()
3415 phy_impl->stop = xgbe_phy_stop; in xgbe_init_function_ptrs_phy_v2()
3417 phy_impl->link_status = xgbe_phy_link_status; in xgbe_init_function_ptrs_phy_v2()
3419 phy_impl->valid_speed = xgbe_phy_valid_speed; in xgbe_init_function_ptrs_phy_v2()
3421 phy_impl->use_mode = xgbe_phy_use_mode; in xgbe_init_function_ptrs_phy_v2()
3422 phy_impl->set_mode = xgbe_phy_set_mode; in xgbe_init_function_ptrs_phy_v2()
3423 phy_impl->get_mode = xgbe_phy_get_mode; in xgbe_init_function_ptrs_phy_v2()
3424 phy_impl->switch_mode = xgbe_phy_switch_mode; in xgbe_init_function_ptrs_phy_v2()
3425 phy_impl->cur_mode = xgbe_phy_cur_mode; in xgbe_init_function_ptrs_phy_v2()
3427 phy_impl->an_mode = xgbe_phy_an_mode; in xgbe_init_function_ptrs_phy_v2()
3429 phy_impl->an_config = xgbe_phy_an_config; in xgbe_init_function_ptrs_phy_v2()
3431 phy_impl->an_advertising = xgbe_phy_an_advertising; in xgbe_init_function_ptrs_phy_v2()
3433 phy_impl->an_outcome = xgbe_phy_an_outcome; in xgbe_init_function_ptrs_phy_v2()
3435 phy_impl->an_pre = xgbe_phy_an_pre; in xgbe_init_function_ptrs_phy_v2()
3436 phy_impl->an_post = xgbe_phy_an_post; in xgbe_init_function_ptrs_phy_v2()
3438 phy_impl->kr_training_pre = xgbe_phy_kr_training_pre; in xgbe_init_function_ptrs_phy_v2()
3439 phy_impl->kr_training_post = xgbe_phy_kr_training_post; in xgbe_init_function_ptrs_phy_v2()
3441 phy_impl->module_info = xgbe_phy_module_info; in xgbe_init_function_ptrs_phy_v2()
3442 phy_impl->module_eeprom = xgbe_phy_module_eeprom; in xgbe_init_function_ptrs_phy_v2()