Lines Matching +full:8 +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
35 #define QCA8K_MASK_CTRL_DEVICE_ID_MASK GENMASK(15, 8)
36 #define QCA8K_MASK_CTRL_DEVICE_ID(x) ((x) >> 8)
40 #define QCA8K_PORT_PAD_RGMII_EN BIT(26)
43 #define QCA8K_PORT_PAD_RGMII_TX_DELAY_EN BIT(25)
44 #define QCA8K_PORT_PAD_RGMII_RX_DELAY_EN BIT(24)
46 #define QCA8K_PORT_PAD_SGMII_EN BIT(7)
48 #define QCA8K_PWS_SERDES_AEN_DIS BIT(7)
50 #define QCA8K_MODULE_EN_MIB BIT(0)
52 #define QCA8K_MIB_FLUSH BIT(24)
53 #define QCA8K_MIB_CPU_KEEP BIT(20)
54 #define QCA8K_MIB_BUSY BIT(17)
56 #define QCA8K_MDIO_MASTER_BUSY BIT(31)
57 #define QCA8K_MDIO_MASTER_EN BIT(30)
58 #define QCA8K_MDIO_MASTER_READ BIT(27)
60 #define QCA8K_MDIO_MASTER_SUP_PRE BIT(26)
75 #define QCA8K_PORT_STATUS_TXMAC BIT(2)
76 #define QCA8K_PORT_STATUS_RXMAC BIT(3)
77 #define QCA8K_PORT_STATUS_TXFLOW BIT(4)
78 #define QCA8K_PORT_STATUS_RXFLOW BIT(5)
79 #define QCA8K_PORT_STATUS_DUPLEX BIT(6)
80 #define QCA8K_PORT_STATUS_LINK_UP BIT(8)
81 #define QCA8K_PORT_STATUS_LINK_AUTO BIT(9)
82 #define QCA8K_PORT_STATUS_LINK_PAUSE BIT(10)
83 #define QCA8K_PORT_STATUS_FLOW_AUTO BIT(12)
93 #define QCA8K_SGMII_EN_PLL BIT(1)
94 #define QCA8K_SGMII_EN_RX BIT(2)
95 #define QCA8K_SGMII_EN_TX BIT(3)
96 #define QCA8K_SGMII_EN_SD BIT(4)
97 #define QCA8K_SGMII_CLK125M_DELAY BIT(7)
98 #define QCA8K_SGMII_MODE_CTRL_MASK (BIT(22) | BIT(23))
108 #define QCA8K_REG_PORT_VLAN_CTRL0(_i) (0x420 + (_i * 8))
111 #define QCA8K_REG_PORT_VLAN_CTRL1(_i) (0x424 + (_i * 8))
119 #define QCA8K_ATU_ADDR4_S 8
123 #define QCA8K_ATU_ADDR0_S 8
126 #define QCA8K_ATU_VID_S 8
130 #define QCA8K_ATU_FUNC_BUSY BIT(31)
131 #define QCA8K_ATU_FUNC_PORT_EN BIT(14)
132 #define QCA8K_ATU_FUNC_MULTI_EN BIT(13)
133 #define QCA8K_ATU_FUNC_FULL BIT(12)
135 #define QCA8K_ATU_FUNC_PORT_S 8
137 #define QCA8K_VTU_FUNC0_VALID BIT(20)
138 #define QCA8K_VTU_FUNC0_IVL_EN BIT(19)
146 #define QCA8K_VTU_FUNC1_BUSY BIT(31)
148 #define QCA8K_VTU_FUNC1_FULL BIT(4)
150 #define QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN BIT(10)
154 #define QCA8K_GLOBAL_FW_CTRL1_MC_DP_S 8
158 #define QCA8K_PORT_LOOKUP_VLAN_MODE GENMASK(9, 8)
159 #define QCA8K_PORT_LOOKUP_VLAN_MODE_NONE (0 << 8)
160 #define QCA8K_PORT_LOOKUP_VLAN_MODE_FALLBACK (1 << 8)
161 #define QCA8K_PORT_LOOKUP_VLAN_MODE_CHECK (2 << 8)
162 #define QCA8K_PORT_LOOKUP_VLAN_MODE_SECURE (3 << 8)
170 #define QCA8K_PORT_LOOKUP_LEARN BIT(20)
176 #define QCA8K_GLOBAL_FC_GOL_XOFF_THRES_S GENMASK(8, 0)
183 #define QCA8K_PORT_HOL_CTRL0_EG_PRI2_BUF GENMASK(11, 8)
184 #define QCA8K_PORT_HOL_CTRL0_EG_PRI2(x) ((x) << 8)
197 #define QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN BIT(6)
198 #define QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN BIT(7)
199 #define QCA8K_PORT_HOL_CTRL1_WRED_EN BIT(8)
200 #define QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN BIT(16)