Lines Matching +full:2 +full:- +full:lane
1 // SPDX-License-Identifier: GPL-2.0-or-later
37 int lane, int device, int reg, u16 *val) in mv88e6390_serdes_read() argument
41 return mv88e6xxx_phy_read(chip, lane, reg_c45, val); in mv88e6390_serdes_read()
45 int lane, int device, int reg, u16 val) in mv88e6390_serdes_write() argument
49 return mv88e6xxx_phy_write(chip, lane, reg_c45, val); in mv88e6390_serdes_write()
57 state->link = !!(status & MV88E6390_SGMII_PHY_STATUS_LINK); in mv88e6xxx_serdes_pcs_get_state()
58 state->duplex = status & in mv88e6xxx_serdes_pcs_get_state()
63 state->pause |= MLO_PAUSE_TX; in mv88e6xxx_serdes_pcs_get_state()
65 state->pause |= MLO_PAUSE_RX; in mv88e6xxx_serdes_pcs_get_state()
69 if (state->interface == PHY_INTERFACE_MODE_2500BASEX) in mv88e6xxx_serdes_pcs_get_state()
70 state->speed = SPEED_2500; in mv88e6xxx_serdes_pcs_get_state()
72 state->speed = SPEED_1000; in mv88e6xxx_serdes_pcs_get_state()
75 state->speed = SPEED_100; in mv88e6xxx_serdes_pcs_get_state()
78 state->speed = SPEED_10; in mv88e6xxx_serdes_pcs_get_state()
81 dev_err(chip->dev, "invalid PHY speed\n"); in mv88e6xxx_serdes_pcs_get_state()
82 return -EINVAL; in mv88e6xxx_serdes_pcs_get_state()
85 state->link = false; in mv88e6xxx_serdes_pcs_get_state()
88 if (state->interface == PHY_INTERFACE_MODE_2500BASEX) in mv88e6xxx_serdes_pcs_get_state()
89 mii_lpa_mod_linkmode_x(state->lp_advertising, lpa, in mv88e6xxx_serdes_pcs_get_state()
91 else if (state->interface == PHY_INTERFACE_MODE_1000BASEX) in mv88e6xxx_serdes_pcs_get_state()
92 mii_lpa_mod_linkmode_x(state->lp_advertising, lpa, in mv88e6xxx_serdes_pcs_get_state()
98 int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane, in mv88e6352_serdes_power() argument
120 int lane, unsigned int mode, in mv88e6352_serdes_pcs_config() argument
169 int lane, struct phylink_link_state *state) in mv88e6352_serdes_pcs_get_state() argument
176 dev_err(chip->dev, "can't read Serdes PHY status: %d\n", err); in mv88e6352_serdes_pcs_get_state()
182 dev_err(chip->dev, "can't read Serdes PHY LPA: %d\n", err); in mv88e6352_serdes_pcs_get_state()
190 int lane) in mv88e6352_serdes_pcs_an_restart() argument
203 int lane, int speed, int duplex) in mv88e6352_serdes_pcs_link_up() argument
235 u8 cmode = chip->ports[port].cmode; in mv88e6352_serdes_get_lane()
236 int lane = -ENODEV; in mv88e6352_serdes_get_lane() local
241 lane = 0xff; /* Unused */ in mv88e6352_serdes_get_lane()
243 return lane; in mv88e6352_serdes_get_lane()
284 memcpy(data + i * ETH_GSTRING_LEN, stat->string, in mv88e6352_serdes_get_strings()
297 err = mv88e6352_serdes_read(chip, stat->reg, ®); in mv88e6352_serdes_get_stat()
299 dev_err(chip->dev, "failed to read statistic\n"); in mv88e6352_serdes_get_stat()
305 if (stat->sizeof_stat == 32) { in mv88e6352_serdes_get_stat()
306 err = mv88e6352_serdes_read(chip, stat->reg + 1, ®); in mv88e6352_serdes_get_stat()
308 dev_err(chip->dev, "failed to read statistic\n"); in mv88e6352_serdes_get_stat()
320 struct mv88e6xxx_port *mv88e6xxx_port = &chip->ports[port]; in mv88e6352_serdes_get_stats()
329 ARRAY_SIZE(mv88e6xxx_port->serdes_stats)); in mv88e6352_serdes_get_stats()
334 mv88e6xxx_port->serdes_stats[i] += value; in mv88e6352_serdes_get_stats()
335 data[i] = mv88e6xxx_port->serdes_stats[i]; in mv88e6352_serdes_get_stats()
349 dev_err(chip->dev, "can't read Serdes BMSR: %d\n", err); in mv88e6352_serdes_irq_link()
353 dsa_port_phylink_mac_change(chip->ds, port, !!(bmsr & BMSR_LSTATUS)); in mv88e6352_serdes_irq_link()
357 int lane) in mv88e6352_serdes_irq_status() argument
375 int mv88e6352_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, int lane, in mv88e6352_serdes_irq_enable() argument
388 return irq_find_mapping(chip->g2_irq.domain, MV88E6352_SERDES_IRQ); in mv88e6352_serdes_irq_mapping()
418 u8 cmode = chip->ports[port].cmode; in mv88e6341_serdes_get_lane()
419 int lane = -ENODEV; in mv88e6341_serdes_get_lane() local
426 lane = MV88E6341_PORT5_LANE; in mv88e6341_serdes_get_lane()
430 return lane; in mv88e6341_serdes_get_lane()
433 int mv88e6185_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane, in mv88e6185_serdes_power() argument
437 * to supply this function to avoid returning -EOPNOTSUPP in in mv88e6185_serdes_power()
446 * need to return a non-negative lane number so that callers of in mv88e6185_serdes_get_lane()
449 switch (chip->ports[port].cmode) { in mv88e6185_serdes_get_lane()
454 return -ENODEV; in mv88e6185_serdes_get_lane()
459 int lane, struct phylink_link_state *state) in mv88e6185_serdes_pcs_get_state() argument
468 state->link = !!(status & MV88E6XXX_PORT_STS_LINK); in mv88e6185_serdes_pcs_get_state()
470 if (state->link) { in mv88e6185_serdes_pcs_get_state()
471 state->duplex = status & MV88E6XXX_PORT_STS_DUPLEX ? DUPLEX_FULL : DUPLEX_HALF; in mv88e6185_serdes_pcs_get_state()
475 state->speed = SPEED_1000; in mv88e6185_serdes_pcs_get_state()
478 state->speed = SPEED_100; in mv88e6185_serdes_pcs_get_state()
481 state->speed = SPEED_10; in mv88e6185_serdes_pcs_get_state()
484 dev_err(chip->dev, "invalid PHY speed\n"); in mv88e6185_serdes_pcs_get_state()
485 return -EINVAL; in mv88e6185_serdes_pcs_get_state()
488 state->duplex = DUPLEX_UNKNOWN; in mv88e6185_serdes_pcs_get_state()
489 state->speed = SPEED_UNKNOWN; in mv88e6185_serdes_pcs_get_state()
495 int mv88e6097_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, int lane, in mv88e6097_serdes_irq_enable() argument
498 u8 cmode = chip->ports[port].cmode; in mv88e6097_serdes_irq_enable()
501 * need to return 0 to avoid returning -EOPNOTSUPP in in mv88e6097_serdes_irq_enable()
510 return -EOPNOTSUPP; in mv88e6097_serdes_irq_enable()
520 dev_err(chip->dev, "can't read port status: %d\n", err); in mv88e6097_serdes_irq_link()
524 dsa_port_phylink_mac_change(chip->ds, port, !!(status & MV88E6XXX_PORT_STS_LINK)); in mv88e6097_serdes_irq_link()
528 int lane) in mv88e6097_serdes_irq_status() argument
530 u8 cmode = chip->ports[port].cmode; in mv88e6097_serdes_irq_status()
544 u8 cmode = chip->ports[port].cmode; in mv88e6390_serdes_get_lane()
545 int lane = -ENODEV; in mv88e6390_serdes_get_lane() local
552 lane = MV88E6390_PORT9_LANE0; in mv88e6390_serdes_get_lane()
558 lane = MV88E6390_PORT10_LANE0; in mv88e6390_serdes_get_lane()
562 return lane; in mv88e6390_serdes_get_lane()
567 u8 cmode_port = chip->ports[port].cmode; in mv88e6390x_serdes_get_lane()
568 u8 cmode_port10 = chip->ports[10].cmode; in mv88e6390x_serdes_get_lane()
569 u8 cmode_port9 = chip->ports[9].cmode; in mv88e6390x_serdes_get_lane()
570 int lane = -ENODEV; in mv88e6390x_serdes_get_lane() local
573 case 2: in mv88e6390x_serdes_get_lane()
578 lane = MV88E6390_PORT9_LANE1; in mv88e6390x_serdes_get_lane()
586 lane = MV88E6390_PORT9_LANE2; in mv88e6390x_serdes_get_lane()
594 lane = MV88E6390_PORT9_LANE3; in mv88e6390x_serdes_get_lane()
601 lane = MV88E6390_PORT10_LANE1; in mv88e6390x_serdes_get_lane()
609 lane = MV88E6390_PORT10_LANE2; in mv88e6390x_serdes_get_lane()
617 lane = MV88E6390_PORT10_LANE3; in mv88e6390x_serdes_get_lane()
625 lane = MV88E6390_PORT9_LANE0; in mv88e6390x_serdes_get_lane()
633 lane = MV88E6390_PORT10_LANE0; in mv88e6390x_serdes_get_lane()
637 return lane; in mv88e6390x_serdes_get_lane()
640 /* Only Ports 0, 9 and 10 have SERDES lanes. Return the SERDES lane address
641 * a port is using else Returns -ENODEV.
645 u8 cmode = chip->ports[port].cmode; in mv88e6393x_serdes_get_lane()
646 int lane = -ENODEV; in mv88e6393x_serdes_get_lane() local
649 return -EOPNOTSUPP; in mv88e6393x_serdes_get_lane()
656 lane = port; in mv88e6393x_serdes_get_lane()
658 return lane; in mv88e6393x_serdes_get_lane()
661 /* Set power up/down for 10GBASE-R and 10GBASE-X4/X2 */
662 static int mv88e6390_serdes_power_10g(struct mv88e6xxx_chip *chip, int lane, in mv88e6390_serdes_power_10g() argument
668 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_power_10g()
682 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_power_10g()
688 /* Set power up/down for SGMII and 1000Base-X */
689 static int mv88e6390_serdes_power_sgmii(struct mv88e6xxx_chip *chip, int lane, in mv88e6390_serdes_power_sgmii() argument
695 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_power_sgmii()
706 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_power_sgmii()
742 memcpy(data + i * ETH_GSTRING_LEN, stat->string, in mv88e6390_serdes_get_strings()
748 static uint64_t mv88e6390_serdes_get_stat(struct mv88e6xxx_chip *chip, int lane, in mv88e6390_serdes_get_stat() argument
755 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_get_stat()
756 stat->reg + i, ®[i]); in mv88e6390_serdes_get_stat()
758 dev_err(chip->dev, "failed to read statistic\n"); in mv88e6390_serdes_get_stat()
763 return reg[0] | ((u64)reg[1] << 16) | ((u64)reg[2] << 32); in mv88e6390_serdes_get_stat()
770 int lane; in mv88e6390_serdes_get_stats() local
773 lane = mv88e6xxx_serdes_get_lane(chip, port); in mv88e6390_serdes_get_stats()
774 if (lane < 0) in mv88e6390_serdes_get_stats()
779 data[i] = mv88e6390_serdes_get_stat(chip, lane, stat); in mv88e6390_serdes_get_stats()
785 static int mv88e6390_serdes_enable_checker(struct mv88e6xxx_chip *chip, int lane) in mv88e6390_serdes_enable_checker() argument
790 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_enable_checker()
796 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_enable_checker()
800 int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane, in mv88e6390_serdes_power() argument
803 u8 cmode = chip->ports[port].cmode; in mv88e6390_serdes_power()
810 err = mv88e6390_serdes_power_sgmii(chip, lane, up); in mv88e6390_serdes_power()
814 err = mv88e6390_serdes_power_10g(chip, lane, up); in mv88e6390_serdes_power()
819 err = mv88e6390_serdes_enable_checker(chip, lane); in mv88e6390_serdes_power()
825 int lane, unsigned int mode, in mv88e6390_serdes_pcs_config() argument
852 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_config()
859 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_config()
865 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_config()
879 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_config()
884 int port, int lane, struct phylink_link_state *state) in mv88e6390_serdes_pcs_get_state_sgmii() argument
889 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_get_state_sgmii()
892 dev_err(chip->dev, "can't read Serdes PHY status: %d\n", err); in mv88e6390_serdes_pcs_get_state_sgmii()
896 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_get_state_sgmii()
899 dev_err(chip->dev, "can't read Serdes PHY LPA: %d\n", err); in mv88e6390_serdes_pcs_get_state_sgmii()
907 int port, int lane, struct phylink_link_state *state) in mv88e6390_serdes_pcs_get_state_10g() argument
912 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_get_state_10g()
917 state->link = !!(status & MDIO_STAT1_LSTATUS); in mv88e6390_serdes_pcs_get_state_10g()
918 if (state->link) { in mv88e6390_serdes_pcs_get_state_10g()
919 state->speed = SPEED_10000; in mv88e6390_serdes_pcs_get_state_10g()
920 state->duplex = DUPLEX_FULL; in mv88e6390_serdes_pcs_get_state_10g()
927 int port, int lane, in mv88e6393x_serdes_pcs_get_state_10g() argument
933 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_pcs_get_state_10g()
938 state->link = !!(status & MDIO_STAT1_LSTATUS); in mv88e6393x_serdes_pcs_get_state_10g()
939 if (state->link) { in mv88e6393x_serdes_pcs_get_state_10g()
940 if (state->interface == PHY_INTERFACE_MODE_5GBASER) in mv88e6393x_serdes_pcs_get_state_10g()
941 state->speed = SPEED_5000; in mv88e6393x_serdes_pcs_get_state_10g()
943 state->speed = SPEED_10000; in mv88e6393x_serdes_pcs_get_state_10g()
944 state->duplex = DUPLEX_FULL; in mv88e6393x_serdes_pcs_get_state_10g()
951 int lane, struct phylink_link_state *state) in mv88e6390_serdes_pcs_get_state() argument
953 switch (state->interface) { in mv88e6390_serdes_pcs_get_state()
957 return mv88e6390_serdes_pcs_get_state_sgmii(chip, port, lane, in mv88e6390_serdes_pcs_get_state()
961 return mv88e6390_serdes_pcs_get_state_10g(chip, port, lane, in mv88e6390_serdes_pcs_get_state()
965 return -EOPNOTSUPP; in mv88e6390_serdes_pcs_get_state()
970 int lane, struct phylink_link_state *state) in mv88e6393x_serdes_pcs_get_state() argument
972 switch (state->interface) { in mv88e6393x_serdes_pcs_get_state()
976 return mv88e6390_serdes_pcs_get_state_sgmii(chip, port, lane, in mv88e6393x_serdes_pcs_get_state()
980 return mv88e6393x_serdes_pcs_get_state_10g(chip, port, lane, in mv88e6393x_serdes_pcs_get_state()
984 return -EOPNOTSUPP; in mv88e6393x_serdes_pcs_get_state()
989 int lane) in mv88e6390_serdes_pcs_an_restart() argument
994 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_an_restart()
999 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_an_restart()
1005 int lane, int speed, int duplex) in mv88e6390_serdes_pcs_link_up() argument
1010 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_link_up()
1034 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_link_up()
1039 int port, int lane) in mv88e6390_serdes_irq_link_sgmii() argument
1045 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_irq_link_sgmii()
1048 dev_err(chip->dev, "can't read Serdes BMSR: %d\n", err); in mv88e6390_serdes_irq_link_sgmii()
1052 dsa_port_phylink_mac_change(chip->ds, port, !!(bmsr & BMSR_LSTATUS)); in mv88e6390_serdes_irq_link_sgmii()
1056 int port, u8 lane) in mv88e6393x_serdes_irq_link_10g() argument
1062 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_irq_link_10g()
1065 dev_err(chip->dev, "can't read Serdes STAT1: %d\n", err); in mv88e6393x_serdes_irq_link_10g()
1069 dsa_port_phylink_mac_change(chip->ds, port, !!(status & MDIO_STAT1_LSTATUS)); in mv88e6393x_serdes_irq_link_10g()
1073 int lane, bool enable) in mv88e6390_serdes_irq_enable_sgmii() argument
1081 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_irq_enable_sgmii()
1085 int mv88e6390_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, int lane, in mv88e6390_serdes_irq_enable() argument
1088 u8 cmode = chip->ports[port].cmode; in mv88e6390_serdes_irq_enable()
1094 return mv88e6390_serdes_irq_enable_sgmii(chip, lane, enable); in mv88e6390_serdes_irq_enable()
1101 int lane, u16 *status) in mv88e6390_serdes_irq_status_sgmii() argument
1105 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_irq_status_sgmii()
1112 u8 lane, bool enable) in mv88e6393x_serdes_irq_enable_10g() argument
1119 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_irq_enable_10g()
1124 int lane, bool enable) in mv88e6393x_serdes_irq_enable() argument
1126 u8 cmode = chip->ports[port].cmode; in mv88e6393x_serdes_irq_enable()
1132 return mv88e6390_serdes_irq_enable_sgmii(chip, lane, enable); in mv88e6393x_serdes_irq_enable()
1135 return mv88e6393x_serdes_irq_enable_10g(chip, lane, enable); in mv88e6393x_serdes_irq_enable()
1142 u8 lane, u16 *status) in mv88e6393x_serdes_irq_status_10g() argument
1146 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_irq_status_10g()
1153 int lane) in mv88e6393x_serdes_irq_status() argument
1155 u8 cmode = chip->ports[port].cmode; in mv88e6393x_serdes_irq_status()
1164 err = mv88e6390_serdes_irq_status_sgmii(chip, lane, &status); in mv88e6393x_serdes_irq_status()
1170 mv88e6390_serdes_irq_link_sgmii(chip, port, lane); in mv88e6393x_serdes_irq_status()
1175 err = mv88e6393x_serdes_irq_status_10g(chip, lane, &status); in mv88e6393x_serdes_irq_status()
1180 mv88e6393x_serdes_irq_link_10g(chip, port, lane); in mv88e6393x_serdes_irq_status()
1189 int lane) in mv88e6390_serdes_irq_status() argument
1191 u8 cmode = chip->ports[port].cmode; in mv88e6390_serdes_irq_status()
1200 err = mv88e6390_serdes_irq_status_sgmii(chip, lane, &status); in mv88e6390_serdes_irq_status()
1206 mv88e6390_serdes_irq_link_sgmii(chip, port, lane); in mv88e6390_serdes_irq_status()
1215 return irq_find_mapping(chip->g2_irq.domain, port); in mv88e6390_serdes_irq_mapping()
1233 /* 10Gbase-X */
1241 /* 10Gbase-R */
1257 int lane; in mv88e6390_serdes_get_regs() local
1262 lane = mv88e6xxx_serdes_get_lane(chip, port); in mv88e6390_serdes_get_regs()
1263 if (lane < 0) in mv88e6390_serdes_get_regs()
1267 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_get_regs()
1274 static int mv88e6393x_serdes_port_errata(struct mv88e6xxx_chip *chip, int lane) in mv88e6393x_serdes_port_errata() argument
1287 if (lane == MV88E6393X_PORT0_LANE || lane == MV88E6393X_PORT9_LANE || in mv88e6393x_serdes_port_errata()
1288 lane == MV88E6393X_PORT10_LANE) { in mv88e6393x_serdes_port_errata()
1289 err = mv88e6390_serdes_read(chip, lane, in mv88e6393x_serdes_port_errata()
1298 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_port_errata()
1303 err = mv88e6390_serdes_power_sgmii(chip, lane, false); in mv88e6393x_serdes_port_errata()
1309 * When a SERDES port is operating in 1000BASE-X or SGMII mode link may in mv88e6393x_serdes_port_errata()
1314 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_port_errata()
1321 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_port_errata()
1333 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_port_errata()
1352 int mv88e6393x_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane, in mv88e6393x_serdes_power() argument
1355 u8 cmode = chip->ports[port].cmode; in mv88e6393x_serdes_power()
1358 return -EOPNOTSUPP; in mv88e6393x_serdes_power()
1364 return mv88e6390_serdes_power_sgmii(chip, lane, on); in mv88e6393x_serdes_power()
1367 return mv88e6390_serdes_power_10g(chip, lane, on); in mv88e6393x_serdes_power()