1259 	u32 reg_cbt, reg_fdctrl;  in flexcan_set_bittiming_cbt()  local
1330 	reg_fdctrl = priv->read(&regs->fdctrl);  in flexcan_set_bittiming_cbt()
1331 	reg_fdctrl &= ~(FLEXCAN_FDCTRL_FDRATE |  in flexcan_set_bittiming_cbt()
1335 		reg_fdctrl |= FLEXCAN_FDCTRL_FDRATE;  in flexcan_set_bittiming_cbt()
1339 			reg_fdctrl &= ~FLEXCAN_FDCTRL_TDCEN;  in flexcan_set_bittiming_cbt()
1341 			reg_fdctrl |= FLEXCAN_FDCTRL_TDCEN |  in flexcan_set_bittiming_cbt()
1349 	netdev_dbg(dev, "writing fdctrl=0x%08x\n", reg_fdctrl);  in flexcan_set_bittiming_cbt()
1350 	priv->write(reg_fdctrl, &regs->fdctrl);  in flexcan_set_bittiming_cbt()
1609 		u32 reg_fdctrl;  in flexcan_chip_start()  local
1611 		reg_fdctrl = priv->read(&regs->fdctrl);  in flexcan_chip_start()
1612 		reg_fdctrl &= ~(FIELD_PREP(FLEXCAN_FDCTRL_MBDSR1, 0x3) |  in flexcan_chip_start()
1616 			reg_fdctrl |=  in flexcan_chip_start()
1622 			reg_fdctrl |=  in flexcan_chip_start()
1630 			   __func__, reg_fdctrl);  in flexcan_chip_start()
1631 		priv->write(reg_fdctrl, &regs->fdctrl);  in flexcan_chip_start()