Lines Matching full:flexcan
3 // flexcan.c - FLEXCAN CAN controller driver
31 #include <linux/can/platform/flexcan.h>
36 #define DRV_NAME "flexcan"
41 /* FLEXCAN module configuration register (CANMCR) bits */
68 /* FLEXCAN control register (CANCTRL) bits */
92 /* FLEXCAN control register 2 (CTRL2) bits */
102 /* FLEXCAN memory error control register (MECR) bits */
114 /* FLEXCAN error and status register (ESR) bits */
146 /* FLEXCAN Bit Timing register (CBT) bits */
154 /* FLEXCAN FD control register (FDCTRL) bits */
167 /* FLEXCAN FD Bit Timing register (FDCBT) bits */
174 /* FLEXCAN interrupt flag register (IFLAG) bits */
184 /* FLEXCAN message buffers */
209 /* FLEXCAN hardware feature flags
476 /* FlexCAN module is essentially modelled as a little-endian IP in most
480 * However there are some SoCs (e.g. LS1021A) which implement the FlexCAN
484 * In addition, the FlexCAN module can be found on SoCs having ARM or
1548 * earlier versions of flexcan block guide. in flexcan_chip_start()
1586 * on most Flexcan cores, too. Otherwise we don't get in flexcan_chip_start()
2074 { .compatible = "fsl,imx8qm-flexcan", .data = &fsl_imx8qm_devtype_data, },
2075 { .compatible = "fsl,imx8mp-flexcan", .data = &fsl_imx8mp_devtype_data, },
2076 { .compatible = "fsl,imx6q-flexcan", .data = &fsl_imx6q_devtype_data, },
2077 { .compatible = "fsl,imx28-flexcan", .data = &fsl_imx28_devtype_data, },
2078 { .compatible = "fsl,imx53-flexcan", .data = &fsl_imx25_devtype_data, },
2079 { .compatible = "fsl,imx35-flexcan", .data = &fsl_imx25_devtype_data, },
2080 { .compatible = "fsl,imx25-flexcan", .data = &fsl_imx25_devtype_data, },
2081 { .compatible = "fsl,p1010-flexcan", .data = &fsl_p1010_devtype_data, },
2082 { .compatible = "fsl,vf610-flexcan", .data = &fsl_vf610_devtype_data, },
2083 { .compatible = "fsl,ls1021ar2-flexcan", .data = &fsl_ls1021a_r2_devtype_data, },
2084 { .compatible = "fsl,lx2160ar1-flexcan", .data = &fsl_lx2160a_r1_devtype_data, },
2091 .name = "flexcan-mcf5441x",
2419 MODULE_DESCRIPTION("CAN port driver for flexcan based chip");