Lines Matching +full:hw +full:- +full:settle +full:- +full:time
1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
18 #include <linux/dma/mxs-dma.h>
19 #include "gpmi-nand.h"
20 #include "gpmi-regs.h"
21 #include "bch-regs.h"
24 #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
28 /* Converts time to clock cycles */
46 * SFTRST needs 3 GPMI clocks to settle, the reference manual in clear_poll_bit()
52 while ((readl(addr) & mask) && --timeout) in clear_poll_bit()
96 while ((!(readl(reset_addr) & MODULE_CLKGATE)) && --timeout) in gpmi_reset_block()
116 return -ETIMEDOUT; in gpmi_reset_block()
126 clk = this->resources.clock[i]; in __gpmi_enable_clk()
141 for (; i > 0; i--) in __gpmi_enable_clk()
142 clk_disable_unprepare(this->resources.clock[i - 1]); in __gpmi_enable_clk()
148 struct resources *r = &this->resources; in gpmi_init()
151 ret = pm_runtime_get_sync(this->dev); in gpmi_init()
153 pm_runtime_put_noidle(this->dev); in gpmi_init()
157 ret = gpmi_reset_block(r->gpmi_regs, false); in gpmi_init()
165 ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MXS(this)); in gpmi_init()
170 writel(BM_GPMI_CTRL1_GPMI_MODE, r->gpmi_regs + HW_GPMI_CTRL1_CLR); in gpmi_init()
174 r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
176 /* Disable Write-Protection. */ in gpmi_init()
177 writel(BM_GPMI_CTRL1_DEV_RESET, r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
180 writel(BM_GPMI_CTRL1_BCH_MODE, r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
188 r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
191 pm_runtime_mark_last_busy(this->dev); in gpmi_init()
192 pm_runtime_put_autosuspend(this->dev); in gpmi_init()
199 struct resources *r = &this->resources; in gpmi_dump_info()
200 struct bch_geometry *geo = &this->bch_geometry; in gpmi_dump_info()
204 dev_err(this->dev, "Show GPMI registers :\n"); in gpmi_dump_info()
206 reg = readl(r->gpmi_regs + i * 0x10); in gpmi_dump_info()
207 dev_err(this->dev, "offset 0x%.3x : 0x%.8x\n", i * 0x10, reg); in gpmi_dump_info()
211 dev_err(this->dev, "Show BCH registers :\n"); in gpmi_dump_info()
213 reg = readl(r->bch_regs + i * 0x10); in gpmi_dump_info()
214 dev_err(this->dev, "offset 0x%.3x : 0x%.8x\n", i * 0x10, reg); in gpmi_dump_info()
216 dev_err(this->dev, "BCH Geometry :\n" in gpmi_dump_info()
228 geo->gf_len, in gpmi_dump_info()
229 geo->ecc_strength, in gpmi_dump_info()
230 geo->page_size, in gpmi_dump_info()
231 geo->metadata_size, in gpmi_dump_info()
232 geo->ecc_chunk_size, in gpmi_dump_info()
233 geo->ecc_chunk_count, in gpmi_dump_info()
234 geo->payload_size, in gpmi_dump_info()
235 geo->auxiliary_size, in gpmi_dump_info()
236 geo->auxiliary_status_offset, in gpmi_dump_info()
237 geo->block_mark_byte_offset, in gpmi_dump_info()
238 geo->block_mark_bit_offset); in gpmi_dump_info()
243 struct bch_geometry *geo = &this->bch_geometry; in gpmi_check_ecc()
248 if (geo->gf_len == 14) in gpmi_check_ecc()
251 return geo->ecc_strength <= this->devdata->bch_max_ecc_strength; in gpmi_check_ecc()
264 struct bch_geometry *geo = &this->bch_geometry; in set_geometry_by_ecc_info()
265 struct nand_chip *chip = &this->nand; in set_geometry_by_ecc_info()
271 geo->gf_len = 13; in set_geometry_by_ecc_info()
274 geo->gf_len = 14; in set_geometry_by_ecc_info()
277 dev_err(this->dev, in set_geometry_by_ecc_info()
279 nanddev_get_ecc_requirements(&chip->base)->strength, in set_geometry_by_ecc_info()
280 nanddev_get_ecc_requirements(&chip->base)->step_size); in set_geometry_by_ecc_info()
281 return -EINVAL; in set_geometry_by_ecc_info()
283 geo->ecc_chunk_size = ecc_step; in set_geometry_by_ecc_info()
284 geo->ecc_strength = round_up(ecc_strength, 2); in set_geometry_by_ecc_info()
286 return -EINVAL; in set_geometry_by_ecc_info()
289 if (geo->ecc_chunk_size < mtd->oobsize) { in set_geometry_by_ecc_info()
290 dev_err(this->dev, in set_geometry_by_ecc_info()
292 ecc_step, mtd->oobsize); in set_geometry_by_ecc_info()
293 return -EINVAL; in set_geometry_by_ecc_info()
297 geo->metadata_size = 10; in set_geometry_by_ecc_info()
299 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; in set_geometry_by_ecc_info()
305 * |<----------------------------------------------------->| in set_geometry_by_ecc_info()
309 * |<-------------------------------------------->| D | | O' | in set_geometry_by_ecc_info()
310 * | |<---->| |<--->| in set_geometry_by_ecc_info()
312 * +---+----------+-+----------+-+----------+-+----------+-+-----+ in set_geometry_by_ecc_info()
314 * +---+----------+-+----------+-+----------+-+----------+-+-----+ in set_geometry_by_ecc_info()
317 * |<------------>| in set_geometry_by_ecc_info()
333 * P = ------------ + P' + M in set_geometry_by_ecc_info()
336 * The position of block mark moves forward in the ECC-based view in set_geometry_by_ecc_info()
339 * E * G * (N - 1) in set_geometry_by_ecc_info()
340 * D = (---------------- + M) in set_geometry_by_ecc_info()
345 * So the bit position of the physical block mark within the ECC-based in set_geometry_by_ecc_info()
347 * (P' - D) * 8 in set_geometry_by_ecc_info()
349 geo->page_size = mtd->writesize + geo->metadata_size + in set_geometry_by_ecc_info()
350 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8; in set_geometry_by_ecc_info()
352 geo->payload_size = mtd->writesize; in set_geometry_by_ecc_info()
354 geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4); in set_geometry_by_ecc_info()
355 geo->auxiliary_size = ALIGN(geo->metadata_size, 4) in set_geometry_by_ecc_info()
356 + ALIGN(geo->ecc_chunk_count, 4); in set_geometry_by_ecc_info()
358 if (!this->swap_block_mark) in set_geometry_by_ecc_info()
362 block_mark_bit_offset = mtd->writesize * 8 - in set_geometry_by_ecc_info()
363 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) in set_geometry_by_ecc_info()
364 + geo->metadata_size * 8); in set_geometry_by_ecc_info()
366 geo->block_mark_byte_offset = block_mark_bit_offset / 8; in set_geometry_by_ecc_info()
367 geo->block_mark_bit_offset = block_mark_bit_offset % 8; in set_geometry_by_ecc_info()
381 * ------------ <= (O - M)
385 * (O - M) * 8
386 * E <= -------------
391 struct bch_geometry *geo = &this->bch_geometry; in get_ecc_strength()
392 struct mtd_info *mtd = nand_to_mtd(&this->nand); in get_ecc_strength()
395 ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8) in get_ecc_strength()
396 / (geo->gf_len * geo->ecc_chunk_count); in get_ecc_strength()
404 struct bch_geometry *geo = &this->bch_geometry; in legacy_set_geometry()
405 struct mtd_info *mtd = nand_to_mtd(&this->nand); in legacy_set_geometry()
415 geo->metadata_size = 10; in legacy_set_geometry()
418 geo->gf_len = 13; in legacy_set_geometry()
421 geo->ecc_chunk_size = 512; in legacy_set_geometry()
422 while (geo->ecc_chunk_size < mtd->oobsize) { in legacy_set_geometry()
423 geo->ecc_chunk_size *= 2; /* keep C >= O */ in legacy_set_geometry()
424 geo->gf_len = 14; in legacy_set_geometry()
427 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; in legacy_set_geometry()
430 geo->ecc_strength = get_ecc_strength(this); in legacy_set_geometry()
432 dev_err(this->dev, in legacy_set_geometry()
435 geo->ecc_strength, in legacy_set_geometry()
436 this->devdata->bch_max_ecc_strength); in legacy_set_geometry()
437 return -EINVAL; in legacy_set_geometry()
440 geo->page_size = mtd->writesize + geo->metadata_size + in legacy_set_geometry()
441 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8; in legacy_set_geometry()
442 geo->payload_size = mtd->writesize; in legacy_set_geometry()
446 * metadata is padded to the nearest 32-bit boundary. The ECC status in legacy_set_geometry()
448 * nearest 32-bit boundary. in legacy_set_geometry()
450 metadata_size = ALIGN(geo->metadata_size, 4); in legacy_set_geometry()
451 status_size = ALIGN(geo->ecc_chunk_count, 4); in legacy_set_geometry()
453 geo->auxiliary_size = metadata_size + status_size; in legacy_set_geometry()
454 geo->auxiliary_status_offset = metadata_size; in legacy_set_geometry()
456 if (!this->swap_block_mark) in legacy_set_geometry()
461 * the physical block mark within the ECC-based view of the page. in legacy_set_geometry()
467 * |<---->| in legacy_set_geometry()
469 * +---+----------+-+----------+-+----------+-+----------+-+ in legacy_set_geometry()
471 * +---+----------+-+----------+-+----------+-+----------+-+ in legacy_set_geometry()
473 * The position of block mark moves forward in the ECC-based view in legacy_set_geometry()
476 * E * G * (N - 1) in legacy_set_geometry()
477 * D = (---------------- + M) in legacy_set_geometry()
485 * E * G (O - M) C - M C - M in legacy_set_geometry()
486 * ----------- <= ------- <= -------- < --------- in legacy_set_geometry()
487 * 8 N N (N - 1) in legacy_set_geometry()
491 * E * G * (N - 1) in legacy_set_geometry()
492 * D = (---------------- + M) < C in legacy_set_geometry()
496 * within the ECC-based view of the page is still in the data chunk, in legacy_set_geometry()
500 * physical block mark within the ECC-based view of the page: in legacy_set_geometry()
501 * (page_size - D) * 8 in legacy_set_geometry()
503 * --Huang Shijie in legacy_set_geometry()
505 block_mark_bit_offset = mtd->writesize * 8 - in legacy_set_geometry()
506 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) in legacy_set_geometry()
507 + geo->metadata_size * 8); in legacy_set_geometry()
509 geo->block_mark_byte_offset = block_mark_bit_offset / 8; in legacy_set_geometry()
510 geo->block_mark_bit_offset = block_mark_bit_offset % 8; in legacy_set_geometry()
516 struct nand_chip *chip = &this->nand; in common_nfc_set_geometry()
518 nanddev_get_ecc_requirements(&chip->base); in common_nfc_set_geometry()
520 if (chip->ecc.strength > 0 && chip->ecc.size > 0) in common_nfc_set_geometry()
521 return set_geometry_by_ecc_info(this, chip->ecc.strength, in common_nfc_set_geometry()
522 chip->ecc.size); in common_nfc_set_geometry()
524 if ((of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc")) in common_nfc_set_geometry()
526 if (!(requirements->strength > 0 && requirements->step_size > 0)) in common_nfc_set_geometry()
527 return -EINVAL; in common_nfc_set_geometry()
530 requirements->strength, in common_nfc_set_geometry()
531 requirements->step_size); in common_nfc_set_geometry()
540 struct resources *r = &this->resources; in bch_set_geometry()
547 ret = pm_runtime_get_sync(this->dev); in bch_set_geometry()
549 pm_runtime_put_autosuspend(this->dev); in bch_set_geometry()
558 ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MXS(this)); in bch_set_geometry()
563 writel(0, r->bch_regs + HW_BCH_LAYOUTSELECT); in bch_set_geometry()
567 pm_runtime_mark_last_busy(this->dev); in bch_set_geometry()
568 pm_runtime_put_autosuspend(this->dev); in bch_set_geometry()
574 * <1> Firstly, we should know what's the GPMI-clock means.
575 * The GPMI-clock is the internal clock in the gpmi nand controller.
576 * If you set 100MHz to gpmi nand controller, the GPMI-clock's period
577 * is 10ns. Mark the GPMI-clock's period as GPMI-clock-period.
580 * The frequency on the nand chip pins is derived from the GPMI-clock.
595 * read data is valid for some time after read strobe.
599 * |<---tREA---->|
602 * |<--tRP-->| |
607 * /---------\
608 * Read Data --------------< >---------
609 * \---------/
611 * |<-D->|
621 * Delay = (tREA + C - tRP) {1}
623 * tREA : the maximum read access time.
626 * tRP = (GPMI-clock-period) * DATA_SETUP
632 * if (GPMI-clock-period > DLL_THRETHOLD)
633 * RP = GPMI-clock-period / 2;
635 * RP = GPMI-clock-period;
637 * Set the HW_GPMI_CTRL1:HALF_PERIOD if GPMI-clock-period
643 * (tREA + 4000 - tRP) * 8
644 * RDN_DELAY = ----------------------- {3}
650 struct gpmi_nfc_hardware_timing *hw = &this->hw; in gpmi_nfc_compute_timings() local
651 unsigned int dll_threshold_ps = this->devdata->max_chain_delay; in gpmi_nfc_compute_timings()
660 if (sdr->tRC_min >= 30000) { in gpmi_nfc_compute_timings()
661 /* ONFI non-EDO modes [0-3] */ in gpmi_nfc_compute_timings()
662 hw->clk_rate = 22000000; in gpmi_nfc_compute_timings()
664 } else if (sdr->tRC_min >= 25000) { in gpmi_nfc_compute_timings()
666 hw->clk_rate = 80000000; in gpmi_nfc_compute_timings()
670 hw->clk_rate = 100000000; in gpmi_nfc_compute_timings()
675 period_ps = div_u64((u64)NSEC_PER_SEC * 1000, hw->clk_rate); in gpmi_nfc_compute_timings()
677 addr_setup_cycles = TO_CYCLES(sdr->tALS_min, period_ps); in gpmi_nfc_compute_timings()
678 data_setup_cycles = TO_CYCLES(sdr->tDS_min, period_ps); in gpmi_nfc_compute_timings()
679 data_hold_cycles = TO_CYCLES(sdr->tDH_min, period_ps); in gpmi_nfc_compute_timings()
680 busy_timeout_cycles = TO_CYCLES(sdr->tWB_max + sdr->tR_max, period_ps); in gpmi_nfc_compute_timings()
682 hw->timing0 = BF_GPMI_TIMING0_ADDRESS_SETUP(addr_setup_cycles) | in gpmi_nfc_compute_timings()
685 hw->timing1 = BF_GPMI_TIMING1_BUSY_TIMEOUT(busy_timeout_cycles * 4096); in gpmi_nfc_compute_timings()
690 * (tREA + 4000 - tRP) * 8 in gpmi_nfc_compute_timings()
691 * RDN_DELAY = ----------------------- in gpmi_nfc_compute_timings()
703 sample_delay_ps = (sdr->tREA_max + 4000 - tRP_ps) * 8; in gpmi_nfc_compute_timings()
709 hw->ctrl1n = BF_GPMI_CTRL1_WRN_DLY_SEL(wrn_dly_sel); in gpmi_nfc_compute_timings()
711 hw->ctrl1n |= BF_GPMI_CTRL1_RDN_DELAY(sample_delay_factor) | in gpmi_nfc_compute_timings()
718 struct gpmi_nfc_hardware_timing *hw = &this->hw; in gpmi_nfc_apply_timings() local
719 struct resources *r = &this->resources; in gpmi_nfc_apply_timings()
720 void __iomem *gpmi_regs = r->gpmi_regs; in gpmi_nfc_apply_timings()
723 clk_set_rate(r->clock[0], hw->clk_rate); in gpmi_nfc_apply_timings()
725 writel(hw->timing0, gpmi_regs + HW_GPMI_TIMING0); in gpmi_nfc_apply_timings()
726 writel(hw->timing1, gpmi_regs + HW_GPMI_TIMING1); in gpmi_nfc_apply_timings()
733 writel(hw->ctrl1n, gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_nfc_apply_timings()
736 dll_wait_time_us = USEC_PER_SEC / hw->clk_rate * 64; in gpmi_nfc_apply_timings()
740 /* Wait for the DLL to settle. */ in gpmi_nfc_apply_timings()
756 if (sdr->tRC_min <= 25000 && !GPMI_IS_MX6(this)) in gpmi_setup_interface()
757 return -ENOTSUPP; in gpmi_setup_interface()
766 this->hw.must_apply_timings = true; in gpmi_setup_interface()
774 struct resources *r = &this->resources; in gpmi_clear_bch()
775 writel(BM_BCH_CTRL_COMPLETE_IRQ, r->bch_regs + HW_BCH_CTRL_CLR); in gpmi_clear_bch()
781 return this->dma_chans[0]; in get_dma_chan()
788 struct completion *dma_c = &this->dma_done; in dma_irq_callback()
798 complete(&this->bch_done); in bch_irq()
808 if (this->bch) in gpmi_raw_len_to_len()
809 return ALIGN_DOWN(raw_len, this->bch_geometry.ecc_chunk_size); in gpmi_raw_len_to_len()
825 ret = dma_map_sg(this->dev, sgl, 1, dr); in prepare_data_dma()
834 sg_init_one(sgl, this->data_buffer_dma, len); in prepare_data_dma()
836 if (dr == DMA_TO_DEVICE && buf != this->data_buffer_dma) in prepare_data_dma()
837 memcpy(this->data_buffer_dma, buf, len); in prepare_data_dma()
839 dma_map_sg(this->dev, sgl, 1, dr); in prepare_data_dma()
862 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ooblayout_ecc()
865 return -ERANGE; in gpmi_ooblayout_ecc()
867 oobregion->offset = 0; in gpmi_ooblayout_ecc()
868 oobregion->length = geo->page_size - mtd->writesize; in gpmi_ooblayout_ecc()
878 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ooblayout_free()
881 return -ERANGE; in gpmi_ooblayout_free()
884 if (geo->page_size < mtd->writesize + mtd->oobsize) { in gpmi_ooblayout_free()
885 oobregion->offset = geo->page_size - mtd->writesize; in gpmi_ooblayout_free()
886 oobregion->length = mtd->oobsize - oobregion->offset; in gpmi_ooblayout_free()
952 struct platform_device *pdev = this->pdev; in acquire_register_block()
953 struct resources *res = &this->resources; in acquire_register_block()
958 p = devm_ioremap_resource(&pdev->dev, r); in acquire_register_block()
963 res->gpmi_regs = p; in acquire_register_block()
965 res->bch_regs = p; in acquire_register_block()
967 dev_err(this->dev, "unknown resource name : %s\n", res_name); in acquire_register_block()
974 struct platform_device *pdev = this->pdev; in acquire_bch_irq()
981 dev_err(this->dev, "Can't get resource for %s\n", res_name); in acquire_bch_irq()
982 return -ENODEV; in acquire_bch_irq()
985 err = devm_request_irq(this->dev, r->start, irq_h, 0, res_name, this); in acquire_bch_irq()
987 dev_err(this->dev, "error requesting BCH IRQ\n"); in acquire_bch_irq()
996 if (this->dma_chans[i]) { in release_dma_channels()
997 dma_release_channel(this->dma_chans[i]); in release_dma_channels()
998 this->dma_chans[i] = NULL; in release_dma_channels()
1004 struct platform_device *pdev = this->pdev; in acquire_dma_channels()
1009 dma_chan = dma_request_chan(&pdev->dev, "rx-tx"); in acquire_dma_channels()
1011 ret = dev_err_probe(this->dev, PTR_ERR(dma_chan), in acquire_dma_channels()
1015 this->dma_chans[0] = dma_chan; in acquire_dma_channels()
1023 struct resources *r = &this->resources; in gpmi_get_clks()
1027 for (i = 0; i < this->devdata->clks_count; i++) { in gpmi_get_clks()
1028 clk = devm_clk_get(this->dev, this->devdata->clks[i]); in gpmi_get_clks()
1034 r->clock[i] = clk; in gpmi_get_clks()
1044 clk_set_rate(r->clock[0], 22000000); in gpmi_get_clks()
1049 dev_dbg(this->dev, "failed in finding the clocks.\n"); in gpmi_get_clks()
1091 struct device *dev = this->dev; in gpmi_free_dma_buffer()
1092 struct bch_geometry *geo = &this->bch_geometry; in gpmi_free_dma_buffer()
1094 if (this->auxiliary_virt && virt_addr_valid(this->auxiliary_virt)) in gpmi_free_dma_buffer()
1095 dma_free_coherent(dev, geo->auxiliary_size, in gpmi_free_dma_buffer()
1096 this->auxiliary_virt, in gpmi_free_dma_buffer()
1097 this->auxiliary_phys); in gpmi_free_dma_buffer()
1098 kfree(this->data_buffer_dma); in gpmi_free_dma_buffer()
1099 kfree(this->raw_buffer); in gpmi_free_dma_buffer()
1101 this->data_buffer_dma = NULL; in gpmi_free_dma_buffer()
1102 this->raw_buffer = NULL; in gpmi_free_dma_buffer()
1108 struct bch_geometry *geo = &this->bch_geometry; in gpmi_alloc_dma_buffer()
1109 struct device *dev = this->dev; in gpmi_alloc_dma_buffer()
1110 struct mtd_info *mtd = nand_to_mtd(&this->nand); in gpmi_alloc_dma_buffer()
1120 this->data_buffer_dma = kzalloc(mtd->writesize ?: PAGE_SIZE, in gpmi_alloc_dma_buffer()
1122 if (this->data_buffer_dma == NULL) in gpmi_alloc_dma_buffer()
1125 this->auxiliary_virt = dma_alloc_coherent(dev, geo->auxiliary_size, in gpmi_alloc_dma_buffer()
1126 &this->auxiliary_phys, GFP_DMA); in gpmi_alloc_dma_buffer()
1127 if (!this->auxiliary_virt) in gpmi_alloc_dma_buffer()
1130 this->raw_buffer = kzalloc((mtd->writesize ?: PAGE_SIZE) + mtd->oobsize, GFP_KERNEL); in gpmi_alloc_dma_buffer()
1131 if (!this->raw_buffer) in gpmi_alloc_dma_buffer()
1138 return -ENOMEM; in gpmi_alloc_dma_buffer()
1149 struct bch_geometry *nfc_geo = &this->bch_geometry; in block_mark_swapping()
1157 if (!this->swap_block_mark) in block_mark_swapping()
1164 bit = nfc_geo->block_mark_bit_offset; in block_mark_swapping()
1165 p = payload + nfc_geo->block_mark_byte_offset; in block_mark_swapping()
1174 from_data = (p[0] >> bit) | (p[1] << (8 - bit)); in block_mark_swapping()
1182 mask = (0x1 << bit) - 1; in block_mark_swapping()
1186 p[1] = (p[1] & mask) | (from_oob >> (8 - bit)); in block_mark_swapping()
1193 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_count_bitflips()
1200 status = this->auxiliary_virt + ALIGN(meta, 4); in gpmi_count_bitflips()
1207 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; in gpmi_count_bitflips()
1208 u8 *eccbuf = this->raw_buffer; in gpmi_count_bitflips()
1214 offset = nfc_geo->metadata_size * 8; in gpmi_count_bitflips()
1215 offset += ((8 * nfc_geo->ecc_chunk_size) + eccbits) * (i + 1); in gpmi_count_bitflips()
1216 offset -= eccbits; in gpmi_count_bitflips()
1220 eccbytes -= offset; in gpmi_count_bitflips()
1226 * in-band data in the first and last byte of in gpmi_count_bitflips()
1227 * eccbuf. Set non-eccbits to one so that in gpmi_count_bitflips()
1232 eccbuf[0] |= GENMASK(bitoffset - 1, 0); in gpmi_count_bitflips()
1236 eccbuf[eccbytes - 1] |= GENMASK(7, bitoffset); in gpmi_count_bitflips()
1252 buf + i * nfc_geo->ecc_chunk_size, in gpmi_count_bitflips()
1253 nfc_geo->ecc_chunk_size, in gpmi_count_bitflips()
1255 this->auxiliary_virt, in gpmi_count_bitflips()
1256 nfc_geo->metadata_size, in gpmi_count_bitflips()
1257 nfc_geo->ecc_strength); in gpmi_count_bitflips()
1260 buf + i * nfc_geo->ecc_chunk_size, in gpmi_count_bitflips()
1261 nfc_geo->ecc_chunk_size, in gpmi_count_bitflips()
1264 nfc_geo->ecc_strength); in gpmi_count_bitflips()
1270 mtd->ecc_stats.corrected += flips; in gpmi_count_bitflips()
1274 mtd->ecc_stats.failed++; in gpmi_count_bitflips()
1278 mtd->ecc_stats.corrected += *status; in gpmi_count_bitflips()
1287 struct bch_geometry *geo = &this->bch_geometry; in gpmi_bch_layout_std()
1288 unsigned int ecc_strength = geo->ecc_strength >> 1; in gpmi_bch_layout_std()
1289 unsigned int gf_len = geo->gf_len; in gpmi_bch_layout_std()
1290 unsigned int block_size = geo->ecc_chunk_size; in gpmi_bch_layout_std()
1292 this->bch_flashlayout0 = in gpmi_bch_layout_std()
1293 BF_BCH_FLASH0LAYOUT0_NBLOCKS(geo->ecc_chunk_count - 1) | in gpmi_bch_layout_std()
1294 BF_BCH_FLASH0LAYOUT0_META_SIZE(geo->metadata_size) | in gpmi_bch_layout_std()
1299 this->bch_flashlayout1 = in gpmi_bch_layout_std()
1300 BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(geo->page_size) | in gpmi_bch_layout_std()
1311 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ecc_read_page()
1316 this->bch = true; in gpmi_ecc_read_page()
1318 ret = nand_read_page_op(chip, page, 0, buf, geo->page_size); in gpmi_ecc_read_page()
1323 geo->ecc_chunk_count, in gpmi_ecc_read_page()
1324 geo->auxiliary_status_offset); in gpmi_ecc_read_page()
1327 block_mark_swapping(this, buf, this->auxiliary_virt); in gpmi_ecc_read_page()
1331 * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob() in gpmi_ecc_read_page()
1340 memset(chip->oob_poi, ~0, mtd->oobsize); in gpmi_ecc_read_page()
1341 chip->oob_poi[0] = ((uint8_t *)this->auxiliary_virt)[0]; in gpmi_ecc_read_page()
1352 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ecc_read_subpage()
1353 int size = chip->ecc.size; /* ECC chunk size */ in gpmi_ecc_read_subpage()
1363 ecc_parity_size = geo->gf_len * geo->ecc_strength / 8; in gpmi_ecc_read_subpage()
1367 last = (offs + len - 1) / size; in gpmi_ecc_read_subpage()
1369 if (this->swap_block_mark) { in gpmi_ecc_read_subpage()
1377 marker_pos = geo->block_mark_byte_offset / size; in gpmi_ecc_read_subpage()
1379 dev_dbg(this->dev, in gpmi_ecc_read_subpage()
1386 meta = geo->metadata_size; in gpmi_ecc_read_subpage()
1393 ecc_parity_size = geo->gf_len * geo->ecc_strength / 8; in gpmi_ecc_read_subpage()
1395 n = last - first + 1; in gpmi_ecc_read_subpage()
1397 ecc_strength = geo->ecc_strength >> 1; in gpmi_ecc_read_subpage()
1399 this->bch_flashlayout0 = BF_BCH_FLASH0LAYOUT0_NBLOCKS(n - 1) | in gpmi_ecc_read_subpage()
1402 BF_BCH_FLASH0LAYOUT0_GF(geo->gf_len, this) | in gpmi_ecc_read_subpage()
1403 BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(geo->ecc_chunk_size, this); in gpmi_ecc_read_subpage()
1405 this->bch_flashlayout1 = BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size) | in gpmi_ecc_read_subpage()
1407 BF_BCH_FLASH0LAYOUT1_GF(geo->gf_len, this) | in gpmi_ecc_read_subpage()
1408 BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(geo->ecc_chunk_size, this); in gpmi_ecc_read_subpage()
1410 this->bch = true; in gpmi_ecc_read_subpage()
1416 dev_dbg(this->dev, "page:%d(%d:%d)%d, chunk:(%d:%d), BCH PG size:%d\n", in gpmi_ecc_read_subpage()
1429 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_ecc_write_page()
1432 dev_dbg(this->dev, "ecc write page.\n"); in gpmi_ecc_write_page()
1435 this->bch = true; in gpmi_ecc_write_page()
1437 memcpy(this->auxiliary_virt, chip->oob_poi, nfc_geo->auxiliary_size); in gpmi_ecc_write_page()
1439 if (this->swap_block_mark) { in gpmi_ecc_write_page()
1444 memcpy(this->data_buffer_dma, buf, mtd->writesize); in gpmi_ecc_write_page()
1445 buf = this->data_buffer_dma; in gpmi_ecc_write_page()
1446 block_mark_swapping(this, this->data_buffer_dma, in gpmi_ecc_write_page()
1447 this->auxiliary_virt); in gpmi_ecc_write_page()
1450 ret = nand_prog_page_op(chip, page, 0, buf, nfc_geo->page_size); in gpmi_ecc_write_page()
1469 * 3) ECC-based read operations return an OOB full of set bits (since we never
1470 * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads
1481 * 1) Are we doing a "raw" read, or an ECC-based read?
1487 * | Raw | ECC-based |
1488 * -------------+-------------------------+-------------------------+
1494 * -------------+-------------------------+ return it in a buffer |
1502 * -------------+-------------------------+-------------------------+
1509 * It turns out that knowing whether we want an "ECC-based" or "raw" read is not
1512 * ECC-based or raw view of the page is implicit in which function it calls
1513 * (there is a similar pair of ECC-based/raw functions for writing).
1522 memset(chip->oob_poi, ~0, mtd->oobsize); in gpmi_ecc_read_oob()
1525 ret = nand_read_page_op(chip, page, mtd->writesize, chip->oob_poi, in gpmi_ecc_read_oob()
1526 mtd->oobsize); in gpmi_ecc_read_oob()
1532 * non-transcribing case (!GPMI_IS_MX23()), we already have it. in gpmi_ecc_read_oob()
1537 ret = nand_read_page_op(chip, page, 0, chip->oob_poi, 1); in gpmi_ecc_read_oob()
1553 return -EPERM; in gpmi_ecc_write_oob()
1556 return -EPERM; in gpmi_ecc_write_oob()
1558 return nand_prog_page_op(chip, page, mtd->writesize + of.offset, in gpmi_ecc_write_oob()
1559 chip->oob_poi + of.offset, of.length); in gpmi_ecc_write_oob()
1563 * This function reads a NAND page without involving the ECC engine (no HW
1579 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_ecc_read_page_raw()
1580 int eccsize = nfc_geo->ecc_chunk_size; in gpmi_ecc_read_page_raw()
1581 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; in gpmi_ecc_read_page_raw()
1582 u8 *tmp_buf = this->raw_buffer; in gpmi_ecc_read_page_raw()
1586 uint8_t *oob = chip->oob_poi; in gpmi_ecc_read_page_raw()
1591 mtd->writesize + mtd->oobsize); in gpmi_ecc_read_page_raw()
1602 if (this->swap_block_mark) in gpmi_ecc_read_page_raw()
1603 swap(tmp_buf[0], tmp_buf[mtd->writesize]); in gpmi_ecc_read_page_raw()
1610 memcpy(oob, tmp_buf, nfc_geo->metadata_size); in gpmi_ecc_read_page_raw()
1612 oob_bit_off = nfc_geo->metadata_size * 8; in gpmi_ecc_read_page_raw()
1616 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) { in gpmi_ecc_read_page_raw()
1623 if (step == nfc_geo->ecc_chunk_count - 1 && in gpmi_ecc_read_page_raw()
1625 eccbits += 8 - ((oob_bit_off + eccbits) % 8); in gpmi_ecc_read_page_raw()
1638 if (oob_byte_off < mtd->oobsize) in gpmi_ecc_read_page_raw()
1640 tmp_buf + mtd->writesize + oob_byte_off, in gpmi_ecc_read_page_raw()
1641 mtd->oobsize - oob_byte_off); in gpmi_ecc_read_page_raw()
1648 * This function writes a NAND page without involving the ECC engine (no HW
1664 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_ecc_write_page_raw()
1665 int eccsize = nfc_geo->ecc_chunk_size; in gpmi_ecc_write_page_raw()
1666 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; in gpmi_ecc_write_page_raw()
1667 u8 *tmp_buf = this->raw_buffer; in gpmi_ecc_write_page_raw()
1668 uint8_t *oob = chip->oob_poi; in gpmi_ecc_write_page_raw()
1680 memset(tmp_buf, 0xff, mtd->writesize + mtd->oobsize); in gpmi_ecc_write_page_raw()
1686 memcpy(tmp_buf, oob, nfc_geo->metadata_size); in gpmi_ecc_write_page_raw()
1687 oob_bit_off = nfc_geo->metadata_size * 8; in gpmi_ecc_write_page_raw()
1691 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) { in gpmi_ecc_write_page_raw()
1698 if (step == nfc_geo->ecc_chunk_count - 1 && in gpmi_ecc_write_page_raw()
1700 eccbits += 8 - ((oob_bit_off + eccbits) % 8); in gpmi_ecc_write_page_raw()
1712 if (oob_required && oob_byte_off < mtd->oobsize) in gpmi_ecc_write_page_raw()
1713 memcpy(tmp_buf + mtd->writesize + oob_byte_off, in gpmi_ecc_write_page_raw()
1714 oob + oob_byte_off, mtd->oobsize - oob_byte_off); in gpmi_ecc_write_page_raw()
1723 if (this->swap_block_mark) in gpmi_ecc_write_page_raw()
1724 swap(tmp_buf[0], tmp_buf[mtd->writesize]); in gpmi_ecc_write_page_raw()
1727 mtd->writesize + mtd->oobsize); in gpmi_ecc_write_page_raw()
1748 chipnr = (int)(ofs >> chip->chip_shift); in gpmi_block_markbad()
1751 column = !GPMI_IS_MX23(this) ? mtd->writesize : 0; in gpmi_block_markbad()
1754 block_mark = this->data_buffer_dma; in gpmi_block_markbad()
1758 page = (int)(ofs >> chip->page_shift); in gpmi_block_markbad()
1769 struct boot_rom_geometry *geometry = &this->rom_geometry; in nand_boot_set_geometry()
1779 geometry->stride_size_in_pages = 64; in nand_boot_set_geometry()
1789 geometry->search_area_stride_exponent = 2; in nand_boot_set_geometry()
1796 struct boot_rom_geometry *rom_geo = &this->rom_geometry; in mx23_check_transcription_stamp()
1797 struct device *dev = this->dev; in mx23_check_transcription_stamp()
1798 struct nand_chip *chip = &this->nand; in mx23_check_transcription_stamp()
1807 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; in mx23_check_transcription_stamp()
1818 page = stride * rom_geo->stride_size_in_pages; in mx23_check_transcription_stamp()
1851 struct device *dev = this->dev; in mx23_write_transcription_stamp()
1852 struct boot_rom_geometry *rom_geo = &this->rom_geometry; in mx23_write_transcription_stamp()
1853 struct nand_chip *chip = &this->nand; in mx23_write_transcription_stamp()
1866 block_size_in_pages = mtd->erasesize / mtd->writesize; in mx23_write_transcription_stamp()
1867 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; in mx23_write_transcription_stamp()
1869 rom_geo->stride_size_in_pages; in mx23_write_transcription_stamp()
1871 (search_area_size_in_pages + (block_size_in_pages - 1)) / in mx23_write_transcription_stamp()
1893 memset(buffer, ~0, mtd->writesize); in mx23_write_transcription_stamp()
1900 page = stride * rom_geo->stride_size_in_pages; in mx23_write_transcription_stamp()
1905 status = chip->ecc.write_page_raw(chip, buffer, 0, page); in mx23_write_transcription_stamp()
1917 struct device *dev = this->dev; in mx23_boot_init()
1918 struct nand_chip *chip = &this->nand; in mx23_boot_init()
1932 * anything -- the block marks are already transcribed. in mx23_boot_init()
1944 block_count = nanddev_eraseblocks_per_target(&chip->base); in mx23_boot_init()
1955 chipnr = block >> (chip->chip_shift - chip->phys_erase_shift); in mx23_boot_init()
1956 page = block << (chip->phys_erase_shift - chip->page_shift); in mx23_boot_init()
1957 byte = block << chip->phys_erase_shift; in mx23_boot_init()
1961 ret = nand_read_page_op(chip, page, mtd->writesize, &block_mark, in mx23_boot_init()
1970 * again, but this time the result will be a mark in the in mx23_boot_init()
1975 ret = chip->legacy.block_markbad(chip, byte); in mx23_boot_init()
1992 /* This is ROM arch-specific initilization before the BBT scanning. */ in nand_boot_init()
2008 dev_err(this->dev, "Error setting BCH geometry : %d\n", ret); in gpmi_set_geometry()
2018 struct nand_chip *chip = &this->nand; in gpmi_init_last()
2020 struct nand_ecc_ctrl *ecc = &chip->ecc; in gpmi_init_last()
2021 struct bch_geometry *bch_geo = &this->bch_geometry; in gpmi_init_last()
2030 ecc->read_page = gpmi_ecc_read_page; in gpmi_init_last()
2031 ecc->write_page = gpmi_ecc_write_page; in gpmi_init_last()
2032 ecc->read_oob = gpmi_ecc_read_oob; in gpmi_init_last()
2033 ecc->write_oob = gpmi_ecc_write_oob; in gpmi_init_last()
2034 ecc->read_page_raw = gpmi_ecc_read_page_raw; in gpmi_init_last()
2035 ecc->write_page_raw = gpmi_ecc_write_page_raw; in gpmi_init_last()
2036 ecc->read_oob_raw = gpmi_ecc_read_oob_raw; in gpmi_init_last()
2037 ecc->write_oob_raw = gpmi_ecc_write_oob_raw; in gpmi_init_last()
2038 ecc->engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST; in gpmi_init_last()
2039 ecc->size = bch_geo->ecc_chunk_size; in gpmi_init_last()
2040 ecc->strength = bch_geo->ecc_strength; in gpmi_init_last()
2049 ((bch_geo->gf_len * bch_geo->ecc_strength) % 8) == 0) { in gpmi_init_last()
2050 ecc->read_subpage = gpmi_ecc_read_subpage; in gpmi_init_last()
2051 chip->options |= NAND_SUBPAGE_READ; in gpmi_init_last()
2062 if (chip->bbt_options & NAND_BBT_USE_FLASH) { in gpmi_nand_attach_chip()
2063 chip->bbt_options |= NAND_BBT_NO_OOB; in gpmi_nand_attach_chip()
2065 if (of_property_read_bool(this->dev->of_node, in gpmi_nand_attach_chip()
2066 "fsl,no-blockmark-swap")) in gpmi_nand_attach_chip()
2067 this->swap_block_mark = false; in gpmi_nand_attach_chip()
2069 dev_dbg(this->dev, "Blockmark swapping %sabled\n", in gpmi_nand_attach_chip()
2070 this->swap_block_mark ? "en" : "dis"); in gpmi_nand_attach_chip()
2076 chip->options |= NAND_SKIP_BBTSCAN; in gpmi_nand_attach_chip()
2083 struct gpmi_transfer *transfer = &this->transfers[this->ntransfers]; in get_next_transfer()
2085 this->ntransfers++; in get_next_transfer()
2087 if (this->ntransfers == GPMI_MAX_TRANSFERS) in get_next_transfer()
2099 int chip = this->nand.cur_cs; in gpmi_chain_command()
2121 transfer->cmdbuf[0] = cmd; in gpmi_chain_command()
2123 memcpy(&transfer->cmdbuf[1], addr, naddr); in gpmi_chain_command()
2125 sg_init_one(&transfer->sgl, transfer->cmdbuf, naddr + 1); in gpmi_chain_command()
2126 dma_map_sg(this->dev, &transfer->sgl, 1, DMA_TO_DEVICE); in gpmi_chain_command()
2128 transfer->direction = DMA_TO_DEVICE; in gpmi_chain_command()
2130 desc = dmaengine_prep_slave_sg(channel, &transfer->sgl, 1, DMA_MEM_TO_DEV, in gpmi_chain_command()
2143 | BF_GPMI_CTRL0_CS(this->nand.cur_cs, this) in gpmi_chain_wait_ready()
2165 transfer->direction = DMA_FROM_DEVICE; in gpmi_chain_data_read()
2167 *direct = prepare_data_dma(this, buf, raw_len, &transfer->sgl, in gpmi_chain_data_read()
2172 | BF_GPMI_CTRL0_CS(this->nand.cur_cs, this) in gpmi_chain_data_read()
2177 if (this->bch) { in gpmi_chain_data_read()
2183 pio[4] = transfer->sgl.dma_address; in gpmi_chain_data_read()
2184 pio[5] = this->auxiliary_phys; in gpmi_chain_data_read()
2192 if (!this->bch) in gpmi_chain_data_read()
2193 desc = dmaengine_prep_slave_sg(channel, &transfer->sgl, 1, in gpmi_chain_data_read()
2212 transfer->direction = DMA_TO_DEVICE; in gpmi_chain_data_write()
2214 prepare_data_dma(this, buf, raw_len, &transfer->sgl, DMA_TO_DEVICE); in gpmi_chain_data_write()
2218 | BF_GPMI_CTRL0_CS(this->nand.cur_cs, this) in gpmi_chain_data_write()
2223 if (this->bch) { in gpmi_chain_data_write()
2229 pio[4] = transfer->sgl.dma_address; in gpmi_chain_data_write()
2230 pio[5] = this->auxiliary_phys; in gpmi_chain_data_write()
2235 (this->bch ? MXS_DMA_CTRL_WAIT4END : 0)); in gpmi_chain_data_write()
2239 if (!this->bch) in gpmi_chain_data_write()
2240 desc = dmaengine_prep_slave_sg(channel, &transfer->sgl, 1, in gpmi_chain_data_write()
2265 this->ntransfers = 0; in gpmi_nfc_exec_op()
2267 this->transfers[i].direction = DMA_NONE; in gpmi_nfc_exec_op()
2269 ret = pm_runtime_get_sync(this->dev); in gpmi_nfc_exec_op()
2271 pm_runtime_put_noidle(this->dev); in gpmi_nfc_exec_op()
2278 * controller side, they will not change anymore. When the time will in gpmi_nfc_exec_op()
2281 if (this->hw.must_apply_timings) { in gpmi_nfc_exec_op()
2282 this->hw.must_apply_timings = false; in gpmi_nfc_exec_op()
2286 dev_dbg(this->dev, "%s: %d instructions\n", __func__, op->ninstrs); in gpmi_nfc_exec_op()
2288 for (i = 0; i < op->ninstrs; i++) { in gpmi_nfc_exec_op()
2289 instr = &op->instrs[i]; in gpmi_nfc_exec_op()
2293 switch (instr->type) { in gpmi_nfc_exec_op()
2298 cmd = instr->ctx.cmd.opcode; in gpmi_nfc_exec_op()
2304 if (i + 1 != op->ninstrs && in gpmi_nfc_exec_op()
2305 op->instrs[i + 1].type == NAND_OP_ADDR_INSTR) in gpmi_nfc_exec_op()
2312 desc = gpmi_chain_command(this, cmd, instr->ctx.addr.addrs, in gpmi_nfc_exec_op()
2313 instr->ctx.addr.naddrs); in gpmi_nfc_exec_op()
2316 buf_write = instr->ctx.data.buf.out; in gpmi_nfc_exec_op()
2317 buf_len = instr->ctx.data.len; in gpmi_nfc_exec_op()
2324 if (!instr->ctx.data.len) in gpmi_nfc_exec_op()
2326 buf_read = instr->ctx.data.buf.in; in gpmi_nfc_exec_op()
2327 buf_len = instr->ctx.data.len; in gpmi_nfc_exec_op()
2336 ret = -ENXIO; in gpmi_nfc_exec_op()
2341 dev_dbg(this->dev, "%s setup done\n", __func__); in gpmi_nfc_exec_op()
2344 dev_err(this->dev, "Multiple data instructions not supported\n"); in gpmi_nfc_exec_op()
2345 ret = -EINVAL; in gpmi_nfc_exec_op()
2349 if (this->bch) { in gpmi_nfc_exec_op()
2350 writel(this->bch_flashlayout0, in gpmi_nfc_exec_op()
2351 this->resources.bch_regs + HW_BCH_FLASH0LAYOUT0); in gpmi_nfc_exec_op()
2352 writel(this->bch_flashlayout1, in gpmi_nfc_exec_op()
2353 this->resources.bch_regs + HW_BCH_FLASH0LAYOUT1); in gpmi_nfc_exec_op()
2356 desc->callback = dma_irq_callback; in gpmi_nfc_exec_op()
2357 desc->callback_param = this; in gpmi_nfc_exec_op()
2358 dma_completion = &this->dma_done; in gpmi_nfc_exec_op()
2363 if (this->bch && buf_read) { in gpmi_nfc_exec_op()
2365 this->resources.bch_regs + HW_BCH_CTRL_SET); in gpmi_nfc_exec_op()
2366 bch_completion = &this->bch_done; in gpmi_nfc_exec_op()
2375 dev_err(this->dev, "DMA timeout, last DMA\n"); in gpmi_nfc_exec_op()
2377 ret = -ETIMEDOUT; in gpmi_nfc_exec_op()
2381 if (this->bch && buf_read) { in gpmi_nfc_exec_op()
2384 dev_err(this->dev, "BCH timeout, last DMA\n"); in gpmi_nfc_exec_op()
2386 ret = -ETIMEDOUT; in gpmi_nfc_exec_op()
2392 this->resources.bch_regs + HW_BCH_CTRL_CLR); in gpmi_nfc_exec_op()
2398 for (i = 0; i < this->ntransfers; i++) { in gpmi_nfc_exec_op()
2399 struct gpmi_transfer *transfer = &this->transfers[i]; in gpmi_nfc_exec_op()
2401 if (transfer->direction != DMA_NONE) in gpmi_nfc_exec_op()
2402 dma_unmap_sg(this->dev, &transfer->sgl, 1, in gpmi_nfc_exec_op()
2403 transfer->direction); in gpmi_nfc_exec_op()
2407 memcpy(buf_read, this->data_buffer_dma, in gpmi_nfc_exec_op()
2410 this->bch = false; in gpmi_nfc_exec_op()
2412 pm_runtime_mark_last_busy(this->dev); in gpmi_nfc_exec_op()
2413 pm_runtime_put_autosuspend(this->dev); in gpmi_nfc_exec_op()
2426 struct nand_chip *chip = &this->nand; in gpmi_nand_init()
2431 mtd->name = "gpmi-nand"; in gpmi_nand_init()
2432 mtd->dev.parent = this->dev; in gpmi_nand_init()
2434 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */ in gpmi_nand_init()
2436 nand_set_flash_node(chip, this->pdev->dev.of_node); in gpmi_nand_init()
2437 chip->legacy.block_markbad = gpmi_block_markbad; in gpmi_nand_init()
2438 chip->badblock_pattern = &gpmi_bbt_descr; in gpmi_nand_init()
2439 chip->options |= NAND_NO_SUBPAGE_WRITE; in gpmi_nand_init()
2442 this->swap_block_mark = !GPMI_IS_MX23(this); in gpmi_nand_init()
2448 this->bch_geometry.payload_size = 1024; in gpmi_nand_init()
2449 this->bch_geometry.auxiliary_size = 128; in gpmi_nand_init()
2454 nand_controller_init(&this->base); in gpmi_nand_init()
2455 this->base.ops = &gpmi_nand_controller_ops; in gpmi_nand_init()
2456 chip->controller = &this->base; in gpmi_nand_init()
2482 { .compatible = "fsl,imx23-gpmi-nand", .data = &gpmi_devdata_imx23, },
2483 { .compatible = "fsl,imx28-gpmi-nand", .data = &gpmi_devdata_imx28, },
2484 { .compatible = "fsl,imx6q-gpmi-nand", .data = &gpmi_devdata_imx6q, },
2485 { .compatible = "fsl,imx6sx-gpmi-nand", .data = &gpmi_devdata_imx6sx, },
2486 { .compatible = "fsl,imx7d-gpmi-nand", .data = &gpmi_devdata_imx7d,},
2496 this = devm_kzalloc(&pdev->dev, sizeof(*this), GFP_KERNEL); in gpmi_nand_probe()
2498 return -ENOMEM; in gpmi_nand_probe()
2500 this->devdata = of_device_get_match_data(&pdev->dev); in gpmi_nand_probe()
2502 this->pdev = pdev; in gpmi_nand_probe()
2503 this->dev = &pdev->dev; in gpmi_nand_probe()
2513 pm_runtime_set_autosuspend_delay(&pdev->dev, 500); in gpmi_nand_probe()
2514 pm_runtime_use_autosuspend(&pdev->dev); in gpmi_nand_probe()
2515 pm_runtime_set_active(&pdev->dev); in gpmi_nand_probe()
2516 pm_runtime_enable(&pdev->dev); in gpmi_nand_probe()
2517 pm_runtime_get_sync(&pdev->dev); in gpmi_nand_probe()
2527 pm_runtime_mark_last_busy(&pdev->dev); in gpmi_nand_probe()
2528 pm_runtime_put_autosuspend(&pdev->dev); in gpmi_nand_probe()
2530 dev_info(this->dev, "driver registered.\n"); in gpmi_nand_probe()
2535 pm_runtime_put(&pdev->dev); in gpmi_nand_probe()
2536 pm_runtime_disable(&pdev->dev); in gpmi_nand_probe()
2546 struct nand_chip *chip = &this->nand; in gpmi_nand_remove()
2549 pm_runtime_put_sync(&pdev->dev); in gpmi_nand_remove()
2550 pm_runtime_disable(&pdev->dev); in gpmi_nand_remove()
2578 /* re-init the GPMI registers */ in gpmi_pm_resume()
2581 dev_err(this->dev, "Error setting GPMI : %d\n", ret); in gpmi_pm_resume()
2586 if (this->hw.clk_rate) in gpmi_pm_resume()
2587 this->hw.must_apply_timings = true; in gpmi_pm_resume()
2589 /* re-init the BCH registers */ in gpmi_pm_resume()
2592 dev_err(this->dev, "Error setting BCH : %d\n", ret); in gpmi_pm_resume()
2621 .name = "gpmi-nand",