Lines Matching +full:sig +full:- +full:dir +full:- +full:dat0
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
5 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
9 * - JMicron (hardware and technical support)
19 #include <linux/dma-mapping.h>
33 #include <linux/mmc/slot-gpio.h>
40 pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
43 pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
73 SDHCI_DUMP("Wake-up: 0x%08x | Clock: 0x%08x\n", in sdhci_dumpregs()
79 SDHCI_DUMP("Int enab: 0x%08x | Sig enab: 0x%08x\n", in sdhci_dumpregs()
100 if (host->flags & SDHCI_USE_ADMA) { in sdhci_dumpregs()
101 if (host->flags & SDHCI_USE_64_BIT_DMA) { in sdhci_dumpregs()
113 if (host->ops->dump_vendor_regs) in sdhci_dumpregs()
114 host->ops->dump_vendor_regs(host); in sdhci_dumpregs()
144 host->v4_mode = true; in sdhci_enable_v4_mode()
151 return cmd->data || cmd->flags & MMC_RSP_BUSY; in sdhci_data_line_cmd()
158 if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) || in sdhci_set_card_detection()
159 !mmc_card_is_removable(host->mmc) || mmc_can_gpio_cd(host->mmc)) in sdhci_set_card_detection()
166 host->ier |= present ? SDHCI_INT_CARD_REMOVE : in sdhci_set_card_detection()
169 host->ier &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); in sdhci_set_card_detection()
172 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_card_detection()
173 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_card_detection()
188 if (host->bus_on) in sdhci_runtime_pm_bus_on()
190 host->bus_on = true; in sdhci_runtime_pm_bus_on()
191 pm_runtime_get_noresume(mmc_dev(host->mmc)); in sdhci_runtime_pm_bus_on()
196 if (!host->bus_on) in sdhci_runtime_pm_bus_off()
198 host->bus_on = false; in sdhci_runtime_pm_bus_off()
199 pm_runtime_put_noidle(mmc_dev(host->mmc)); in sdhci_runtime_pm_bus_off()
209 host->clock = 0; in sdhci_reset()
210 /* Reset-all turns off SD Bus Power */ in sdhci_reset()
211 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) in sdhci_reset()
226 mmc_hostname(host->mmc), (int)mask); in sdhci_reset()
237 if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) { in sdhci_do_reset()
238 struct mmc_host *mmc = host->mmc; in sdhci_do_reset()
240 if (!mmc->ops->get_cd(mmc)) in sdhci_do_reset()
244 host->ops->reset(host, mask); in sdhci_do_reset()
247 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_do_reset()
248 if (host->ops->enable_dma) in sdhci_do_reset()
249 host->ops->enable_dma(host); in sdhci_do_reset()
253 host->preset_enabled = false; in sdhci_do_reset()
259 host->ier = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | in sdhci_set_default_irqs()
265 if (host->tuning_mode == SDHCI_TUNING_MODE_2 || in sdhci_set_default_irqs()
266 host->tuning_mode == SDHCI_TUNING_MODE_3) in sdhci_set_default_irqs()
267 host->ier |= SDHCI_INT_RETUNE; in sdhci_set_default_irqs()
269 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_default_irqs()
270 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_default_irqs()
278 if (host->version < SDHCI_SPEC_200) in sdhci_config_dma()
289 if (!(host->flags & SDHCI_REQ_USE_DMA)) in sdhci_config_dma()
293 if (host->flags & SDHCI_USE_ADMA) in sdhci_config_dma()
296 if (host->flags & SDHCI_USE_64_BIT_DMA) { in sdhci_config_dma()
298 * If v4 mode, all supported DMA can be 64-bit addressing if in sdhci_config_dma()
299 * controller supports 64-bit system address, otherwise only in sdhci_config_dma()
300 * ADMA can support 64-bit addressing. in sdhci_config_dma()
302 if (host->v4_mode) { in sdhci_config_dma()
306 } else if (host->flags & SDHCI_USE_ADMA) { in sdhci_config_dma()
321 struct mmc_host *mmc = host->mmc; in sdhci_init()
329 if (host->v4_mode) in sdhci_init()
332 spin_lock_irqsave(&host->lock, flags); in sdhci_init()
334 spin_unlock_irqrestore(&host->lock, flags); in sdhci_init()
336 host->cqe_on = false; in sdhci_init()
340 host->clock = 0; in sdhci_init()
341 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_init()
347 u32 cd = host->ier & (SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); in sdhci_reinit()
358 if (cd != (host->ier & (SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT))) in sdhci_reinit()
359 mmc_detect_change(host->mmc, msecs_to_jiffies(200)); in sdhci_reinit()
366 if (host->quirks & SDHCI_QUIRK_NO_LED) in __sdhci_led_activate()
378 if (host->quirks & SDHCI_QUIRK_NO_LED) in __sdhci_led_deactivate()
393 spin_lock_irqsave(&host->lock, flags); in sdhci_led_control()
395 if (host->runtime_suspended) in sdhci_led_control()
403 spin_unlock_irqrestore(&host->lock, flags); in sdhci_led_control()
408 struct mmc_host *mmc = host->mmc; in sdhci_led_register()
410 if (host->quirks & SDHCI_QUIRK_NO_LED) in sdhci_led_register()
413 snprintf(host->led_name, sizeof(host->led_name), in sdhci_led_register()
416 host->led.name = host->led_name; in sdhci_led_register()
417 host->led.brightness = LED_OFF; in sdhci_led_register()
418 host->led.default_trigger = mmc_hostname(mmc); in sdhci_led_register()
419 host->led.brightness_set = sdhci_led_control; in sdhci_led_register()
421 return led_classdev_register(mmc_dev(mmc), &host->led); in sdhci_led_register()
426 if (host->quirks & SDHCI_QUIRK_NO_LED) in sdhci_led_unregister()
429 led_classdev_unregister(&host->led); in sdhci_led_unregister()
466 if (sdhci_data_line_cmd(mrq->cmd)) in sdhci_mod_timer()
467 mod_timer(&host->data_timer, timeout); in sdhci_mod_timer()
469 mod_timer(&host->timer, timeout); in sdhci_mod_timer()
474 if (sdhci_data_line_cmd(mrq->cmd)) in sdhci_del_timer()
475 del_timer(&host->data_timer); in sdhci_del_timer()
477 del_timer(&host->timer); in sdhci_del_timer()
482 return host->cmd || host->data_cmd; in sdhci_has_requests()
500 blksize = host->data->blksz; in sdhci_read_block_pio()
506 BUG_ON(!sg_miter_next(&host->sg_miter)); in sdhci_read_block_pio()
508 len = min(host->sg_miter.length, blksize); in sdhci_read_block_pio()
510 blksize -= len; in sdhci_read_block_pio()
511 host->sg_miter.consumed = len; in sdhci_read_block_pio()
513 buf = host->sg_miter.addr; in sdhci_read_block_pio()
525 chunk--; in sdhci_read_block_pio()
526 len--; in sdhci_read_block_pio()
530 sg_miter_stop(&host->sg_miter); in sdhci_read_block_pio()
544 blksize = host->data->blksz; in sdhci_write_block_pio()
551 BUG_ON(!sg_miter_next(&host->sg_miter)); in sdhci_write_block_pio()
553 len = min(host->sg_miter.length, blksize); in sdhci_write_block_pio()
555 blksize -= len; in sdhci_write_block_pio()
556 host->sg_miter.consumed = len; in sdhci_write_block_pio()
558 buf = host->sg_miter.addr; in sdhci_write_block_pio()
565 len--; in sdhci_write_block_pio()
575 sg_miter_stop(&host->sg_miter); in sdhci_write_block_pio()
584 if (host->blocks == 0) in sdhci_transfer_pio()
587 if (host->data->flags & MMC_DATA_READ) in sdhci_transfer_pio()
597 if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) && in sdhci_transfer_pio()
598 (host->data->blocks == 1)) in sdhci_transfer_pio()
602 if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY) in sdhci_transfer_pio()
605 if (host->data->flags & MMC_DATA_READ) in sdhci_transfer_pio()
610 host->blocks--; in sdhci_transfer_pio()
611 if (host->blocks == 0) in sdhci_transfer_pio()
627 if (data->host_cookie == COOKIE_PRE_MAPPED) in sdhci_pre_dma_transfer()
628 return data->sg_count; in sdhci_pre_dma_transfer()
631 if (host->bounce_buffer) { in sdhci_pre_dma_transfer()
632 unsigned int length = data->blksz * data->blocks; in sdhci_pre_dma_transfer()
634 if (length > host->bounce_buffer_size) { in sdhci_pre_dma_transfer()
636 mmc_hostname(host->mmc), length, in sdhci_pre_dma_transfer()
637 host->bounce_buffer_size); in sdhci_pre_dma_transfer()
638 return -EIO; in sdhci_pre_dma_transfer()
642 if (host->ops->copy_to_bounce_buffer) { in sdhci_pre_dma_transfer()
643 host->ops->copy_to_bounce_buffer(host, in sdhci_pre_dma_transfer()
646 sg_copy_to_buffer(data->sg, data->sg_len, in sdhci_pre_dma_transfer()
647 host->bounce_buffer, length); in sdhci_pre_dma_transfer()
651 dma_sync_single_for_device(mmc_dev(host->mmc), in sdhci_pre_dma_transfer()
652 host->bounce_addr, in sdhci_pre_dma_transfer()
653 host->bounce_buffer_size, in sdhci_pre_dma_transfer()
659 sg_count = dma_map_sg(mmc_dev(host->mmc), in sdhci_pre_dma_transfer()
660 data->sg, data->sg_len, in sdhci_pre_dma_transfer()
665 return -ENOSPC; in sdhci_pre_dma_transfer()
667 data->sg_count = sg_count; in sdhci_pre_dma_transfer()
668 data->host_cookie = cookie; in sdhci_pre_dma_transfer()
676 return kmap_atomic(sg_page(sg)) + sg->offset; in sdhci_kmap_atomic()
690 /* 32-bit and 64-bit descriptors have these members in same position */ in sdhci_adma_write_desc()
691 dma_desc->cmd = cpu_to_le16(cmd); in sdhci_adma_write_desc()
692 dma_desc->len = cpu_to_le16(len); in sdhci_adma_write_desc()
693 dma_desc->addr_lo = cpu_to_le32(lower_32_bits(addr)); in sdhci_adma_write_desc()
695 if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_adma_write_desc()
696 dma_desc->addr_hi = cpu_to_le32(upper_32_bits(addr)); in sdhci_adma_write_desc()
698 *desc += host->desc_sz; in sdhci_adma_write_desc()
706 if (host->ops->adma_write_desc) in __sdhci_adma_write_desc()
707 host->ops->adma_write_desc(host, desc, addr, len, cmd); in __sdhci_adma_write_desc()
716 /* 32-bit and 64-bit descriptors have 'cmd' in same position */ in sdhci_adma_mark_end()
717 dma_desc->cmd |= cpu_to_le16(ADMA2_END); in sdhci_adma_mark_end()
735 host->sg_count = sg_count; in sdhci_adma_table_pre()
737 desc = host->adma_table; in sdhci_adma_table_pre()
738 align = host->align_buffer; in sdhci_adma_table_pre()
740 align_addr = host->align_addr; in sdhci_adma_table_pre()
742 for_each_sg(data->sg, sg, host->sg_count, i) { in sdhci_adma_table_pre()
748 * be 32-bit aligned. If they aren't, then we use a bounce in sdhci_adma_table_pre()
752 offset = (SDHCI_ADMA2_ALIGN - (addr & SDHCI_ADMA2_MASK)) & in sdhci_adma_table_pre()
755 if (data->flags & MMC_DATA_WRITE) { in sdhci_adma_table_pre()
771 len -= offset; in sdhci_adma_table_pre()
785 WARN_ON((desc - host->adma_table) >= host->adma_table_sz); in sdhci_adma_table_pre()
788 if (host->quirks & SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC) { in sdhci_adma_table_pre()
790 if (desc != host->adma_table) { in sdhci_adma_table_pre()
791 desc -= host->desc_sz; in sdhci_adma_table_pre()
795 /* Add a terminating entry - nop, end, valid */ in sdhci_adma_table_pre()
809 if (data->flags & MMC_DATA_READ) { in sdhci_adma_table_post()
813 for_each_sg(data->sg, sg, host->sg_count, i) in sdhci_adma_table_post()
820 dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg, in sdhci_adma_table_post()
821 data->sg_len, DMA_FROM_DEVICE); in sdhci_adma_table_post()
823 align = host->align_buffer; in sdhci_adma_table_post()
825 for_each_sg(data->sg, sg, host->sg_count, i) { in sdhci_adma_table_post()
827 size = SDHCI_ADMA2_ALIGN - in sdhci_adma_table_post()
844 if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_set_adma_addr()
850 if (host->bounce_buffer) in sdhci_sdma_address()
851 return host->bounce_addr; in sdhci_sdma_address()
853 return sg_dma_address(host->data->sg); in sdhci_sdma_address()
858 if (host->v4_mode) in sdhci_set_sdma_addr()
872 target_timeout = cmd->busy_timeout * 1000; in sdhci_target_timeout()
874 target_timeout = DIV_ROUND_UP(data->timeout_ns, 1000); in sdhci_target_timeout()
875 if (host->clock && data->timeout_clks) { in sdhci_target_timeout()
879 * data->timeout_clks is in units of clock cycles. in sdhci_target_timeout()
880 * host->clock is in Hz. target_timeout is in us. in sdhci_target_timeout()
883 val = 1000000ULL * data->timeout_clks; in sdhci_target_timeout()
884 if (do_div(val, host->clock)) in sdhci_target_timeout()
896 struct mmc_data *data = cmd->data; in sdhci_calc_sw_timeout()
897 struct mmc_host *mmc = host->mmc; in sdhci_calc_sw_timeout()
898 struct mmc_ios *ios = &mmc->ios; in sdhci_calc_sw_timeout()
899 unsigned char bus_width = 1 << ios->bus_width; in sdhci_calc_sw_timeout()
909 blksz = data->blksz; in sdhci_calc_sw_timeout()
910 freq = mmc->actual_clock ? : host->clock; in sdhci_calc_sw_timeout()
916 host->data_timeout = data->blocks * target_timeout + in sdhci_calc_sw_timeout()
919 host->data_timeout = target_timeout; in sdhci_calc_sw_timeout()
922 if (host->data_timeout) in sdhci_calc_sw_timeout()
923 host->data_timeout += MMC_CMD_TRANSFER_TIME; in sdhci_calc_sw_timeout()
938 * longer to time out, but that's much better than having a too-short in sdhci_calc_timeout()
941 if (host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL) in sdhci_calc_timeout()
942 return host->max_timeout_count; in sdhci_calc_timeout()
946 return host->max_timeout_count; in sdhci_calc_timeout()
948 data = cmd->data; in sdhci_calc_timeout()
950 if (!data && !cmd->busy_timeout) in sdhci_calc_timeout()
951 return host->max_timeout_count; in sdhci_calc_timeout()
962 * (2) host->timeout_clk < 2^16 in sdhci_calc_timeout()
967 current_timeout = (1 << 13) * 1000 / host->timeout_clk; in sdhci_calc_timeout()
971 if (count > host->max_timeout_count) in sdhci_calc_timeout()
975 if (count > host->max_timeout_count) { in sdhci_calc_timeout()
976 if (!(host->quirks2 & SDHCI_QUIRK2_DISABLE_HW_TIMEOUT)) in sdhci_calc_timeout()
978 count, cmd->opcode); in sdhci_calc_timeout()
979 count = host->max_timeout_count; in sdhci_calc_timeout()
992 if (host->flags & SDHCI_REQ_USE_DMA) in sdhci_set_transfer_irqs()
993 host->ier = (host->ier & ~pio_irqs) | dma_irqs; in sdhci_set_transfer_irqs()
995 host->ier = (host->ier & ~dma_irqs) | pio_irqs; in sdhci_set_transfer_irqs()
997 if (host->flags & (SDHCI_AUTO_CMD23 | SDHCI_AUTO_CMD12)) in sdhci_set_transfer_irqs()
998 host->ier |= SDHCI_INT_AUTO_CMD_ERR; in sdhci_set_transfer_irqs()
1000 host->ier &= ~SDHCI_INT_AUTO_CMD_ERR; in sdhci_set_transfer_irqs()
1002 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_transfer_irqs()
1003 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_transfer_irqs()
1009 host->ier |= SDHCI_INT_DATA_TIMEOUT; in sdhci_set_data_timeout_irq()
1011 host->ier &= ~SDHCI_INT_DATA_TIMEOUT; in sdhci_set_data_timeout_irq()
1012 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_data_timeout_irq()
1013 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_data_timeout_irq()
1023 host->quirks2 & SDHCI_QUIRK2_DISABLE_HW_TIMEOUT) { in __sdhci_set_timeout()
1026 } else if (!(host->ier & SDHCI_INT_DATA_TIMEOUT)) { in __sdhci_set_timeout()
1036 if (host->ops->set_timeout) in sdhci_set_timeout()
1037 host->ops->set_timeout(host, cmd); in sdhci_set_timeout()
1045 WARN_ON(host->data); in sdhci_initialize_data()
1048 BUG_ON(data->blksz * data->blocks > 524288); in sdhci_initialize_data()
1049 BUG_ON(data->blksz > host->mmc->max_blk_size); in sdhci_initialize_data()
1050 BUG_ON(data->blocks > 65535); in sdhci_initialize_data()
1052 host->data = data; in sdhci_initialize_data()
1053 host->data_early = 0; in sdhci_initialize_data()
1054 host->data->bytes_xfered = 0; in sdhci_initialize_data()
1062 SDHCI_MAKE_BLKSZ(host->sdma_boundary, data->blksz), in sdhci_set_block_info()
1065 * For Version 4.10 onwards, if v4 mode is enabled, 32-bit Block Count in sdhci_set_block_info()
1066 * can be supported, in that case 16-bit block count register must be 0. in sdhci_set_block_info()
1068 if (host->version >= SDHCI_SPEC_410 && host->v4_mode && in sdhci_set_block_info()
1069 (host->quirks2 & SDHCI_QUIRK2_USE_32BIT_BLK_CNT)) { in sdhci_set_block_info()
1072 sdhci_writew(host, data->blocks, SDHCI_32BIT_BLK_CNT); in sdhci_set_block_info()
1074 sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); in sdhci_set_block_info()
1080 struct mmc_data *data = cmd->data; in sdhci_prepare_data()
1084 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_prepare_data()
1089 host->flags |= SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1100 if (host->flags & SDHCI_USE_ADMA) { in sdhci_prepare_data()
1101 if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) { in sdhci_prepare_data()
1111 if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) in sdhci_prepare_data()
1113 if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) in sdhci_prepare_data()
1118 for_each_sg(data->sg, sg, data->sg_len, i) { in sdhci_prepare_data()
1119 if (sg->length & length_mask) { in sdhci_prepare_data()
1121 sg->length); in sdhci_prepare_data()
1122 host->flags &= ~SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1125 if (sg->offset & offset_mask) { in sdhci_prepare_data()
1127 host->flags &= ~SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1134 if (host->flags & SDHCI_REQ_USE_DMA) { in sdhci_prepare_data()
1143 host->flags &= ~SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1144 } else if (host->flags & SDHCI_USE_ADMA) { in sdhci_prepare_data()
1146 sdhci_set_adma_addr(host, host->adma_addr); in sdhci_prepare_data()
1155 if (!(host->flags & SDHCI_REQ_USE_DMA)) { in sdhci_prepare_data()
1159 if (host->data->flags & MMC_DATA_READ) in sdhci_prepare_data()
1163 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in sdhci_prepare_data()
1164 host->blocks = data->blocks; in sdhci_prepare_data()
1177 struct mmc_host *mmc = host->mmc; in sdhci_external_dma_init()
1179 host->tx_chan = dma_request_chan(mmc_dev(mmc), "tx"); in sdhci_external_dma_init()
1180 if (IS_ERR(host->tx_chan)) { in sdhci_external_dma_init()
1181 ret = PTR_ERR(host->tx_chan); in sdhci_external_dma_init()
1182 if (ret != -EPROBE_DEFER) in sdhci_external_dma_init()
1184 host->tx_chan = NULL; in sdhci_external_dma_init()
1188 host->rx_chan = dma_request_chan(mmc_dev(mmc), "rx"); in sdhci_external_dma_init()
1189 if (IS_ERR(host->rx_chan)) { in sdhci_external_dma_init()
1190 if (host->tx_chan) { in sdhci_external_dma_init()
1191 dma_release_channel(host->tx_chan); in sdhci_external_dma_init()
1192 host->tx_chan = NULL; in sdhci_external_dma_init()
1195 ret = PTR_ERR(host->rx_chan); in sdhci_external_dma_init()
1196 if (ret != -EPROBE_DEFER) in sdhci_external_dma_init()
1198 host->rx_chan = NULL; in sdhci_external_dma_init()
1207 return data->flags & MMC_DATA_WRITE ? host->tx_chan : host->rx_chan; in sdhci_external_dma_channel()
1214 enum dma_transfer_direction dir; in sdhci_external_dma_setup() local
1216 struct mmc_data *data = cmd->data; in sdhci_external_dma_setup()
1222 if (!host->mapbase) in sdhci_external_dma_setup()
1223 return -EINVAL; in sdhci_external_dma_setup()
1226 cfg.src_addr = host->mapbase + SDHCI_BUFFER; in sdhci_external_dma_setup()
1227 cfg.dst_addr = host->mapbase + SDHCI_BUFFER; in sdhci_external_dma_setup()
1230 cfg.src_maxburst = data->blksz / 4; in sdhci_external_dma_setup()
1231 cfg.dst_maxburst = data->blksz / 4; in sdhci_external_dma_setup()
1234 for (i = 0; i < data->sg_len; i++) { in sdhci_external_dma_setup()
1235 if ((data->sg + i)->length % data->blksz) in sdhci_external_dma_setup()
1236 return -EINVAL; in sdhci_external_dma_setup()
1247 return -EINVAL; in sdhci_external_dma_setup()
1249 dir = data->flags & MMC_DATA_WRITE ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; in sdhci_external_dma_setup()
1250 desc = dmaengine_prep_slave_sg(chan, data->sg, data->sg_len, dir, in sdhci_external_dma_setup()
1253 return -EINVAL; in sdhci_external_dma_setup()
1255 desc->callback = NULL; in sdhci_external_dma_setup()
1256 desc->callback_param = NULL; in sdhci_external_dma_setup()
1267 if (host->tx_chan) { in sdhci_external_dma_release()
1268 dma_release_channel(host->tx_chan); in sdhci_external_dma_release()
1269 host->tx_chan = NULL; in sdhci_external_dma_release()
1272 if (host->rx_chan) { in sdhci_external_dma_release()
1273 dma_release_channel(host->rx_chan); in sdhci_external_dma_release()
1274 host->rx_chan = NULL; in sdhci_external_dma_release()
1283 struct mmc_data *data = cmd->data; in __sdhci_external_dma_prepare_data()
1287 host->flags |= SDHCI_REQ_USE_DMA; in __sdhci_external_dma_prepare_data()
1301 mmc_hostname(host->mmc)); in sdhci_external_dma_prepare_data()
1311 if (!cmd->data) in sdhci_external_dma_pre_transfer()
1314 chan = sdhci_external_dma_channel(host, cmd->data); in sdhci_external_dma_pre_transfer()
1323 return -EOPNOTSUPP; in sdhci_external_dma_init()
1352 host->use_external_dma = en; in sdhci_switch_external_dma()
1359 return !mrq->sbc && (host->flags & SDHCI_AUTO_CMD12) && in sdhci_auto_cmd12()
1360 !mrq->cap_cmd_during_tfr; in sdhci_auto_cmd12()
1366 return mrq->sbc && (host->flags & SDHCI_AUTO_CMD23); in sdhci_auto_cmd23()
1372 return mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23); in sdhci_manual_cmd23()
1379 bool use_cmd12 = sdhci_auto_cmd12(host, cmd->mrq) && in sdhci_auto_cmd_select()
1380 (cmd->opcode != SD_IO_RW_EXTENDED); in sdhci_auto_cmd_select()
1381 bool use_cmd23 = sdhci_auto_cmd23(host, cmd->mrq); in sdhci_auto_cmd_select()
1388 * here because some controllers (e.g sdhci-of-dwmshc) expect it. in sdhci_auto_cmd_select()
1390 if (host->version >= SDHCI_SPEC_410 && host->v4_mode && in sdhci_auto_cmd_select()
1406 * on successful completion (so no Auto-CMD12). in sdhci_auto_cmd_select()
1418 struct mmc_data *data = cmd->data; in sdhci_set_transfer_mode()
1421 if (host->quirks2 & in sdhci_set_transfer_mode()
1424 if (cmd->opcode != MMC_SEND_TUNING_BLOCK_HS200) in sdhci_set_transfer_mode()
1435 WARN_ON(!host->data); in sdhci_set_transfer_mode()
1437 if (!(host->quirks2 & SDHCI_QUIRK2_SUPPORT_SINGLE)) in sdhci_set_transfer_mode()
1440 if (mmc_op_multi(cmd->opcode) || data->blocks > 1) { in sdhci_set_transfer_mode()
1443 if (sdhci_auto_cmd23(host, cmd->mrq)) in sdhci_set_transfer_mode()
1444 sdhci_writel(host, cmd->mrq->sbc->arg, SDHCI_ARGUMENT2); in sdhci_set_transfer_mode()
1447 if (data->flags & MMC_DATA_READ) in sdhci_set_transfer_mode()
1449 if (host->flags & SDHCI_REQ_USE_DMA) in sdhci_set_transfer_mode()
1457 return (!(host->flags & SDHCI_DEVICE_DEAD) && in sdhci_needs_reset()
1458 ((mrq->cmd && mrq->cmd->error) || in sdhci_needs_reset()
1459 (mrq->sbc && mrq->sbc->error) || in sdhci_needs_reset()
1460 (mrq->data && mrq->data->stop && mrq->data->stop->error) || in sdhci_needs_reset()
1461 (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))); in sdhci_needs_reset()
1469 if (host->mrqs_done[i] == mrq) { in sdhci_set_mrq_done()
1476 if (!host->mrqs_done[i]) { in sdhci_set_mrq_done()
1477 host->mrqs_done[i] = mrq; in sdhci_set_mrq_done()
1487 if (host->cmd && host->cmd->mrq == mrq) in __sdhci_finish_mrq()
1488 host->cmd = NULL; in __sdhci_finish_mrq()
1490 if (host->data_cmd && host->data_cmd->mrq == mrq) in __sdhci_finish_mrq()
1491 host->data_cmd = NULL; in __sdhci_finish_mrq()
1493 if (host->deferred_cmd && host->deferred_cmd->mrq == mrq) in __sdhci_finish_mrq()
1494 host->deferred_cmd = NULL; in __sdhci_finish_mrq()
1496 if (host->data && host->data->mrq == mrq) in __sdhci_finish_mrq()
1497 host->data = NULL; in __sdhci_finish_mrq()
1500 host->pending_reset = true; in __sdhci_finish_mrq()
1514 queue_work(host->complete_wq, &host->complete_work); in sdhci_finish_mrq()
1519 struct mmc_command *data_cmd = host->data_cmd; in __sdhci_finish_data()
1520 struct mmc_data *data = host->data; in __sdhci_finish_data()
1522 host->data = NULL; in __sdhci_finish_data()
1523 host->data_cmd = NULL; in __sdhci_finish_data()
1529 if (data->error) { in __sdhci_finish_data()
1530 if (!host->cmd || host->cmd == data_cmd) in __sdhci_finish_data()
1535 if ((host->flags & (SDHCI_REQ_USE_DMA | SDHCI_USE_ADMA)) == in __sdhci_finish_data()
1546 if (data->error) in __sdhci_finish_data()
1547 data->bytes_xfered = 0; in __sdhci_finish_data()
1549 data->bytes_xfered = data->blksz * data->blocks; in __sdhci_finish_data()
1552 * Need to send CMD12 if - in __sdhci_finish_data()
1553 * a) open-ended multiblock transfer not using auto CMD12 (no CMD23) in __sdhci_finish_data()
1556 if (data->stop && in __sdhci_finish_data()
1557 ((!data->mrq->sbc && !sdhci_auto_cmd12(host, data->mrq)) || in __sdhci_finish_data()
1558 data->error)) { in __sdhci_finish_data()
1564 if (data->mrq->cap_cmd_during_tfr) { in __sdhci_finish_data()
1565 __sdhci_finish_mrq(host, data->mrq); in __sdhci_finish_data()
1568 host->cmd = NULL; in __sdhci_finish_data()
1569 if (!sdhci_send_command(host, data->stop)) { in __sdhci_finish_data()
1575 data->stop->error = -EIO; in __sdhci_finish_data()
1576 __sdhci_finish_mrq(host, data->mrq); in __sdhci_finish_data()
1578 WARN_ON(host->deferred_cmd); in __sdhci_finish_data()
1579 host->deferred_cmd = data->stop; in __sdhci_finish_data()
1584 __sdhci_finish_mrq(host, data->mrq); in __sdhci_finish_data()
1599 WARN_ON(host->cmd); in sdhci_send_command()
1602 cmd->error = 0; in sdhci_send_command()
1604 if ((host->quirks2 & SDHCI_QUIRK2_STOP_WITH_TC) && in sdhci_send_command()
1605 cmd->opcode == MMC_STOP_TRANSMISSION) in sdhci_send_command()
1606 cmd->flags |= MMC_RSP_BUSY; in sdhci_send_command()
1614 if (cmd->mrq->data && (cmd == cmd->mrq->data->stop)) in sdhci_send_command()
1620 host->cmd = cmd; in sdhci_send_command()
1621 host->data_timeout = 0; in sdhci_send_command()
1623 WARN_ON(host->data_cmd); in sdhci_send_command()
1624 host->data_cmd = cmd; in sdhci_send_command()
1628 if (cmd->data) { in sdhci_send_command()
1629 if (host->use_external_dma) in sdhci_send_command()
1635 sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); in sdhci_send_command()
1639 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { in sdhci_send_command()
1642 * This does not happen in practice because 136-bit response in sdhci_send_command()
1646 cmd->flags &= ~MMC_RSP_BUSY; in sdhci_send_command()
1649 if (!(cmd->flags & MMC_RSP_PRESENT)) in sdhci_send_command()
1651 else if (cmd->flags & MMC_RSP_136) in sdhci_send_command()
1653 else if (cmd->flags & MMC_RSP_BUSY) in sdhci_send_command()
1658 if (cmd->flags & MMC_RSP_CRC) in sdhci_send_command()
1660 if (cmd->flags & MMC_RSP_OPCODE) in sdhci_send_command()
1664 if (cmd->data || cmd->opcode == MMC_SEND_TUNING_BLOCK || in sdhci_send_command()
1665 cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200) in sdhci_send_command()
1669 if (host->data_timeout) in sdhci_send_command()
1670 timeout += nsecs_to_jiffies(host->data_timeout); in sdhci_send_command()
1671 else if (!cmd->data && cmd->busy_timeout > 9000) in sdhci_send_command()
1672 timeout += DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ; in sdhci_send_command()
1675 sdhci_mod_timer(host, cmd->mrq, timeout); in sdhci_send_command()
1677 if (host->use_external_dma) in sdhci_send_command()
1680 sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); in sdhci_send_command()
1688 if (!present || host->flags & SDHCI_DEVICE_DEAD) { in sdhci_present_error()
1689 cmd->error = -ENOMEDIUM; in sdhci_present_error()
1699 __releases(host->lock) in sdhci_send_command_retry()
1700 __acquires(host->lock) in sdhci_send_command_retry()
1702 struct mmc_command *deferred_cmd = host->deferred_cmd; in sdhci_send_command_retry()
1707 if (!timeout--) { in sdhci_send_command_retry()
1709 mmc_hostname(host->mmc)); in sdhci_send_command_retry()
1711 cmd->error = -EIO; in sdhci_send_command_retry()
1715 spin_unlock_irqrestore(&host->lock, flags); in sdhci_send_command_retry()
1719 present = host->mmc->ops->get_cd(host->mmc); in sdhci_send_command_retry()
1721 spin_lock_irqsave(&host->lock, flags); in sdhci_send_command_retry()
1724 if (cmd == deferred_cmd && cmd != host->deferred_cmd) in sdhci_send_command_retry()
1731 if (cmd == host->deferred_cmd) in sdhci_send_command_retry()
1732 host->deferred_cmd = NULL; in sdhci_send_command_retry()
1742 reg = SDHCI_RESPONSE + (3 - i) * 4; in sdhci_read_rsp_136()
1743 cmd->resp[i] = sdhci_readl(host, reg); in sdhci_read_rsp_136()
1746 if (host->quirks2 & SDHCI_QUIRK2_RSP_136_HAS_CRC) in sdhci_read_rsp_136()
1751 cmd->resp[i] <<= 8; in sdhci_read_rsp_136()
1753 cmd->resp[i] |= cmd->resp[i + 1] >> 24; in sdhci_read_rsp_136()
1759 struct mmc_command *cmd = host->cmd; in sdhci_finish_command()
1761 host->cmd = NULL; in sdhci_finish_command()
1763 if (cmd->flags & MMC_RSP_PRESENT) { in sdhci_finish_command()
1764 if (cmd->flags & MMC_RSP_136) { in sdhci_finish_command()
1767 cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE); in sdhci_finish_command()
1771 if (cmd->mrq->cap_cmd_during_tfr && cmd == cmd->mrq->cmd) in sdhci_finish_command()
1772 mmc_command_done(host->mmc, cmd->mrq); in sdhci_finish_command()
1777 * The busy signal uses DAT0 so this is similar to waiting in sdhci_finish_command()
1784 if (cmd->flags & MMC_RSP_BUSY) { in sdhci_finish_command()
1785 if (cmd->data) { in sdhci_finish_command()
1787 } else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ) && in sdhci_finish_command()
1788 cmd == host->data_cmd) { in sdhci_finish_command()
1795 if (cmd == cmd->mrq->sbc) { in sdhci_finish_command()
1796 if (!sdhci_send_command(host, cmd->mrq->cmd)) { in sdhci_finish_command()
1797 WARN_ON(host->deferred_cmd); in sdhci_finish_command()
1798 host->deferred_cmd = cmd->mrq->cmd; in sdhci_finish_command()
1803 if (host->data && host->data_early) in sdhci_finish_command()
1806 if (!cmd->data) in sdhci_finish_command()
1807 __sdhci_finish_mrq(host, cmd->mrq); in sdhci_finish_command()
1815 switch (host->timing) { in sdhci_get_preset_value()
1841 pr_warn("%s: Invalid UHS-I mode selected\n", in sdhci_get_preset_value()
1842 mmc_hostname(host->mmc)); in sdhci_get_preset_value()
1857 if (host->version >= SDHCI_SPEC_300) { in sdhci_calc_clk()
1858 if (host->preset_enabled) { in sdhci_calc_clk()
1864 if (host->clk_mul && in sdhci_calc_clk()
1868 clk_mul = host->clk_mul; in sdhci_calc_clk()
1879 if (host->clk_mul) { in sdhci_calc_clk()
1881 if ((host->max_clk * host->clk_mul / div) in sdhci_calc_clk()
1885 if ((host->max_clk * host->clk_mul / div) <= clock) { in sdhci_calc_clk()
1892 clk_mul = host->clk_mul; in sdhci_calc_clk()
1893 div--; in sdhci_calc_clk()
1903 if (!host->clk_mul || switch_base_clk) { in sdhci_calc_clk()
1905 if (host->max_clk <= clock) in sdhci_calc_clk()
1910 if ((host->max_clk / div) <= clock) in sdhci_calc_clk()
1916 if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN) in sdhci_calc_clk()
1917 && !div && host->max_clk <= 25000000) in sdhci_calc_clk()
1923 if ((host->max_clk / div) <= clock) in sdhci_calc_clk()
1932 *actual_clock = (host->max_clk * clk_mul) / real_div; in sdhci_calc_clk()
1958 mmc_hostname(host->mmc)); in sdhci_enable_clk()
1965 if (host->version >= SDHCI_SPEC_410 && host->v4_mode) { in sdhci_enable_clk()
1980 mmc_hostname(host->mmc)); in sdhci_enable_clk()
1997 host->mmc->actual_clock = 0; in sdhci_set_clock()
2004 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); in sdhci_set_clock()
2012 struct mmc_host *mmc = host->mmc; in sdhci_set_power_reg()
2014 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); in sdhci_set_power_reg()
2055 mmc_hostname(host->mmc), vdd); in sdhci_set_power_noreg()
2060 if (host->pwr == pwr) in sdhci_set_power_noreg()
2063 host->pwr = pwr; in sdhci_set_power_noreg()
2067 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) in sdhci_set_power_noreg()
2074 if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE)) in sdhci_set_power_noreg()
2082 if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER) in sdhci_set_power_noreg()
2089 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) in sdhci_set_power_noreg()
2096 if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER) in sdhci_set_power_noreg()
2105 if (IS_ERR(host->mmc->supply.vmmc)) in sdhci_set_power()
2122 if (!IS_ERR(host->mmc->supply.vmmc)) { in sdhci_set_power_and_bus_voltage()
2123 struct mmc_host *mmc = host->mmc; in sdhci_set_power_and_bus_voltage()
2125 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); in sdhci_set_power_and_bus_voltage()
2145 present = mmc->ops->get_cd(mmc); in sdhci_request()
2147 spin_lock_irqsave(&host->lock, flags); in sdhci_request()
2151 if (sdhci_present_error(host, mrq->cmd, present)) in sdhci_request()
2154 cmd = sdhci_manual_cmd23(host, mrq) ? mrq->sbc : mrq->cmd; in sdhci_request()
2159 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request()
2165 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request()
2176 spin_lock_irqsave(&host->lock, flags); in sdhci_request_atomic()
2178 if (sdhci_present_error(host, mrq->cmd, true)) { in sdhci_request_atomic()
2183 cmd = sdhci_manual_cmd23(host, mrq) ? mrq->sbc : mrq->cmd; in sdhci_request_atomic()
2189 * again in non-atomic context. So we should not finish this request in sdhci_request_atomic()
2193 ret = -EBUSY; in sdhci_request_atomic()
2198 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_atomic()
2212 if (host->mmc->caps & MMC_CAP_8_BIT_DATA) in sdhci_set_bus_width()
2243 ctrl_2 |= SDHCI_CTRL_HS400; /* Non-standard */ in sdhci_set_uhs_signaling()
2253 if (ios->power_mode == MMC_POWER_UNDEFINED) in sdhci_set_ios()
2256 if (host->flags & SDHCI_DEVICE_DEAD) { in sdhci_set_ios()
2257 if (!IS_ERR(mmc->supply.vmmc) && in sdhci_set_ios()
2258 ios->power_mode == MMC_POWER_OFF) in sdhci_set_ios()
2259 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); in sdhci_set_ios()
2267 if (ios->power_mode == MMC_POWER_OFF) { in sdhci_set_ios()
2272 if (host->version >= SDHCI_SPEC_300 && in sdhci_set_ios()
2273 (ios->power_mode == MMC_POWER_UP) && in sdhci_set_ios()
2274 !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) in sdhci_set_ios()
2277 if (!ios->clock || ios->clock != host->clock) { in sdhci_set_ios()
2278 host->ops->set_clock(host, ios->clock); in sdhci_set_ios()
2279 host->clock = ios->clock; in sdhci_set_ios()
2281 if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK && in sdhci_set_ios()
2282 host->clock) { in sdhci_set_ios()
2283 host->timeout_clk = mmc->actual_clock ? in sdhci_set_ios()
2284 mmc->actual_clock / 1000 : in sdhci_set_ios()
2285 host->clock / 1000; in sdhci_set_ios()
2286 mmc->max_busy_timeout = in sdhci_set_ios()
2287 host->ops->get_max_timeout_count ? in sdhci_set_ios()
2288 host->ops->get_max_timeout_count(host) : in sdhci_set_ios()
2290 mmc->max_busy_timeout /= host->timeout_clk; in sdhci_set_ios()
2294 if (host->ops->set_power) in sdhci_set_ios()
2295 host->ops->set_power(host, ios->power_mode, ios->vdd); in sdhci_set_ios()
2297 sdhci_set_power(host, ios->power_mode, ios->vdd); in sdhci_set_ios()
2299 if (host->ops->platform_send_init_74_clocks) in sdhci_set_ios()
2300 host->ops->platform_send_init_74_clocks(host, ios->power_mode); in sdhci_set_ios()
2302 host->ops->set_bus_width(host, ios->bus_width); in sdhci_set_ios()
2306 if (!(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)) { in sdhci_set_ios()
2307 if (ios->timing == MMC_TIMING_SD_HS || in sdhci_set_ios()
2308 ios->timing == MMC_TIMING_MMC_HS || in sdhci_set_ios()
2309 ios->timing == MMC_TIMING_MMC_HS400 || in sdhci_set_ios()
2310 ios->timing == MMC_TIMING_MMC_HS200 || in sdhci_set_ios()
2311 ios->timing == MMC_TIMING_MMC_DDR52 || in sdhci_set_ios()
2312 ios->timing == MMC_TIMING_UHS_SDR50 || in sdhci_set_ios()
2313 ios->timing == MMC_TIMING_UHS_SDR104 || in sdhci_set_ios()
2314 ios->timing == MMC_TIMING_UHS_DDR50 || in sdhci_set_ios()
2315 ios->timing == MMC_TIMING_UHS_SDR25) in sdhci_set_ios()
2321 if (host->version >= SDHCI_SPEC_300) { in sdhci_set_ios()
2324 if (!host->preset_enabled) { in sdhci_set_ios()
2332 if (ios->drv_type == MMC_SET_DRIVER_TYPE_A) in sdhci_set_ios()
2334 else if (ios->drv_type == MMC_SET_DRIVER_TYPE_B) in sdhci_set_ios()
2336 else if (ios->drv_type == MMC_SET_DRIVER_TYPE_C) in sdhci_set_ios()
2338 else if (ios->drv_type == MMC_SET_DRIVER_TYPE_D) in sdhci_set_ios()
2362 /* Re-enable SD Clock */ in sdhci_set_ios()
2363 host->ops->set_clock(host, host->clock); in sdhci_set_ios()
2371 host->ops->set_uhs_signaling(host, ios->timing); in sdhci_set_ios()
2372 host->timing = ios->timing; in sdhci_set_ios()
2374 if (!(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN) && in sdhci_set_ios()
2375 ((ios->timing == MMC_TIMING_UHS_SDR12) || in sdhci_set_ios()
2376 (ios->timing == MMC_TIMING_UHS_SDR25) || in sdhci_set_ios()
2377 (ios->timing == MMC_TIMING_UHS_SDR50) || in sdhci_set_ios()
2378 (ios->timing == MMC_TIMING_UHS_SDR104) || in sdhci_set_ios()
2379 (ios->timing == MMC_TIMING_UHS_DDR50) || in sdhci_set_ios()
2380 (ios->timing == MMC_TIMING_MMC_DDR52))) { in sdhci_set_ios()
2385 ios->drv_type = FIELD_GET(SDHCI_PRESET_DRV_MASK, in sdhci_set_ios()
2389 /* Re-enable SD Clock */ in sdhci_set_ios()
2390 host->ops->set_clock(host, host->clock); in sdhci_set_ios()
2399 if (host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS) in sdhci_set_ios()
2409 if (host->flags & SDHCI_DEVICE_DEAD) in sdhci_get_cd()
2424 if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) in sdhci_get_cd()
2436 spin_lock_irqsave(&host->lock, flags); in sdhci_check_ro()
2438 if (host->flags & SDHCI_DEVICE_DEAD) in sdhci_check_ro()
2440 else if (host->ops->get_ro) in sdhci_check_ro()
2441 is_readonly = host->ops->get_ro(host); in sdhci_check_ro()
2442 else if (mmc_can_gpio_ro(host->mmc)) in sdhci_check_ro()
2443 is_readonly = mmc_gpio_get_ro(host->mmc); in sdhci_check_ro()
2448 spin_unlock_irqrestore(&host->lock, flags); in sdhci_check_ro()
2450 /* This quirk needs to be replaced by a callback-function later */ in sdhci_check_ro()
2451 return host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT ? in sdhci_check_ro()
2462 if (!(host->quirks & SDHCI_QUIRK_UNSTABLE_RO_DETECT)) in sdhci_get_ro()
2480 if (host->ops && host->ops->hw_reset) in sdhci_hw_reset()
2481 host->ops->hw_reset(host); in sdhci_hw_reset()
2486 if (!(host->flags & SDHCI_DEVICE_DEAD)) { in sdhci_enable_sdio_irq_nolock()
2488 host->ier |= SDHCI_INT_CARD_INT; in sdhci_enable_sdio_irq_nolock()
2490 host->ier &= ~SDHCI_INT_CARD_INT; in sdhci_enable_sdio_irq_nolock()
2492 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_enable_sdio_irq_nolock()
2493 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_enable_sdio_irq_nolock()
2505 spin_lock_irqsave(&host->lock, flags); in sdhci_enable_sdio_irq()
2507 spin_unlock_irqrestore(&host->lock, flags); in sdhci_enable_sdio_irq()
2519 spin_lock_irqsave(&host->lock, flags); in sdhci_ack_sdio_irq()
2521 spin_unlock_irqrestore(&host->lock, flags); in sdhci_ack_sdio_irq()
2535 if (host->version < SDHCI_SPEC_300) in sdhci_start_signal_voltage_switch()
2540 switch (ios->signal_voltage) { in sdhci_start_signal_voltage_switch()
2542 if (!(host->flags & SDHCI_SIGNALING_330)) in sdhci_start_signal_voltage_switch()
2543 return -EINVAL; in sdhci_start_signal_voltage_switch()
2548 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_start_signal_voltage_switch()
2553 return -EIO; in sdhci_start_signal_voltage_switch()
2567 return -EAGAIN; in sdhci_start_signal_voltage_switch()
2569 if (!(host->flags & SDHCI_SIGNALING_180)) in sdhci_start_signal_voltage_switch()
2570 return -EINVAL; in sdhci_start_signal_voltage_switch()
2571 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_start_signal_voltage_switch()
2576 return -EIO; in sdhci_start_signal_voltage_switch()
2588 if (host->ops->voltage_switch) in sdhci_start_signal_voltage_switch()
2589 host->ops->voltage_switch(host); in sdhci_start_signal_voltage_switch()
2599 return -EAGAIN; in sdhci_start_signal_voltage_switch()
2601 if (!(host->flags & SDHCI_SIGNALING_120)) in sdhci_start_signal_voltage_switch()
2602 return -EINVAL; in sdhci_start_signal_voltage_switch()
2603 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_start_signal_voltage_switch()
2608 return -EIO; in sdhci_start_signal_voltage_switch()
2635 spin_lock_irqsave(&host->lock, flags); in sdhci_prepare_hs400_tuning()
2636 host->flags |= SDHCI_HS400_TUNING; in sdhci_prepare_hs400_tuning()
2637 spin_unlock_irqrestore(&host->lock, flags); in sdhci_prepare_hs400_tuning()
2648 if (host->quirks2 & SDHCI_QUIRK2_TUNING_WORK_AROUND) in sdhci_start_tuning()
2669 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_end_tuning()
2670 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_end_tuning()
2694 mmc_send_abort_tuning(host->mmc, opcode); in sdhci_abort_tuning()
2701 * automatically) so mmc_send_tuning() will return -EIO. Also the tuning command
2707 struct mmc_host *mmc = host->mmc; in sdhci_send_tuning()
2711 u32 b = host->sdma_boundary; in sdhci_send_tuning()
2713 spin_lock_irqsave(&host->lock, flags); in sdhci_send_tuning()
2726 mmc->ios.bus_width == MMC_BUS_WIDTH_8) in sdhci_send_tuning()
2740 spin_unlock_irqrestore(&host->lock, flags); in sdhci_send_tuning()
2741 host->tuning_done = 0; in sdhci_send_tuning()
2745 host->cmd = NULL; in sdhci_send_tuning()
2749 host->tuning_done = 0; in sdhci_send_tuning()
2751 spin_unlock_irqrestore(&host->lock, flags); in sdhci_send_tuning()
2754 wait_event_timeout(host->buf_ready_int, (host->tuning_done == 1), in sdhci_send_tuning()
2768 for (i = 0; i < host->tuning_loop_count; i++) { in __sdhci_execute_tuning()
2773 if (!host->tuning_done) { in __sdhci_execute_tuning()
2775 mmc_hostname(host->mmc)); in __sdhci_execute_tuning()
2777 return -ETIMEDOUT; in __sdhci_execute_tuning()
2781 if (host->tuning_delay > 0) in __sdhci_execute_tuning()
2782 mdelay(host->tuning_delay); in __sdhci_execute_tuning()
2794 mmc_hostname(host->mmc)); in __sdhci_execute_tuning()
2796 return -EAGAIN; in __sdhci_execute_tuning()
2806 hs400_tuning = host->flags & SDHCI_HS400_TUNING; in sdhci_execute_tuning()
2808 if (host->tuning_mode == SDHCI_TUNING_MODE_1) in sdhci_execute_tuning()
2809 tuning_count = host->tuning_count; in sdhci_execute_tuning()
2818 switch (host->timing) { in sdhci_execute_tuning()
2821 err = -EINVAL; in sdhci_execute_tuning()
2826 * Periodic re-tuning for HS400 is not expected to be needed, so in sdhci_execute_tuning()
2838 if (host->flags & SDHCI_SDR50_NEEDS_TUNING) in sdhci_execute_tuning()
2846 if (host->ops->platform_execute_tuning) { in sdhci_execute_tuning()
2847 err = host->ops->platform_execute_tuning(host, opcode); in sdhci_execute_tuning()
2851 mmc->retune_period = tuning_count; in sdhci_execute_tuning()
2853 if (host->tuning_delay < 0) in sdhci_execute_tuning()
2854 host->tuning_delay = opcode == MMC_SEND_TUNING_BLOCK; in sdhci_execute_tuning()
2858 host->tuning_err = __sdhci_execute_tuning(host, opcode); in sdhci_execute_tuning()
2862 host->flags &= ~SDHCI_HS400_TUNING; in sdhci_execute_tuning()
2871 if (host->version < SDHCI_SPEC_300) in sdhci_enable_preset_value()
2878 if (host->preset_enabled != enable) { in sdhci_enable_preset_value()
2889 host->flags |= SDHCI_PV_ENABLED; in sdhci_enable_preset_value()
2891 host->flags &= ~SDHCI_PV_ENABLED; in sdhci_enable_preset_value()
2893 host->preset_enabled = enable; in sdhci_enable_preset_value()
2900 struct mmc_data *data = mrq->data; in sdhci_post_req()
2902 if (data->host_cookie != COOKIE_UNMAPPED) in sdhci_post_req()
2903 dma_unmap_sg(mmc_dev(mmc), data->sg, data->sg_len, in sdhci_post_req()
2906 data->host_cookie = COOKIE_UNMAPPED; in sdhci_post_req()
2913 mrq->data->host_cookie = COOKIE_UNMAPPED; in sdhci_pre_req()
2916 * No pre-mapping in the pre hook if we're using the bounce buffer, in sdhci_pre_req()
2920 if (host->flags & SDHCI_REQ_USE_DMA && !host->bounce_buffer) in sdhci_pre_req()
2921 sdhci_pre_dma_transfer(host, mrq->data, COOKIE_PRE_MAPPED); in sdhci_pre_req()
2926 if (host->data_cmd) { in sdhci_error_out_mrqs()
2927 host->data_cmd->error = err; in sdhci_error_out_mrqs()
2928 sdhci_finish_mrq(host, host->data_cmd->mrq); in sdhci_error_out_mrqs()
2931 if (host->cmd) { in sdhci_error_out_mrqs()
2932 host->cmd->error = err; in sdhci_error_out_mrqs()
2933 sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_error_out_mrqs()
2944 if (host->ops->card_event) in sdhci_card_event()
2945 host->ops->card_event(host); in sdhci_card_event()
2947 present = mmc->ops->get_cd(mmc); in sdhci_card_event()
2949 spin_lock_irqsave(&host->lock, flags); in sdhci_card_event()
2961 sdhci_error_out_mrqs(host, -ENOMEDIUM); in sdhci_card_event()
2964 spin_unlock_irqrestore(&host->lock, flags); in sdhci_card_event()
2996 spin_lock_irqsave(&host->lock, flags); in sdhci_request_done()
2999 mrq = host->mrqs_done[i]; in sdhci_request_done()
3005 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3017 * also be in mrqs_done, otherwise host->cmd and host->data_cmd in sdhci_request_done()
3020 if (host->cmd || host->data_cmd) { in sdhci_request_done()
3021 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3026 if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) in sdhci_request_done()
3028 host->ops->set_clock(host, host->clock); in sdhci_request_done()
3037 host->pending_reset = false; in sdhci_request_done()
3045 if (host->flags & SDHCI_REQ_USE_DMA) { in sdhci_request_done()
3046 struct mmc_data *data = mrq->data; in sdhci_request_done()
3048 if (host->use_external_dma && data && in sdhci_request_done()
3049 (mrq->cmd->error || data->error)) { in sdhci_request_done()
3052 host->mrqs_done[i] = NULL; in sdhci_request_done()
3053 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3055 spin_lock_irqsave(&host->lock, flags); in sdhci_request_done()
3059 if (data && data->host_cookie == COOKIE_MAPPED) { in sdhci_request_done()
3060 if (host->bounce_buffer) { in sdhci_request_done()
3066 unsigned int length = data->bytes_xfered; in sdhci_request_done()
3068 if (length > host->bounce_buffer_size) { in sdhci_request_done()
3070 mmc_hostname(host->mmc), in sdhci_request_done()
3071 host->bounce_buffer_size, in sdhci_request_done()
3072 data->bytes_xfered); in sdhci_request_done()
3074 length = host->bounce_buffer_size; in sdhci_request_done()
3077 mmc_dev(host->mmc), in sdhci_request_done()
3078 host->bounce_addr, in sdhci_request_done()
3079 host->bounce_buffer_size, in sdhci_request_done()
3081 sg_copy_from_buffer(data->sg, in sdhci_request_done()
3082 data->sg_len, in sdhci_request_done()
3083 host->bounce_buffer, in sdhci_request_done()
3088 mmc_dev(host->mmc), in sdhci_request_done()
3089 host->bounce_addr, in sdhci_request_done()
3090 host->bounce_buffer_size, in sdhci_request_done()
3095 dma_unmap_sg(mmc_dev(host->mmc), data->sg, in sdhci_request_done()
3096 data->sg_len, in sdhci_request_done()
3099 data->host_cookie = COOKIE_UNMAPPED; in sdhci_request_done()
3103 host->mrqs_done[i] = NULL; in sdhci_request_done()
3105 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3107 if (host->ops->request_done) in sdhci_request_done()
3108 host->ops->request_done(host, mrq); in sdhci_request_done()
3110 mmc_request_done(host->mmc, mrq); in sdhci_request_done()
3131 spin_lock_irqsave(&host->lock, flags); in sdhci_timeout_timer()
3133 if (host->cmd && !sdhci_data_line_cmd(host->cmd)) { in sdhci_timeout_timer()
3135 mmc_hostname(host->mmc)); in sdhci_timeout_timer()
3138 host->cmd->error = -ETIMEDOUT; in sdhci_timeout_timer()
3139 sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_timeout_timer()
3142 spin_unlock_irqrestore(&host->lock, flags); in sdhci_timeout_timer()
3152 spin_lock_irqsave(&host->lock, flags); in sdhci_timeout_data_timer()
3154 if (host->data || host->data_cmd || in sdhci_timeout_data_timer()
3155 (host->cmd && sdhci_data_line_cmd(host->cmd))) { in sdhci_timeout_data_timer()
3157 mmc_hostname(host->mmc)); in sdhci_timeout_data_timer()
3160 if (host->data) { in sdhci_timeout_data_timer()
3161 host->data->error = -ETIMEDOUT; in sdhci_timeout_data_timer()
3163 queue_work(host->complete_wq, &host->complete_work); in sdhci_timeout_data_timer()
3164 } else if (host->data_cmd) { in sdhci_timeout_data_timer()
3165 host->data_cmd->error = -ETIMEDOUT; in sdhci_timeout_data_timer()
3166 sdhci_finish_mrq(host, host->data_cmd->mrq); in sdhci_timeout_data_timer()
3168 host->cmd->error = -ETIMEDOUT; in sdhci_timeout_data_timer()
3169 sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_timeout_data_timer()
3173 spin_unlock_irqrestore(&host->lock, flags); in sdhci_timeout_data_timer()
3184 /* Handle auto-CMD12 error */ in sdhci_cmd_irq()
3185 if (intmask & SDHCI_INT_AUTO_CMD_ERR && host->data_cmd) { in sdhci_cmd_irq()
3186 struct mmc_request *mrq = host->data_cmd->mrq; in sdhci_cmd_irq()
3192 /* Treat auto-CMD12 error the same as data error */ in sdhci_cmd_irq()
3193 if (!mrq->sbc && (host->flags & SDHCI_AUTO_CMD12)) { in sdhci_cmd_irq()
3199 if (!host->cmd) { in sdhci_cmd_irq()
3205 if (host->pending_reset) in sdhci_cmd_irq()
3208 mmc_hostname(host->mmc), (unsigned)intmask); in sdhci_cmd_irq()
3216 host->cmd->error = -ETIMEDOUT; in sdhci_cmd_irq()
3218 host->cmd->error = -EILSEQ; in sdhci_cmd_irq()
3221 if (host->cmd->data && in sdhci_cmd_irq()
3224 host->cmd = NULL; in sdhci_cmd_irq()
3229 __sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_cmd_irq()
3233 /* Handle auto-CMD23 error */ in sdhci_cmd_irq()
3235 struct mmc_request *mrq = host->cmd->mrq; in sdhci_cmd_irq()
3238 -ETIMEDOUT : in sdhci_cmd_irq()
3239 -EILSEQ; in sdhci_cmd_irq()
3241 if (mrq->sbc && (host->flags & SDHCI_AUTO_CMD23)) { in sdhci_cmd_irq()
3242 mrq->sbc->error = err; in sdhci_cmd_irq()
3254 void *desc = host->adma_table; in sdhci_adma_show_error()
3255 dma_addr_t dma = host->adma_addr; in sdhci_adma_show_error()
3262 if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_adma_show_error()
3265 le32_to_cpu(dma_desc->addr_hi), in sdhci_adma_show_error()
3266 le32_to_cpu(dma_desc->addr_lo), in sdhci_adma_show_error()
3267 le16_to_cpu(dma_desc->len), in sdhci_adma_show_error()
3268 le16_to_cpu(dma_desc->cmd)); in sdhci_adma_show_error()
3272 le32_to_cpu(dma_desc->addr_lo), in sdhci_adma_show_error()
3273 le16_to_cpu(dma_desc->len), in sdhci_adma_show_error()
3274 le16_to_cpu(dma_desc->cmd)); in sdhci_adma_show_error()
3276 desc += host->desc_sz; in sdhci_adma_show_error()
3277 dma += host->desc_sz; in sdhci_adma_show_error()
3279 if (dma_desc->cmd & cpu_to_le16(ADMA2_END)) in sdhci_adma_show_error()
3295 if (intmask & SDHCI_INT_DATA_AVAIL && !host->data) { in sdhci_data_irq()
3299 host->tuning_done = 1; in sdhci_data_irq()
3300 wake_up(&host->buf_ready_int); in sdhci_data_irq()
3305 if (!host->data) { in sdhci_data_irq()
3306 struct mmc_command *data_cmd = host->data_cmd; in sdhci_data_irq()
3313 if (data_cmd && (data_cmd->flags & MMC_RSP_BUSY)) { in sdhci_data_irq()
3315 host->data_cmd = NULL; in sdhci_data_irq()
3316 data_cmd->error = -ETIMEDOUT; in sdhci_data_irq()
3317 __sdhci_finish_mrq(host, data_cmd->mrq); in sdhci_data_irq()
3321 host->data_cmd = NULL; in sdhci_data_irq()
3323 * Some cards handle busy-end interrupt in sdhci_data_irq()
3327 if (host->cmd == data_cmd) in sdhci_data_irq()
3330 __sdhci_finish_mrq(host, data_cmd->mrq); in sdhci_data_irq()
3340 if (host->pending_reset) in sdhci_data_irq()
3344 mmc_hostname(host->mmc), (unsigned)intmask); in sdhci_data_irq()
3351 host->data->error = -ETIMEDOUT; in sdhci_data_irq()
3353 host->data->error = -EILSEQ; in sdhci_data_irq()
3357 host->data->error = -EILSEQ; in sdhci_data_irq()
3359 pr_err("%s: ADMA error: 0x%08x\n", mmc_hostname(host->mmc), in sdhci_data_irq()
3362 host->data->error = -EIO; in sdhci_data_irq()
3363 if (host->ops->adma_workaround) in sdhci_data_irq()
3364 host->ops->adma_workaround(host, intmask); in sdhci_data_irq()
3367 if (host->data->error) in sdhci_data_irq()
3386 dmanow = dmastart + host->data->bytes_xfered; in sdhci_data_irq()
3391 ~((dma_addr_t)SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) + in sdhci_data_irq()
3393 host->data->bytes_xfered = dmanow - dmastart; in sdhci_data_irq()
3395 &dmastart, host->data->bytes_xfered, &dmanow); in sdhci_data_irq()
3400 if (host->cmd == host->data_cmd) { in sdhci_data_irq()
3406 host->data_early = 1; in sdhci_data_irq()
3417 struct mmc_data *data = mrq->data; in sdhci_defer_done()
3419 return host->pending_reset || host->always_defer_done || in sdhci_defer_done()
3420 ((host->flags & SDHCI_REQ_USE_DMA) && data && in sdhci_defer_done()
3421 data->host_cookie == COOKIE_MAPPED); in sdhci_defer_done()
3433 spin_lock(&host->lock); in sdhci_irq()
3435 if (host->runtime_suspended) { in sdhci_irq()
3436 spin_unlock(&host->lock); in sdhci_irq()
3449 if (host->ops->irq) { in sdhci_irq()
3450 intmask = host->ops->irq(host, intmask); in sdhci_irq()
3475 host->ier &= ~(SDHCI_INT_CARD_INSERT | in sdhci_irq()
3477 host->ier |= present ? SDHCI_INT_CARD_REMOVE : in sdhci_irq()
3479 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_irq()
3480 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_irq()
3485 host->thread_isr |= intmask & (SDHCI_INT_CARD_INSERT | in sdhci_irq()
3498 mmc_hostname(host->mmc)); in sdhci_irq()
3501 mmc_retune_needed(host->mmc); in sdhci_irq()
3504 (host->ier & SDHCI_INT_CARD_INT)) { in sdhci_irq()
3506 sdio_signal_irq(host->mmc); in sdhci_irq()
3523 } while (intmask && --max_loops); in sdhci_irq()
3527 struct mmc_request *mrq = host->mrqs_done[i]; in sdhci_irq()
3536 host->mrqs_done[i] = NULL; in sdhci_irq()
3540 if (host->deferred_cmd) in sdhci_irq()
3543 spin_unlock(&host->lock); in sdhci_irq()
3550 if (host->ops->request_done) in sdhci_irq()
3551 host->ops->request_done(host, mrqs_done[i]); in sdhci_irq()
3553 mmc_request_done(host->mmc, mrqs_done[i]); in sdhci_irq()
3558 mmc_hostname(host->mmc), unexpected); in sdhci_irq()
3575 spin_lock_irqsave(&host->lock, flags); in sdhci_thread_irq()
3577 isr = host->thread_isr; in sdhci_thread_irq()
3578 host->thread_isr = 0; in sdhci_thread_irq()
3580 cmd = host->deferred_cmd; in sdhci_thread_irq()
3582 sdhci_finish_mrq(host, cmd->mrq); in sdhci_thread_irq()
3584 spin_unlock_irqrestore(&host->lock, flags); in sdhci_thread_irq()
3587 struct mmc_host *mmc = host->mmc; in sdhci_thread_irq()
3589 mmc->ops->card_event(mmc); in sdhci_thread_irq()
3606 return mmc_card_is_removable(host->mmc) && in sdhci_cd_irq_can_wakeup()
3607 !(host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && in sdhci_cd_irq_can_wakeup()
3608 !mmc_can_gpio_cd(host->mmc); in sdhci_cd_irq_can_wakeup()
3613 * the Interrupt Status Enable register too. See 'Table 1-6: Wakeup Signal
3632 if (mmc_card_wake_sdio_irq(host->mmc)) { in sdhci_enable_irq_wakeups()
3647 host->irq_wake_enabled = !enable_irq_wake(host->irq); in sdhci_enable_irq_wakeups()
3649 return host->irq_wake_enabled; in sdhci_enable_irq_wakeups()
3662 disable_irq_wake(host->irq); in sdhci_disable_irq_wakeups()
3664 host->irq_wake_enabled = false; in sdhci_disable_irq_wakeups()
3671 mmc_retune_timer_stop(host->mmc); in sdhci_suspend_host()
3673 if (!device_may_wakeup(mmc_dev(host->mmc)) || in sdhci_suspend_host()
3675 host->ier = 0; in sdhci_suspend_host()
3678 free_irq(host->irq, host); in sdhci_suspend_host()
3688 struct mmc_host *mmc = host->mmc; in sdhci_resume_host()
3691 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_resume_host()
3692 if (host->ops->enable_dma) in sdhci_resume_host()
3693 host->ops->enable_dma(host); in sdhci_resume_host()
3696 if ((mmc->pm_flags & MMC_PM_KEEP_POWER) && in sdhci_resume_host()
3697 (host->quirks2 & SDHCI_QUIRK2_HOST_OFF_CARD_ON)) { in sdhci_resume_host()
3700 host->pwr = 0; in sdhci_resume_host()
3701 host->clock = 0; in sdhci_resume_host()
3702 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_resume_host()
3704 sdhci_init(host, (mmc->pm_flags & MMC_PM_KEEP_POWER)); in sdhci_resume_host()
3707 if (host->irq_wake_enabled) { in sdhci_resume_host()
3710 ret = request_threaded_irq(host->irq, sdhci_irq, in sdhci_resume_host()
3728 mmc_retune_timer_stop(host->mmc); in sdhci_runtime_suspend_host()
3730 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_suspend_host()
3731 host->ier &= SDHCI_INT_CARD_INT; in sdhci_runtime_suspend_host()
3732 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_runtime_suspend_host()
3733 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_runtime_suspend_host()
3734 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_suspend_host()
3736 synchronize_hardirq(host->irq); in sdhci_runtime_suspend_host()
3738 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_suspend_host()
3739 host->runtime_suspended = true; in sdhci_runtime_suspend_host()
3740 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_suspend_host()
3748 struct mmc_host *mmc = host->mmc; in sdhci_runtime_resume_host()
3750 int host_flags = host->flags; in sdhci_runtime_resume_host()
3753 if (host->ops->enable_dma) in sdhci_runtime_resume_host()
3754 host->ops->enable_dma(host); in sdhci_runtime_resume_host()
3759 if (mmc->ios.power_mode != MMC_POWER_UNDEFINED && in sdhci_runtime_resume_host()
3760 mmc->ios.power_mode != MMC_POWER_OFF) { in sdhci_runtime_resume_host()
3761 /* Force clock and power re-program */ in sdhci_runtime_resume_host()
3762 host->pwr = 0; in sdhci_runtime_resume_host()
3763 host->clock = 0; in sdhci_runtime_resume_host()
3764 mmc->ops->start_signal_voltage_switch(mmc, &mmc->ios); in sdhci_runtime_resume_host()
3765 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_runtime_resume_host()
3768 !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) { in sdhci_runtime_resume_host()
3769 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_resume_host()
3771 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_resume_host()
3774 if ((mmc->caps2 & MMC_CAP2_HS400_ES) && in sdhci_runtime_resume_host()
3775 mmc->ops->hs400_enhanced_strobe) in sdhci_runtime_resume_host()
3776 mmc->ops->hs400_enhanced_strobe(mmc, &mmc->ios); in sdhci_runtime_resume_host()
3779 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_resume_host()
3781 host->runtime_suspended = false; in sdhci_runtime_resume_host()
3790 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_resume_host()
3810 spin_lock_irqsave(&host->lock, flags); in sdhci_cqe_enable()
3819 if (host->v4_mode && (host->caps1 & SDHCI_CAN_DO_ADMA3)) in sdhci_cqe_enable()
3821 else if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_cqe_enable()
3827 sdhci_writew(host, SDHCI_MAKE_BLKSZ(host->sdma_boundary, 512), in sdhci_cqe_enable()
3833 host->ier = host->cqe_ier; in sdhci_cqe_enable()
3835 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_cqe_enable()
3836 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_cqe_enable()
3838 host->cqe_on = true; in sdhci_cqe_enable()
3841 mmc_hostname(mmc), host->ier, in sdhci_cqe_enable()
3844 spin_unlock_irqrestore(&host->lock, flags); in sdhci_cqe_enable()
3853 spin_lock_irqsave(&host->lock, flags); in sdhci_cqe_disable()
3857 host->cqe_on = false; in sdhci_cqe_disable()
3865 mmc_hostname(mmc), host->ier, in sdhci_cqe_disable()
3868 spin_unlock_irqrestore(&host->lock, flags); in sdhci_cqe_disable()
3877 if (!host->cqe_on) in sdhci_cqe_irq()
3881 *cmd_error = -EILSEQ; in sdhci_cqe_irq()
3883 *cmd_error = -ETIMEDOUT; in sdhci_cqe_irq()
3888 *data_error = -EILSEQ; in sdhci_cqe_irq()
3890 *data_error = -ETIMEDOUT; in sdhci_cqe_irq()
3892 *data_error = -EIO; in sdhci_cqe_irq()
3897 mask = intmask & host->cqe_ier; in sdhci_cqe_irq()
3902 mmc_hostname(host->mmc)); in sdhci_cqe_irq()
3904 intmask &= ~(host->cqe_ier | SDHCI_INT_ERROR); in sdhci_cqe_irq()
3908 mmc_hostname(host->mmc), intmask); in sdhci_cqe_irq()
3932 return ERR_PTR(-ENOMEM); in sdhci_alloc_host()
3935 host->mmc = mmc; in sdhci_alloc_host()
3936 host->mmc_host_ops = sdhci_ops; in sdhci_alloc_host()
3937 mmc->ops = &host->mmc_host_ops; in sdhci_alloc_host()
3939 host->flags = SDHCI_SIGNALING_330; in sdhci_alloc_host()
3941 host->cqe_ier = SDHCI_CQE_INT_MASK; in sdhci_alloc_host()
3942 host->cqe_err_ier = SDHCI_CQE_INT_ERR_MASK; in sdhci_alloc_host()
3944 host->tuning_delay = -1; in sdhci_alloc_host()
3945 host->tuning_loop_count = MAX_TUNING_LOOP; in sdhci_alloc_host()
3947 host->sdma_boundary = SDHCI_DEFAULT_BOUNDARY_ARG; in sdhci_alloc_host()
3954 host->adma_table_cnt = SDHCI_MAX_SEGS * 2 + 1; in sdhci_alloc_host()
3956 host->max_timeout_count = 0xE; in sdhci_alloc_host()
3965 struct mmc_host *mmc = host->mmc; in sdhci_set_dma_mask()
3967 int ret = -EINVAL; in sdhci_set_dma_mask()
3969 if (host->quirks2 & SDHCI_QUIRK2_BROKEN_64_BIT_DMA) in sdhci_set_dma_mask()
3970 host->flags &= ~SDHCI_USE_64_BIT_DMA; in sdhci_set_dma_mask()
3972 /* Try 64-bit mask if hardware is capable of it */ in sdhci_set_dma_mask()
3973 if (host->flags & SDHCI_USE_64_BIT_DMA) { in sdhci_set_dma_mask()
3976 pr_warn("%s: Failed to set 64-bit DMA mask.\n", in sdhci_set_dma_mask()
3978 host->flags &= ~SDHCI_USE_64_BIT_DMA; in sdhci_set_dma_mask()
3982 /* 32-bit mask as default & fallback */ in sdhci_set_dma_mask()
3986 pr_warn("%s: Failed to set 32-bit DMA mask.\n", in sdhci_set_dma_mask()
4000 if (host->read_caps) in __sdhci_read_caps()
4003 host->read_caps = true; in __sdhci_read_caps()
4006 host->quirks = debug_quirks; in __sdhci_read_caps()
4009 host->quirks2 = debug_quirks2; in __sdhci_read_caps()
4013 if (host->v4_mode) in __sdhci_read_caps()
4016 device_property_read_u64(mmc_dev(host->mmc), in __sdhci_read_caps()
4017 "sdhci-caps-mask", &dt_caps_mask); in __sdhci_read_caps()
4018 device_property_read_u64(mmc_dev(host->mmc), in __sdhci_read_caps()
4019 "sdhci-caps", &dt_caps); in __sdhci_read_caps()
4022 host->version = (v & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT; in __sdhci_read_caps()
4024 if (host->quirks & SDHCI_QUIRK_MISSING_CAPS) in __sdhci_read_caps()
4028 host->caps = *caps; in __sdhci_read_caps()
4030 host->caps = sdhci_readl(host, SDHCI_CAPABILITIES); in __sdhci_read_caps()
4031 host->caps &= ~lower_32_bits(dt_caps_mask); in __sdhci_read_caps()
4032 host->caps |= lower_32_bits(dt_caps); in __sdhci_read_caps()
4035 if (host->version < SDHCI_SPEC_300) in __sdhci_read_caps()
4039 host->caps1 = *caps1; in __sdhci_read_caps()
4041 host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); in __sdhci_read_caps()
4042 host->caps1 &= ~upper_32_bits(dt_caps_mask); in __sdhci_read_caps()
4043 host->caps1 |= upper_32_bits(dt_caps); in __sdhci_read_caps()
4050 struct mmc_host *mmc = host->mmc; in sdhci_allocate_bounce_buffer()
4066 if (mmc->max_req_size < bounce_size) in sdhci_allocate_bounce_buffer()
4067 bounce_size = mmc->max_req_size; in sdhci_allocate_bounce_buffer()
4075 host->bounce_buffer = devm_kmalloc(mmc_dev(mmc), in sdhci_allocate_bounce_buffer()
4078 if (!host->bounce_buffer) { in sdhci_allocate_bounce_buffer()
4084 * mmc->max_segs == 1. in sdhci_allocate_bounce_buffer()
4089 host->bounce_addr = dma_map_single(mmc_dev(mmc), in sdhci_allocate_bounce_buffer()
4090 host->bounce_buffer, in sdhci_allocate_bounce_buffer()
4093 ret = dma_mapping_error(mmc_dev(mmc), host->bounce_addr); in sdhci_allocate_bounce_buffer()
4095 devm_kfree(mmc_dev(mmc), host->bounce_buffer); in sdhci_allocate_bounce_buffer()
4096 host->bounce_buffer = NULL; in sdhci_allocate_bounce_buffer()
4101 host->bounce_buffer_size = bounce_size; in sdhci_allocate_bounce_buffer()
4104 mmc->max_segs = max_blocks; in sdhci_allocate_bounce_buffer()
4105 mmc->max_seg_size = bounce_size; in sdhci_allocate_bounce_buffer()
4106 mmc->max_req_size = bounce_size; in sdhci_allocate_bounce_buffer()
4116 * version 4.10 in Capabilities Register is used as 64-bit System in sdhci_can_64bit_dma()
4119 if (host->version >= SDHCI_SPEC_410 && host->v4_mode) in sdhci_can_64bit_dma()
4120 return host->caps & SDHCI_CAN_64BIT_V4; in sdhci_can_64bit_dma()
4122 return host->caps & SDHCI_CAN_64BIT; in sdhci_can_64bit_dma()
4137 return -EINVAL; in sdhci_setup_host()
4139 mmc = host->mmc; in sdhci_setup_host()
4147 if (!mmc->supply.vqmmc) { in sdhci_setup_host()
4163 override_timeout_clk = host->timeout_clk; in sdhci_setup_host()
4165 if (host->version > SDHCI_SPEC_420) { in sdhci_setup_host()
4167 mmc_hostname(mmc), host->version); in sdhci_setup_host()
4170 if (host->quirks & SDHCI_QUIRK_FORCE_DMA) in sdhci_setup_host()
4171 host->flags |= SDHCI_USE_SDMA; in sdhci_setup_host()
4172 else if (!(host->caps & SDHCI_CAN_DO_SDMA)) in sdhci_setup_host()
4175 host->flags |= SDHCI_USE_SDMA; in sdhci_setup_host()
4177 if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) && in sdhci_setup_host()
4178 (host->flags & SDHCI_USE_SDMA)) { in sdhci_setup_host()
4180 host->flags &= ~SDHCI_USE_SDMA; in sdhci_setup_host()
4183 if ((host->version >= SDHCI_SPEC_200) && in sdhci_setup_host()
4184 (host->caps & SDHCI_CAN_DO_ADMA2)) in sdhci_setup_host()
4185 host->flags |= SDHCI_USE_ADMA; in sdhci_setup_host()
4187 if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) && in sdhci_setup_host()
4188 (host->flags & SDHCI_USE_ADMA)) { in sdhci_setup_host()
4190 host->flags &= ~SDHCI_USE_ADMA; in sdhci_setup_host()
4194 host->flags |= SDHCI_USE_64_BIT_DMA; in sdhci_setup_host()
4196 if (host->use_external_dma) { in sdhci_setup_host()
4198 if (ret == -EPROBE_DEFER) in sdhci_setup_host()
4208 host->flags &= ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); in sdhci_setup_host()
4211 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_setup_host()
4212 if (host->ops->set_dma_mask) in sdhci_setup_host()
4213 ret = host->ops->set_dma_mask(host); in sdhci_setup_host()
4217 if (!ret && host->ops->enable_dma) in sdhci_setup_host()
4218 ret = host->ops->enable_dma(host); in sdhci_setup_host()
4221 pr_warn("%s: No suitable DMA available - falling back to PIO\n", in sdhci_setup_host()
4223 host->flags &= ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); in sdhci_setup_host()
4229 /* SDMA does not support 64-bit DMA if v4 mode not set */ in sdhci_setup_host()
4230 if ((host->flags & SDHCI_USE_64_BIT_DMA) && !host->v4_mode) in sdhci_setup_host()
4231 host->flags &= ~SDHCI_USE_SDMA; in sdhci_setup_host()
4233 if (host->flags & SDHCI_USE_ADMA) { in sdhci_setup_host()
4237 if (!(host->flags & SDHCI_USE_64_BIT_DMA)) in sdhci_setup_host()
4238 host->alloc_desc_sz = SDHCI_ADMA2_32_DESC_SZ; in sdhci_setup_host()
4239 else if (!host->alloc_desc_sz) in sdhci_setup_host()
4240 host->alloc_desc_sz = SDHCI_ADMA2_64_DESC_SZ(host); in sdhci_setup_host()
4242 host->desc_sz = host->alloc_desc_sz; in sdhci_setup_host()
4243 host->adma_table_sz = host->adma_table_cnt * host->desc_sz; in sdhci_setup_host()
4245 host->align_buffer_sz = SDHCI_MAX_SEGS * SDHCI_ADMA2_ALIGN; in sdhci_setup_host()
4247 * Use zalloc to zero the reserved high 32-bits of 128-bit in sdhci_setup_host()
4251 host->align_buffer_sz + host->adma_table_sz, in sdhci_setup_host()
4254 pr_warn("%s: Unable to allocate ADMA buffers - falling back to standard DMA\n", in sdhci_setup_host()
4256 host->flags &= ~SDHCI_USE_ADMA; in sdhci_setup_host()
4257 } else if ((dma + host->align_buffer_sz) & in sdhci_setup_host()
4258 (SDHCI_ADMA2_DESC_ALIGN - 1)) { in sdhci_setup_host()
4261 host->flags &= ~SDHCI_USE_ADMA; in sdhci_setup_host()
4262 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_setup_host()
4263 host->adma_table_sz, buf, dma); in sdhci_setup_host()
4265 host->align_buffer = buf; in sdhci_setup_host()
4266 host->align_addr = dma; in sdhci_setup_host()
4268 host->adma_table = buf + host->align_buffer_sz; in sdhci_setup_host()
4269 host->adma_addr = dma + host->align_buffer_sz; in sdhci_setup_host()
4278 if (!(host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA))) { in sdhci_setup_host()
4279 host->dma_mask = DMA_BIT_MASK(64); in sdhci_setup_host()
4280 mmc_dev(mmc)->dma_mask = &host->dma_mask; in sdhci_setup_host()
4283 if (host->version >= SDHCI_SPEC_300) in sdhci_setup_host()
4284 host->max_clk = FIELD_GET(SDHCI_CLOCK_V3_BASE_MASK, host->caps); in sdhci_setup_host()
4286 host->max_clk = FIELD_GET(SDHCI_CLOCK_BASE_MASK, host->caps); in sdhci_setup_host()
4288 host->max_clk *= 1000000; in sdhci_setup_host()
4289 if (host->max_clk == 0 || host->quirks & in sdhci_setup_host()
4291 if (!host->ops->get_max_clock) { in sdhci_setup_host()
4294 ret = -ENODEV; in sdhci_setup_host()
4297 host->max_clk = host->ops->get_max_clock(host); in sdhci_setup_host()
4304 host->clk_mul = FIELD_GET(SDHCI_CLOCK_MUL_MASK, host->caps1); in sdhci_setup_host()
4312 if (host->clk_mul) in sdhci_setup_host()
4313 host->clk_mul += 1; in sdhci_setup_host()
4318 max_clk = host->max_clk; in sdhci_setup_host()
4320 if (host->ops->get_min_clock) in sdhci_setup_host()
4321 mmc->f_min = host->ops->get_min_clock(host); in sdhci_setup_host()
4322 else if (host->version >= SDHCI_SPEC_300) { in sdhci_setup_host()
4323 if (host->clk_mul) in sdhci_setup_host()
4324 max_clk = host->max_clk * host->clk_mul; in sdhci_setup_host()
4329 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300; in sdhci_setup_host()
4331 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200; in sdhci_setup_host()
4333 if (!mmc->f_max || mmc->f_max > max_clk) in sdhci_setup_host()
4334 mmc->f_max = max_clk; in sdhci_setup_host()
4336 if (!(host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) { in sdhci_setup_host()
4337 host->timeout_clk = FIELD_GET(SDHCI_TIMEOUT_CLK_MASK, host->caps); in sdhci_setup_host()
4339 if (host->caps & SDHCI_TIMEOUT_CLK_UNIT) in sdhci_setup_host()
4340 host->timeout_clk *= 1000; in sdhci_setup_host()
4342 if (host->timeout_clk == 0) { in sdhci_setup_host()
4343 if (!host->ops->get_timeout_clock) { in sdhci_setup_host()
4346 ret = -ENODEV; in sdhci_setup_host()
4350 host->timeout_clk = in sdhci_setup_host()
4351 DIV_ROUND_UP(host->ops->get_timeout_clock(host), in sdhci_setup_host()
4356 host->timeout_clk = override_timeout_clk; in sdhci_setup_host()
4358 mmc->max_busy_timeout = host->ops->get_max_timeout_count ? in sdhci_setup_host()
4359 host->ops->get_max_timeout_count(host) : 1 << 27; in sdhci_setup_host()
4360 mmc->max_busy_timeout /= host->timeout_clk; in sdhci_setup_host()
4363 if (host->quirks2 & SDHCI_QUIRK2_DISABLE_HW_TIMEOUT && in sdhci_setup_host()
4364 !host->ops->get_max_timeout_count) in sdhci_setup_host()
4365 mmc->max_busy_timeout = 0; in sdhci_setup_host()
4367 mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_CMD23; in sdhci_setup_host()
4368 mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD; in sdhci_setup_host()
4370 if (host->quirks & SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12) in sdhci_setup_host()
4371 host->flags |= SDHCI_AUTO_CMD12; in sdhci_setup_host()
4374 * For v3 mode, Auto-CMD23 stuff only works in ADMA or PIO. in sdhci_setup_host()
4375 * For v4 mode, SDMA may use Auto-CMD23 as well. in sdhci_setup_host()
4377 if ((host->version >= SDHCI_SPEC_300) && in sdhci_setup_host()
4378 ((host->flags & SDHCI_USE_ADMA) || in sdhci_setup_host()
4379 !(host->flags & SDHCI_USE_SDMA) || host->v4_mode) && in sdhci_setup_host()
4380 !(host->quirks2 & SDHCI_QUIRK2_ACMD23_BROKEN)) { in sdhci_setup_host()
4381 host->flags |= SDHCI_AUTO_CMD23; in sdhci_setup_host()
4382 DBG("Auto-CMD23 available\n"); in sdhci_setup_host()
4384 DBG("Auto-CMD23 unavailable\n"); in sdhci_setup_host()
4388 * A controller may support 8-bit width, but the board itself in sdhci_setup_host()
4390 * 8-bit width must set "mmc->caps |= MMC_CAP_8_BIT_DATA;" in in sdhci_setup_host()
4392 * won't assume 8-bit width for hosts without that CAP. in sdhci_setup_host()
4394 if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) in sdhci_setup_host()
4395 mmc->caps |= MMC_CAP_4_BIT_DATA; in sdhci_setup_host()
4397 if (host->quirks2 & SDHCI_QUIRK2_HOST_NO_CMD23) in sdhci_setup_host()
4398 mmc->caps &= ~MMC_CAP_CMD23; in sdhci_setup_host()
4400 if (host->caps & SDHCI_CAN_DO_HISPD) in sdhci_setup_host()
4401 mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; in sdhci_setup_host()
4403 if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && in sdhci_setup_host()
4406 mmc->caps |= MMC_CAP_NEEDS_POLL; in sdhci_setup_host()
4408 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_setup_host()
4410 ret = regulator_enable(mmc->supply.vqmmc); in sdhci_setup_host()
4411 host->sdhci_core_to_disable_vqmmc = !ret; in sdhci_setup_host()
4415 if (!regulator_is_supported_voltage(mmc->supply.vqmmc, 1700000, in sdhci_setup_host()
4417 host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | in sdhci_setup_host()
4422 if (!regulator_is_supported_voltage(mmc->supply.vqmmc, 2700000, in sdhci_setup_host()
4424 host->flags &= ~SDHCI_SIGNALING_330; in sdhci_setup_host()
4429 mmc->supply.vqmmc = ERR_PTR(-EINVAL); in sdhci_setup_host()
4434 if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V) { in sdhci_setup_host()
4435 host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | in sdhci_setup_host()
4439 * (indicated using mmc-hs200-1_8v/mmc-hs400-1_8v dt property), in sdhci_setup_host()
4445 mmc->caps2 &= ~(MMC_CAP2_HSX00_1_8V | MMC_CAP2_HS400_ES); in sdhci_setup_host()
4446 mmc->caps &= ~(MMC_CAP_1_8V_DDR | MMC_CAP_UHS); in sdhci_setup_host()
4449 /* Any UHS-I mode in caps implies SDR12 and SDR25 support. */ in sdhci_setup_host()
4450 if (host->caps1 & (SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | in sdhci_setup_host()
4452 mmc->caps |= MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25; in sdhci_setup_host()
4455 if (host->caps1 & SDHCI_SUPPORT_SDR104) { in sdhci_setup_host()
4456 mmc->caps |= MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_SDR50; in sdhci_setup_host()
4460 if (!(host->quirks2 & SDHCI_QUIRK2_BROKEN_HS200)) in sdhci_setup_host()
4461 mmc->caps2 |= MMC_CAP2_HS200; in sdhci_setup_host()
4462 } else if (host->caps1 & SDHCI_SUPPORT_SDR50) { in sdhci_setup_host()
4463 mmc->caps |= MMC_CAP_UHS_SDR50; in sdhci_setup_host()
4466 if (host->quirks2 & SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 && in sdhci_setup_host()
4467 (host->caps1 & SDHCI_SUPPORT_HS400)) in sdhci_setup_host()
4468 mmc->caps2 |= MMC_CAP2_HS400; in sdhci_setup_host()
4470 if ((mmc->caps2 & MMC_CAP2_HSX00_1_2V) && in sdhci_setup_host()
4471 (IS_ERR(mmc->supply.vqmmc) || in sdhci_setup_host()
4472 !regulator_is_supported_voltage(mmc->supply.vqmmc, 1100000, in sdhci_setup_host()
4474 mmc->caps2 &= ~MMC_CAP2_HSX00_1_2V; in sdhci_setup_host()
4476 if ((host->caps1 & SDHCI_SUPPORT_DDR50) && in sdhci_setup_host()
4477 !(host->quirks2 & SDHCI_QUIRK2_BROKEN_DDR50)) in sdhci_setup_host()
4478 mmc->caps |= MMC_CAP_UHS_DDR50; in sdhci_setup_host()
4481 if (host->caps1 & SDHCI_USE_SDR50_TUNING) in sdhci_setup_host()
4482 host->flags |= SDHCI_SDR50_NEEDS_TUNING; in sdhci_setup_host()
4485 if (host->caps1 & SDHCI_DRIVER_TYPE_A) in sdhci_setup_host()
4486 mmc->caps |= MMC_CAP_DRIVER_TYPE_A; in sdhci_setup_host()
4487 if (host->caps1 & SDHCI_DRIVER_TYPE_C) in sdhci_setup_host()
4488 mmc->caps |= MMC_CAP_DRIVER_TYPE_C; in sdhci_setup_host()
4489 if (host->caps1 & SDHCI_DRIVER_TYPE_D) in sdhci_setup_host()
4490 mmc->caps |= MMC_CAP_DRIVER_TYPE_D; in sdhci_setup_host()
4492 /* Initial value for re-tuning timer count */ in sdhci_setup_host()
4493 host->tuning_count = FIELD_GET(SDHCI_RETUNING_TIMER_COUNT_MASK, in sdhci_setup_host()
4494 host->caps1); in sdhci_setup_host()
4497 * In case Re-tuning Timer is not disabled, the actual value of in sdhci_setup_host()
4498 * re-tuning timer will be 2 ^ (n - 1). in sdhci_setup_host()
4500 if (host->tuning_count) in sdhci_setup_host()
4501 host->tuning_count = 1 << (host->tuning_count - 1); in sdhci_setup_host()
4503 /* Re-tuning mode supported by the Host Controller */ in sdhci_setup_host()
4504 host->tuning_mode = FIELD_GET(SDHCI_RETUNING_MODE_MASK, host->caps1); in sdhci_setup_host()
4516 if (!max_current_caps && !IS_ERR(mmc->supply.vmmc)) { in sdhci_setup_host()
4517 int curr = regulator_get_current_limit(mmc->supply.vmmc); in sdhci_setup_host()
4532 if (host->caps & SDHCI_CAN_VDD_330) { in sdhci_setup_host()
4535 mmc->max_current_330 = FIELD_GET(SDHCI_MAX_CURRENT_330_MASK, in sdhci_setup_host()
4539 if (host->caps & SDHCI_CAN_VDD_300) { in sdhci_setup_host()
4542 mmc->max_current_300 = FIELD_GET(SDHCI_MAX_CURRENT_300_MASK, in sdhci_setup_host()
4546 if (host->caps & SDHCI_CAN_VDD_180) { in sdhci_setup_host()
4549 mmc->max_current_180 = FIELD_GET(SDHCI_MAX_CURRENT_180_MASK, in sdhci_setup_host()
4555 if (host->ocr_mask) in sdhci_setup_host()
4556 ocr_avail = host->ocr_mask; in sdhci_setup_host()
4559 if (mmc->ocr_avail) in sdhci_setup_host()
4560 ocr_avail = mmc->ocr_avail; in sdhci_setup_host()
4562 mmc->ocr_avail = ocr_avail; in sdhci_setup_host()
4563 mmc->ocr_avail_sdio = ocr_avail; in sdhci_setup_host()
4564 if (host->ocr_avail_sdio) in sdhci_setup_host()
4565 mmc->ocr_avail_sdio &= host->ocr_avail_sdio; in sdhci_setup_host()
4566 mmc->ocr_avail_sd = ocr_avail; in sdhci_setup_host()
4567 if (host->ocr_avail_sd) in sdhci_setup_host()
4568 mmc->ocr_avail_sd &= host->ocr_avail_sd; in sdhci_setup_host()
4570 mmc->ocr_avail_sd &= ~MMC_VDD_165_195; in sdhci_setup_host()
4571 mmc->ocr_avail_mmc = ocr_avail; in sdhci_setup_host()
4572 if (host->ocr_avail_mmc) in sdhci_setup_host()
4573 mmc->ocr_avail_mmc &= host->ocr_avail_mmc; in sdhci_setup_host()
4575 if (mmc->ocr_avail == 0) { in sdhci_setup_host()
4578 ret = -ENODEV; in sdhci_setup_host()
4582 if ((mmc->caps & (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | in sdhci_setup_host()
4585 (mmc->caps2 & (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V))) in sdhci_setup_host()
4586 host->flags |= SDHCI_SIGNALING_180; in sdhci_setup_host()
4588 if (mmc->caps2 & MMC_CAP2_HSX00_1_2V) in sdhci_setup_host()
4589 host->flags |= SDHCI_SIGNALING_120; in sdhci_setup_host()
4591 spin_lock_init(&host->lock); in sdhci_setup_host()
4598 mmc->max_req_size = 524288; in sdhci_setup_host()
4604 if (host->flags & SDHCI_USE_ADMA) { in sdhci_setup_host()
4605 mmc->max_segs = SDHCI_MAX_SEGS; in sdhci_setup_host()
4606 } else if (host->flags & SDHCI_USE_SDMA) { in sdhci_setup_host()
4607 mmc->max_segs = 1; in sdhci_setup_host()
4608 mmc->max_req_size = min_t(size_t, mmc->max_req_size, in sdhci_setup_host()
4611 mmc->max_segs = SDHCI_MAX_SEGS; in sdhci_setup_host()
4619 if (host->flags & SDHCI_USE_ADMA) { in sdhci_setup_host()
4620 if (host->quirks & SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC) in sdhci_setup_host()
4621 mmc->max_seg_size = 65535; in sdhci_setup_host()
4623 mmc->max_seg_size = 65536; in sdhci_setup_host()
4625 mmc->max_seg_size = mmc->max_req_size; in sdhci_setup_host()
4632 if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) { in sdhci_setup_host()
4633 mmc->max_blk_size = 2; in sdhci_setup_host()
4635 mmc->max_blk_size = (host->caps & SDHCI_MAX_BLOCK_MASK) >> in sdhci_setup_host()
4637 if (mmc->max_blk_size >= 3) { in sdhci_setup_host()
4640 mmc->max_blk_size = 0; in sdhci_setup_host()
4644 mmc->max_blk_size = 512 << mmc->max_blk_size; in sdhci_setup_host()
4649 mmc->max_blk_count = (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535; in sdhci_setup_host()
4651 if (mmc->max_segs == 1) in sdhci_setup_host()
4652 /* This may alter mmc->*_blk_* parameters */ in sdhci_setup_host()
4658 if (host->sdhci_core_to_disable_vqmmc) in sdhci_setup_host()
4659 regulator_disable(mmc->supply.vqmmc); in sdhci_setup_host()
4661 if (host->align_buffer) in sdhci_setup_host()
4662 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_setup_host()
4663 host->adma_table_sz, host->align_buffer, in sdhci_setup_host()
4664 host->align_addr); in sdhci_setup_host()
4665 host->adma_table = NULL; in sdhci_setup_host()
4666 host->align_buffer = NULL; in sdhci_setup_host()
4674 struct mmc_host *mmc = host->mmc; in sdhci_cleanup_host()
4676 if (host->sdhci_core_to_disable_vqmmc) in sdhci_cleanup_host()
4677 regulator_disable(mmc->supply.vqmmc); in sdhci_cleanup_host()
4679 if (host->align_buffer) in sdhci_cleanup_host()
4680 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_cleanup_host()
4681 host->adma_table_sz, host->align_buffer, in sdhci_cleanup_host()
4682 host->align_addr); in sdhci_cleanup_host()
4684 if (host->use_external_dma) in sdhci_cleanup_host()
4687 host->adma_table = NULL; in sdhci_cleanup_host()
4688 host->align_buffer = NULL; in sdhci_cleanup_host()
4695 struct mmc_host *mmc = host->mmc; in __sdhci_add_host()
4698 if ((mmc->caps2 & MMC_CAP2_CQE) && in __sdhci_add_host()
4699 (host->quirks & SDHCI_QUIRK_BROKEN_CQE)) { in __sdhci_add_host()
4700 mmc->caps2 &= ~MMC_CAP2_CQE; in __sdhci_add_host()
4701 mmc->cqe_ops = NULL; in __sdhci_add_host()
4704 host->complete_wq = alloc_workqueue("sdhci", flags, 0); in __sdhci_add_host()
4705 if (!host->complete_wq) in __sdhci_add_host()
4706 return -ENOMEM; in __sdhci_add_host()
4708 INIT_WORK(&host->complete_work, sdhci_complete_work); in __sdhci_add_host()
4710 timer_setup(&host->timer, sdhci_timeout_timer, 0); in __sdhci_add_host()
4711 timer_setup(&host->data_timer, sdhci_timeout_data_timer, 0); in __sdhci_add_host()
4713 init_waitqueue_head(&host->buf_ready_int); in __sdhci_add_host()
4717 ret = request_threaded_irq(host->irq, sdhci_irq, sdhci_thread_irq, in __sdhci_add_host()
4721 mmc_hostname(mmc), host->irq, ret); in __sdhci_add_host()
4737 mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)), in __sdhci_add_host()
4738 host->use_external_dma ? "External DMA" : in __sdhci_add_host()
4739 (host->flags & SDHCI_USE_ADMA) ? in __sdhci_add_host()
4740 (host->flags & SDHCI_USE_64_BIT_DMA) ? "ADMA 64-bit" : "ADMA" : in __sdhci_add_host()
4741 (host->flags & SDHCI_USE_SDMA) ? "DMA" : "PIO"); in __sdhci_add_host()
4753 free_irq(host->irq, host); in __sdhci_add_host()
4755 destroy_workqueue(host->complete_wq); in __sdhci_add_host()
4784 struct mmc_host *mmc = host->mmc; in sdhci_remove_host()
4788 spin_lock_irqsave(&host->lock, flags); in sdhci_remove_host()
4790 host->flags |= SDHCI_DEVICE_DEAD; in sdhci_remove_host()
4795 sdhci_error_out_mrqs(host, -ENOMEDIUM); in sdhci_remove_host()
4798 spin_unlock_irqrestore(&host->lock, flags); in sdhci_remove_host()
4812 free_irq(host->irq, host); in sdhci_remove_host()
4814 del_timer_sync(&host->timer); in sdhci_remove_host()
4815 del_timer_sync(&host->data_timer); in sdhci_remove_host()
4817 destroy_workqueue(host->complete_wq); in sdhci_remove_host()
4819 if (host->sdhci_core_to_disable_vqmmc) in sdhci_remove_host()
4820 regulator_disable(mmc->supply.vqmmc); in sdhci_remove_host()
4822 if (host->align_buffer) in sdhci_remove_host()
4823 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_remove_host()
4824 host->adma_table_sz, host->align_buffer, in sdhci_remove_host()
4825 host->align_addr); in sdhci_remove_host()
4827 if (host->use_external_dma) in sdhci_remove_host()
4830 host->adma_table = NULL; in sdhci_remove_host()
4831 host->align_buffer = NULL; in sdhci_remove_host()
4838 mmc_free_host(host->mmc); in sdhci_free_host()