609 static void sdr_set_field(void __iomem *reg, u32 field, u32 val)  in sdr_set_field()  function
716 	sdr_set_field(host->base + MSDC_DMA_CFG, MSDC_DMA_CFG_DECSEN, 1);  in msdc_dma_setup()
722 		sdr_set_field(host->base + DMA_SA_H4BIT, DMA_ADDR_HIGH_4BIT,  in msdc_dma_setup()
786 	sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC,  in msdc_set_timeout()
795 	sdr_set_field(host->base + SDC_CFG, SDC_CFG_WRDTOC,  in msdc_set_busy_timeout()
902 		sdr_set_field(host->base + MSDC_CFG,  in msdc_set_mclk()
906 		sdr_set_field(host->base + MSDC_CFG,  in msdc_set_mclk()
956 		sdr_set_field(host->base + tune_reg,  in msdc_set_mclk()
1058 	sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_START, 1);  in msdc_start_data()
1383 		sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_STOP,  in msdc_data_xfer_done()
1644 		sdr_set_field(host->base + MSDC_PS, MSDC_PS_CDDEBOUNCE,  in msdc_init_hw()
1662 	sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0);  in msdc_init_hw()
1664 	sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);  in msdc_init_hw()
1669 		sdr_set_field(host->base + MSDC_PATCH_BIT1,  in msdc_init_hw()
1681 		sdr_set_field(host->base + MSDC_PATCH_BIT2,  in msdc_init_hw()
1691 			sdr_set_field(host->base + MSDC_PATCH_BIT2,  in msdc_init_hw()
1693 			sdr_set_field(host->base + MSDC_PATCH_BIT2,  in msdc_init_hw()
1739 	sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, 3);  in msdc_init_hw()
1915 		sdr_set_field(host->top_base + EMMC_TOP_CMD, PAD_CMD_RXDLY,  in msdc_set_cmd_delay()
1918 		sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRDLY,  in msdc_set_cmd_delay()
1927 		sdr_set_field(host->top_base + EMMC_TOP_CONTROL,  in msdc_set_data_delay()
1930 		sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_DATRRDLY,  in msdc_set_data_delay()
1948 		sdr_set_field(host->base + tune_reg,  in msdc_tune_response()
2013 		sdr_set_field(host->base + tune_reg,  in msdc_tune_response()
2021 	sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRRDLY,  in msdc_tune_response()
2039 	sdr_set_field(host->base + MSDC_PATCH_BIT1, MSDC_PATCH_BIT1_CMDTA, 2);  in hs400_tune_response()
2043 		sdr_set_field(host->base + MSDC_PAD_TUNE,  in hs400_tune_response()
2052 		sdr_set_field(host->base + PAD_CMD_TUNE,  in hs400_tune_response()
2070 	sdr_set_field(host->base + PAD_CMD_TUNE, PAD_CMD_TUNE_RX_DLY3,  in hs400_tune_response()
2086 	sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL,  in msdc_tune_data()
2141 	sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL,  in msdc_tune_together()
2249 	sdr_set_field(host->base + EMMC50_CFG3, EMMC50_CFG3_OUTS_WR, 2);  in msdc_prepare_hs400_tuning()
2298 		sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_PADCMD_LATCHCK, 1);  in msdc_hs400_enhanced_strobe()
2299 		sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_CMD_RESP_SEL, 1);  in msdc_hs400_enhanced_strobe()
2300 		sdr_set_field(host->base + EMMC50_CFG1, EMMC50_CFG1_DS_CFG, 1);  in msdc_hs400_enhanced_strobe()
2306 		sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_PADCMD_LATCHCK, 0);  in msdc_hs400_enhanced_strobe()
2307 		sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_CMD_RESP_SEL, 0);  in msdc_hs400_enhanced_strobe()
2308 		sdr_set_field(host->base + EMMC50_CFG1, EMMC50_CFG1_DS_CFG, 0);  in msdc_hs400_enhanced_strobe()
2312 		sdr_set_field(host->base + EMMC51_CFG0, CMDQ_RDAT_CNT, 0xb4);  in msdc_hs400_enhanced_strobe()
2340 		sdr_set_field(host->base + MSDC_DMA_CTRL,  in msdc_cqe_disable()