Lines Matching full:host
29 #include <linux/mmc/host.h>
423 void __iomem *base; /* host base address */
424 void __iomem *top_base; /* host top register base address */
436 int irq; /* host interrupt */
625 static void msdc_reset_hw(struct msdc_host *host) in msdc_reset_hw() argument
629 sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_RST); in msdc_reset_hw()
630 while (readl(host->base + MSDC_CFG) & MSDC_CFG_RST) in msdc_reset_hw()
633 sdr_set_bits(host->base + MSDC_FIFOCS, MSDC_FIFOCS_CLR); in msdc_reset_hw()
634 while (readl(host->base + MSDC_FIFOCS) & MSDC_FIFOCS_CLR) in msdc_reset_hw()
637 val = readl(host->base + MSDC_INT); in msdc_reset_hw()
638 writel(val, host->base + MSDC_INT); in msdc_reset_hw()
641 static void msdc_cmd_next(struct msdc_host *host,
643 static void __msdc_enable_sdio_irq(struct msdc_host *host, int enb);
661 static inline void msdc_dma_setup(struct msdc_host *host, struct msdc_dma *dma, in msdc_dma_setup() argument
692 if (host->dev_comp->support_64g) { in msdc_dma_setup()
698 if (host->dev_comp->support_64g) { in msdc_dma_setup()
716 sdr_set_field(host->base + MSDC_DMA_CFG, MSDC_DMA_CFG_DECSEN, 1); in msdc_dma_setup()
717 dma_ctrl = readl_relaxed(host->base + MSDC_DMA_CTRL); in msdc_dma_setup()
720 writel_relaxed(dma_ctrl, host->base + MSDC_DMA_CTRL); in msdc_dma_setup()
721 if (host->dev_comp->support_64g) in msdc_dma_setup()
722 sdr_set_field(host->base + DMA_SA_H4BIT, DMA_ADDR_HIGH_4BIT, in msdc_dma_setup()
724 writel(lower_32_bits(dma->gpd_addr), host->base + MSDC_DMA_SA); in msdc_dma_setup()
727 static void msdc_prepare_data(struct msdc_host *host, struct mmc_data *data) in msdc_prepare_data() argument
731 data->sg_count = dma_map_sg(host->dev, data->sg, data->sg_len, in msdc_prepare_data()
736 static void msdc_unprepare_data(struct msdc_host *host, struct mmc_data *data) in msdc_unprepare_data() argument
742 dma_unmap_sg(host->dev, data->sg, data->sg_len, in msdc_unprepare_data()
748 static u64 msdc_timeout_cal(struct msdc_host *host, u64 ns, u64 clks) in msdc_timeout_cal() argument
750 struct mmc_host *mmc = mmc_from_priv(host); in msdc_timeout_cal()
764 if (host->dev_comp->clk_div_bits == 8) in msdc_timeout_cal()
765 sdr_get_field(host->base + MSDC_CFG, in msdc_timeout_cal()
768 sdr_get_field(host->base + MSDC_CFG, in msdc_timeout_cal()
778 static void msdc_set_timeout(struct msdc_host *host, u64 ns, u64 clks) in msdc_set_timeout() argument
782 host->timeout_ns = ns; in msdc_set_timeout()
783 host->timeout_clks = clks; in msdc_set_timeout()
785 timeout = msdc_timeout_cal(host, ns, clks); in msdc_set_timeout()
786 sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, in msdc_set_timeout()
790 static void msdc_set_busy_timeout(struct msdc_host *host, u64 ns, u64 clks) in msdc_set_busy_timeout() argument
794 timeout = msdc_timeout_cal(host, ns, clks); in msdc_set_busy_timeout()
795 sdr_set_field(host->base + SDC_CFG, SDC_CFG_WRDTOC, in msdc_set_busy_timeout()
799 static void msdc_gate_clock(struct msdc_host *host) in msdc_gate_clock() argument
801 clk_bulk_disable_unprepare(MSDC_NR_CLOCKS, host->bulk_clks); in msdc_gate_clock()
802 clk_disable_unprepare(host->src_clk_cg); in msdc_gate_clock()
803 clk_disable_unprepare(host->src_clk); in msdc_gate_clock()
804 clk_disable_unprepare(host->bus_clk); in msdc_gate_clock()
805 clk_disable_unprepare(host->h_clk); in msdc_gate_clock()
808 static void msdc_ungate_clock(struct msdc_host *host) in msdc_ungate_clock() argument
812 clk_prepare_enable(host->h_clk); in msdc_ungate_clock()
813 clk_prepare_enable(host->bus_clk); in msdc_ungate_clock()
814 clk_prepare_enable(host->src_clk); in msdc_ungate_clock()
815 clk_prepare_enable(host->src_clk_cg); in msdc_ungate_clock()
816 ret = clk_bulk_prepare_enable(MSDC_NR_CLOCKS, host->bulk_clks); in msdc_ungate_clock()
818 dev_err(host->dev, "Cannot enable pclk/axi/ahb clock gates\n"); in msdc_ungate_clock()
822 while (!(readl(host->base + MSDC_CFG) & MSDC_CFG_CKSTB)) in msdc_ungate_clock()
826 static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz) in msdc_set_mclk() argument
828 struct mmc_host *mmc = mmc_from_priv(host); in msdc_set_mclk()
833 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_set_mclk()
836 dev_dbg(host->dev, "set mclk to 0\n"); in msdc_set_mclk()
837 host->mclk = 0; in msdc_set_mclk()
839 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_CKPDN); in msdc_set_mclk()
843 flags = readl(host->base + MSDC_INTEN); in msdc_set_mclk()
844 sdr_clr_bits(host->base + MSDC_INTEN, flags); in msdc_set_mclk()
845 if (host->dev_comp->clk_div_bits == 8) in msdc_set_mclk()
846 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_HS400_CK_MODE); in msdc_set_mclk()
848 sdr_clr_bits(host->base + MSDC_CFG, in msdc_set_mclk()
858 if (hz >= (host->src_clk_freq >> 2)) { in msdc_set_mclk()
860 sclk = host->src_clk_freq >> 2; /* sclk = clk / 4 */ in msdc_set_mclk()
862 div = (host->src_clk_freq + ((hz << 2) - 1)) / (hz << 2); in msdc_set_mclk()
863 sclk = (host->src_clk_freq >> 2) / div; in msdc_set_mclk()
868 hz >= (host->src_clk_freq >> 1)) { in msdc_set_mclk()
869 if (host->dev_comp->clk_div_bits == 8) in msdc_set_mclk()
870 sdr_set_bits(host->base + MSDC_CFG, in msdc_set_mclk()
873 sdr_set_bits(host->base + MSDC_CFG, in msdc_set_mclk()
875 sclk = host->src_clk_freq >> 1; in msdc_set_mclk()
878 } else if (hz >= host->src_clk_freq) { in msdc_set_mclk()
881 sclk = host->src_clk_freq; in msdc_set_mclk()
884 if (hz >= (host->src_clk_freq >> 1)) { in msdc_set_mclk()
886 sclk = host->src_clk_freq >> 1; /* sclk = clk / 2 */ in msdc_set_mclk()
888 div = (host->src_clk_freq + ((hz << 2) - 1)) / (hz << 2); in msdc_set_mclk()
889 sclk = (host->src_clk_freq >> 2) / div; in msdc_set_mclk()
892 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_CKPDN); in msdc_set_mclk()
897 if (host->src_clk_cg) in msdc_set_mclk()
898 clk_disable_unprepare(host->src_clk_cg); in msdc_set_mclk()
900 clk_disable_unprepare(clk_get_parent(host->src_clk)); in msdc_set_mclk()
901 if (host->dev_comp->clk_div_bits == 8) in msdc_set_mclk()
902 sdr_set_field(host->base + MSDC_CFG, in msdc_set_mclk()
906 sdr_set_field(host->base + MSDC_CFG, in msdc_set_mclk()
909 if (host->src_clk_cg) in msdc_set_mclk()
910 clk_prepare_enable(host->src_clk_cg); in msdc_set_mclk()
912 clk_prepare_enable(clk_get_parent(host->src_clk)); in msdc_set_mclk()
914 while (!(readl(host->base + MSDC_CFG) & MSDC_CFG_CKSTB)) in msdc_set_mclk()
916 sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_CKPDN); in msdc_set_mclk()
918 host->mclk = hz; in msdc_set_mclk()
919 host->timing = timing; in msdc_set_mclk()
921 msdc_set_timeout(host, host->timeout_ns, host->timeout_clks); in msdc_set_mclk()
922 sdr_set_bits(host->base + MSDC_INTEN, flags); in msdc_set_mclk()
929 writel(host->def_tune_para.iocon, host->base + MSDC_IOCON); in msdc_set_mclk()
930 if (host->top_base) { in msdc_set_mclk()
931 writel(host->def_tune_para.emmc_top_control, in msdc_set_mclk()
932 host->top_base + EMMC_TOP_CONTROL); in msdc_set_mclk()
933 writel(host->def_tune_para.emmc_top_cmd, in msdc_set_mclk()
934 host->top_base + EMMC_TOP_CMD); in msdc_set_mclk()
936 writel(host->def_tune_para.pad_tune, in msdc_set_mclk()
937 host->base + tune_reg); in msdc_set_mclk()
940 writel(host->saved_tune_para.iocon, host->base + MSDC_IOCON); in msdc_set_mclk()
941 writel(host->saved_tune_para.pad_cmd_tune, in msdc_set_mclk()
942 host->base + PAD_CMD_TUNE); in msdc_set_mclk()
943 if (host->top_base) { in msdc_set_mclk()
944 writel(host->saved_tune_para.emmc_top_control, in msdc_set_mclk()
945 host->top_base + EMMC_TOP_CONTROL); in msdc_set_mclk()
946 writel(host->saved_tune_para.emmc_top_cmd, in msdc_set_mclk()
947 host->top_base + EMMC_TOP_CMD); in msdc_set_mclk()
949 writel(host->saved_tune_para.pad_tune, in msdc_set_mclk()
950 host->base + tune_reg); in msdc_set_mclk()
955 host->dev_comp->hs400_tune) in msdc_set_mclk()
956 sdr_set_field(host->base + tune_reg, in msdc_set_mclk()
958 host->hs400_cmd_int_delay); in msdc_set_mclk()
959 dev_dbg(host->dev, "sclk: %d, timing: %d\n", mmc->actual_clock, in msdc_set_mclk()
963 static inline u32 msdc_cmd_find_resp(struct msdc_host *host, in msdc_cmd_find_resp() argument
991 static inline u32 msdc_cmd_prepare_raw_cmd(struct msdc_host *host, in msdc_cmd_prepare_raw_cmd() argument
994 struct mmc_host *mmc = mmc_from_priv(host); in msdc_cmd_prepare_raw_cmd()
1000 u32 resp = msdc_cmd_find_resp(host, mrq, cmd); in msdc_cmd_prepare_raw_cmd()
1003 host->cmd_rsp = resp; in msdc_cmd_prepare_raw_cmd()
1034 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_PIO); in msdc_cmd_prepare_raw_cmd()
1036 if (host->timeout_ns != data->timeout_ns || in msdc_cmd_prepare_raw_cmd()
1037 host->timeout_clks != data->timeout_clks) in msdc_cmd_prepare_raw_cmd()
1038 msdc_set_timeout(host, data->timeout_ns, in msdc_cmd_prepare_raw_cmd()
1041 writel(data->blocks, host->base + SDC_BLK_NUM); in msdc_cmd_prepare_raw_cmd()
1046 static void msdc_start_data(struct msdc_host *host, struct mmc_request *mrq, in msdc_start_data() argument
1051 WARN_ON(host->data); in msdc_start_data()
1052 host->data = data; in msdc_start_data()
1055 mod_delayed_work(system_wq, &host->req_timeout, DAT_TIMEOUT); in msdc_start_data()
1056 msdc_dma_setup(host, &host->dma, data); in msdc_start_data()
1057 sdr_set_bits(host->base + MSDC_INTEN, data_ints_mask); in msdc_start_data()
1058 sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_START, 1); in msdc_start_data()
1059 dev_dbg(host->dev, "DMA start\n"); in msdc_start_data()
1060 dev_dbg(host->dev, "%s: cmd=%d DMA data: %d blocks; read=%d\n", in msdc_start_data()
1064 static int msdc_auto_cmd_done(struct msdc_host *host, int events, in msdc_auto_cmd_done() argument
1069 rsp[0] = readl(host->base + SDC_ACMD_RESP); in msdc_auto_cmd_done()
1074 msdc_reset_hw(host); in msdc_auto_cmd_done()
1077 host->error |= REQ_STOP_EIO; in msdc_auto_cmd_done()
1080 host->error |= REQ_STOP_TMO; in msdc_auto_cmd_done()
1082 dev_err(host->dev, in msdc_auto_cmd_done()
1092 * Host controller may lost interrupt in some special case.
1096 static void msdc_recheck_sdio_irq(struct msdc_host *host) in msdc_recheck_sdio_irq() argument
1098 struct mmc_host *mmc = mmc_from_priv(host); in msdc_recheck_sdio_irq()
1102 reg_inten = readl(host->base + MSDC_INTEN); in msdc_recheck_sdio_irq()
1104 reg_int = readl(host->base + MSDC_INT); in msdc_recheck_sdio_irq()
1105 reg_ps = readl(host->base + MSDC_PS); in msdc_recheck_sdio_irq()
1108 __msdc_enable_sdio_irq(host, 0); in msdc_recheck_sdio_irq()
1115 static void msdc_track_cmd_data(struct msdc_host *host, in msdc_track_cmd_data() argument
1118 if (host->error) in msdc_track_cmd_data()
1119 dev_dbg(host->dev, "%s: cmd=%d arg=%08X; host->error=0x%08X\n", in msdc_track_cmd_data()
1120 __func__, cmd->opcode, cmd->arg, host->error); in msdc_track_cmd_data()
1123 static void msdc_request_done(struct msdc_host *host, struct mmc_request *mrq) in msdc_request_done() argument
1131 cancel_delayed_work(&host->req_timeout); in msdc_request_done()
1133 spin_lock_irqsave(&host->lock, flags); in msdc_request_done()
1134 host->mrq = NULL; in msdc_request_done()
1135 spin_unlock_irqrestore(&host->lock, flags); in msdc_request_done()
1137 msdc_track_cmd_data(host, mrq->cmd, mrq->data); in msdc_request_done()
1139 msdc_unprepare_data(host, mrq->data); in msdc_request_done()
1140 if (host->error) in msdc_request_done()
1141 msdc_reset_hw(host); in msdc_request_done()
1142 mmc_request_done(mmc_from_priv(host), mrq); in msdc_request_done()
1143 if (host->dev_comp->recheck_sdio_irq) in msdc_request_done()
1144 msdc_recheck_sdio_irq(host); in msdc_request_done()
1148 static bool msdc_cmd_done(struct msdc_host *host, int events, in msdc_cmd_done() argument
1159 msdc_auto_cmd_done(host, events, mrq->sbc); in msdc_cmd_done()
1168 spin_lock_irqsave(&host->lock, flags); in msdc_cmd_done()
1169 done = !host->cmd; in msdc_cmd_done()
1170 host->cmd = NULL; in msdc_cmd_done()
1171 spin_unlock_irqrestore(&host->lock, flags); in msdc_cmd_done()
1177 sdr_clr_bits(host->base + MSDC_INTEN, cmd_ints_mask); in msdc_cmd_done()
1181 rsp[0] = readl(host->base + SDC_RESP3); in msdc_cmd_done()
1182 rsp[1] = readl(host->base + SDC_RESP2); in msdc_cmd_done()
1183 rsp[2] = readl(host->base + SDC_RESP1); in msdc_cmd_done()
1184 rsp[3] = readl(host->base + SDC_RESP0); in msdc_cmd_done()
1186 rsp[0] = readl(host->base + SDC_RESP0); in msdc_cmd_done()
1199 msdc_reset_hw(host); in msdc_cmd_done()
1202 host->error |= REQ_CMD_EIO; in msdc_cmd_done()
1205 host->error |= REQ_CMD_TMO; in msdc_cmd_done()
1209 dev_dbg(host->dev, in msdc_cmd_done()
1214 msdc_cmd_next(host, mrq, cmd); in msdc_cmd_done()
1219 * is correct before issue a request. but host design do below
1222 static inline bool msdc_cmd_is_ready(struct msdc_host *host, in msdc_cmd_is_ready() argument
1228 while ((readl(host->base + SDC_STS) & SDC_STS_CMDBUSY) && in msdc_cmd_is_ready()
1231 if (readl(host->base + SDC_STS) & SDC_STS_CMDBUSY) { in msdc_cmd_is_ready()
1232 dev_err(host->dev, "CMD bus busy detected\n"); in msdc_cmd_is_ready()
1233 host->error |= REQ_CMD_BUSY; in msdc_cmd_is_ready()
1234 msdc_cmd_done(host, MSDC_INT_CMDTMO, mrq, cmd); in msdc_cmd_is_ready()
1241 while ((readl(host->base + SDC_STS) & SDC_STS_SDCBUSY) && in msdc_cmd_is_ready()
1244 if (readl(host->base + SDC_STS) & SDC_STS_SDCBUSY) { in msdc_cmd_is_ready()
1245 dev_err(host->dev, "Controller busy detected\n"); in msdc_cmd_is_ready()
1246 host->error |= REQ_CMD_BUSY; in msdc_cmd_is_ready()
1247 msdc_cmd_done(host, MSDC_INT_CMDTMO, mrq, cmd); in msdc_cmd_is_ready()
1254 static void msdc_start_command(struct msdc_host *host, in msdc_start_command() argument
1260 WARN_ON(host->cmd); in msdc_start_command()
1261 host->cmd = cmd; in msdc_start_command()
1263 mod_delayed_work(system_wq, &host->req_timeout, DAT_TIMEOUT); in msdc_start_command()
1264 if (!msdc_cmd_is_ready(host, mrq, cmd)) in msdc_start_command()
1267 if ((readl(host->base + MSDC_FIFOCS) & MSDC_FIFOCS_TXCNT) >> 16 || in msdc_start_command()
1268 readl(host->base + MSDC_FIFOCS) & MSDC_FIFOCS_RXCNT) { in msdc_start_command()
1269 dev_err(host->dev, "TX/RX FIFO non-empty before start of IO. Reset\n"); in msdc_start_command()
1270 msdc_reset_hw(host); in msdc_start_command()
1274 rawcmd = msdc_cmd_prepare_raw_cmd(host, mrq, cmd); in msdc_start_command()
1276 spin_lock_irqsave(&host->lock, flags); in msdc_start_command()
1277 sdr_set_bits(host->base + MSDC_INTEN, cmd_ints_mask); in msdc_start_command()
1278 spin_unlock_irqrestore(&host->lock, flags); in msdc_start_command()
1280 writel(cmd->arg, host->base + SDC_ARG); in msdc_start_command()
1281 writel(rawcmd, host->base + SDC_CMD); in msdc_start_command()
1284 static void msdc_cmd_next(struct msdc_host *host, in msdc_cmd_next() argument
1292 msdc_request_done(host, mrq); in msdc_cmd_next()
1294 msdc_start_command(host, mrq, mrq->cmd); in msdc_cmd_next()
1296 msdc_request_done(host, mrq); in msdc_cmd_next()
1298 msdc_start_data(host, mrq, cmd, cmd->data); in msdc_cmd_next()
1303 struct msdc_host *host = mmc_priv(mmc); in msdc_ops_request() local
1305 host->error = 0; in msdc_ops_request()
1306 WARN_ON(host->mrq); in msdc_ops_request()
1307 host->mrq = mrq; in msdc_ops_request()
1310 msdc_prepare_data(host, mrq->data); in msdc_ops_request()
1318 msdc_start_command(host, mrq, mrq->sbc); in msdc_ops_request()
1320 msdc_start_command(host, mrq, mrq->cmd); in msdc_ops_request()
1325 struct msdc_host *host = mmc_priv(mmc); in msdc_pre_req() local
1331 msdc_prepare_data(host, data); in msdc_pre_req()
1338 struct msdc_host *host = mmc_priv(mmc); in msdc_post_req() local
1346 msdc_unprepare_data(host, data); in msdc_post_req()
1350 static void msdc_data_xfer_next(struct msdc_host *host, struct mmc_request *mrq) in msdc_data_xfer_next() argument
1354 msdc_start_command(host, mrq, mrq->stop); in msdc_data_xfer_next()
1356 msdc_request_done(host, mrq); in msdc_data_xfer_next()
1359 static bool msdc_data_xfer_done(struct msdc_host *host, u32 events, in msdc_data_xfer_done() argument
1370 spin_lock_irqsave(&host->lock, flags); in msdc_data_xfer_done()
1371 done = !host->data; in msdc_data_xfer_done()
1373 host->data = NULL; in msdc_data_xfer_done()
1374 spin_unlock_irqrestore(&host->lock, flags); in msdc_data_xfer_done()
1381 dev_dbg(host->dev, "DMA status: 0x%8X\n", in msdc_data_xfer_done()
1382 readl(host->base + MSDC_DMA_CFG)); in msdc_data_xfer_done()
1383 sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_STOP, in msdc_data_xfer_done()
1385 while (readl(host->base + MSDC_DMA_CFG) & MSDC_DMA_CFG_STS) in msdc_data_xfer_done()
1387 sdr_clr_bits(host->base + MSDC_INTEN, data_ints_mask); in msdc_data_xfer_done()
1388 dev_dbg(host->dev, "DMA stop\n"); in msdc_data_xfer_done()
1393 dev_dbg(host->dev, "interrupt events: %x\n", events); in msdc_data_xfer_done()
1394 msdc_reset_hw(host); in msdc_data_xfer_done()
1395 host->error |= REQ_DAT_ERR; in msdc_data_xfer_done()
1403 dev_dbg(host->dev, "%s: cmd=%d; blocks=%d", in msdc_data_xfer_done()
1405 dev_dbg(host->dev, "data_error=%d xfer_size=%d\n", in msdc_data_xfer_done()
1409 msdc_data_xfer_next(host, mrq); in msdc_data_xfer_done()
1415 static void msdc_set_buswidth(struct msdc_host *host, u32 width) in msdc_set_buswidth() argument
1417 u32 val = readl(host->base + SDC_CFG); in msdc_set_buswidth()
1434 writel(val, host->base + SDC_CFG); in msdc_set_buswidth()
1435 dev_dbg(host->dev, "Bus Width = %d", width); in msdc_set_buswidth()
1440 struct msdc_host *host = mmc_priv(mmc); in msdc_ops_switch_volt() local
1446 dev_err(host->dev, "Unsupported signal voltage!\n"); in msdc_ops_switch_volt()
1452 dev_dbg(host->dev, "Regulator set error %d (%d)\n", in msdc_ops_switch_volt()
1459 pinctrl_select_state(host->pinctrl, host->pins_uhs); in msdc_ops_switch_volt()
1461 pinctrl_select_state(host->pinctrl, host->pins_default); in msdc_ops_switch_volt()
1468 struct msdc_host *host = mmc_priv(mmc); in msdc_card_busy() local
1469 u32 status = readl(host->base + MSDC_PS); in msdc_card_busy()
1477 struct msdc_host *host = container_of(work, struct msdc_host, in msdc_request_timeout() local
1481 dev_err(host->dev, "%s: aborting cmd/data/mrq\n", __func__); in msdc_request_timeout()
1482 if (host->mrq) { in msdc_request_timeout()
1483 dev_err(host->dev, "%s: aborting mrq=%p cmd=%d\n", __func__, in msdc_request_timeout()
1484 host->mrq, host->mrq->cmd->opcode); in msdc_request_timeout()
1485 if (host->cmd) { in msdc_request_timeout()
1486 dev_err(host->dev, "%s: aborting cmd=%d\n", in msdc_request_timeout()
1487 __func__, host->cmd->opcode); in msdc_request_timeout()
1488 msdc_cmd_done(host, MSDC_INT_CMDTMO, host->mrq, in msdc_request_timeout()
1489 host->cmd); in msdc_request_timeout()
1490 } else if (host->data) { in msdc_request_timeout()
1491 dev_err(host->dev, "%s: abort data: cmd%d; %d blocks\n", in msdc_request_timeout()
1492 __func__, host->mrq->cmd->opcode, in msdc_request_timeout()
1493 host->data->blocks); in msdc_request_timeout()
1494 msdc_data_xfer_done(host, MSDC_INT_DATTMO, host->mrq, in msdc_request_timeout()
1495 host->data); in msdc_request_timeout()
1500 static void __msdc_enable_sdio_irq(struct msdc_host *host, int enb) in __msdc_enable_sdio_irq() argument
1503 sdr_set_bits(host->base + MSDC_INTEN, MSDC_INTEN_SDIOIRQ); in __msdc_enable_sdio_irq()
1504 sdr_set_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); in __msdc_enable_sdio_irq()
1505 if (host->dev_comp->recheck_sdio_irq) in __msdc_enable_sdio_irq()
1506 msdc_recheck_sdio_irq(host); in __msdc_enable_sdio_irq()
1508 sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INTEN_SDIOIRQ); in __msdc_enable_sdio_irq()
1509 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); in __msdc_enable_sdio_irq()
1516 struct msdc_host *host = mmc_priv(mmc); in msdc_enable_sdio_irq() local
1518 spin_lock_irqsave(&host->lock, flags); in msdc_enable_sdio_irq()
1519 __msdc_enable_sdio_irq(host, enb); in msdc_enable_sdio_irq()
1520 spin_unlock_irqrestore(&host->lock, flags); in msdc_enable_sdio_irq()
1523 pm_runtime_get_noresume(host->dev); in msdc_enable_sdio_irq()
1525 pm_runtime_put_noidle(host->dev); in msdc_enable_sdio_irq()
1528 static irqreturn_t msdc_cmdq_irq(struct msdc_host *host, u32 intsts) in msdc_cmdq_irq() argument
1530 struct mmc_host *mmc = mmc_from_priv(host); in msdc_cmdq_irq()
1535 dev_err(host->dev, "%s: CMD CRC ERR", __func__); in msdc_cmdq_irq()
1538 dev_err(host->dev, "%s: CMD TIMEOUT ERR", __func__); in msdc_cmdq_irq()
1543 dev_err(host->dev, "%s: DATA CRC ERR", __func__); in msdc_cmdq_irq()
1546 dev_err(host->dev, "%s: DATA TIMEOUT ERR", __func__); in msdc_cmdq_irq()
1550 dev_err(host->dev, "cmd_err = %d, dat_err =%d, intsts = 0x%x", in msdc_cmdq_irq()
1559 struct msdc_host *host = (struct msdc_host *) dev_id; in msdc_irq() local
1560 struct mmc_host *mmc = mmc_from_priv(host); in msdc_irq()
1568 spin_lock(&host->lock); in msdc_irq()
1569 events = readl(host->base + MSDC_INT); in msdc_irq()
1570 event_mask = readl(host->base + MSDC_INTEN); in msdc_irq()
1572 __msdc_enable_sdio_irq(host, 0); in msdc_irq()
1574 writel(events & event_mask, host->base + MSDC_INT); in msdc_irq()
1576 mrq = host->mrq; in msdc_irq()
1577 cmd = host->cmd; in msdc_irq()
1578 data = host->data; in msdc_irq()
1579 spin_unlock(&host->lock); in msdc_irq()
1585 if (host->internal_cd) in msdc_irq()
1595 msdc_cmdq_irq(host, events); in msdc_irq()
1597 writel(events, host->base + MSDC_INT); in msdc_irq()
1602 dev_err(host->dev, in msdc_irq()
1609 dev_dbg(host->dev, "%s: events=%08X\n", __func__, events); in msdc_irq()
1612 msdc_cmd_done(host, events, mrq, cmd); in msdc_irq()
1614 msdc_data_xfer_done(host, events, mrq, data); in msdc_irq()
1620 static void msdc_init_hw(struct msdc_host *host) in msdc_init_hw() argument
1623 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_init_hw()
1625 if (host->reset) { in msdc_init_hw()
1626 reset_control_assert(host->reset); in msdc_init_hw()
1628 reset_control_deassert(host->reset); in msdc_init_hw()
1632 sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_MODE | MSDC_CFG_CKPDN); in msdc_init_hw()
1635 msdc_reset_hw(host); in msdc_init_hw()
1638 writel(0, host->base + MSDC_INTEN); in msdc_init_hw()
1639 val = readl(host->base + MSDC_INT); in msdc_init_hw()
1640 writel(val, host->base + MSDC_INT); in msdc_init_hw()
1643 if (host->internal_cd) { in msdc_init_hw()
1644 sdr_set_field(host->base + MSDC_PS, MSDC_PS_CDDEBOUNCE, in msdc_init_hw()
1646 sdr_set_bits(host->base + MSDC_PS, MSDC_PS_CDEN); in msdc_init_hw()
1647 sdr_set_bits(host->base + MSDC_INTEN, MSDC_INTEN_CDSC); in msdc_init_hw()
1648 sdr_set_bits(host->base + SDC_CFG, SDC_CFG_INSWKUP); in msdc_init_hw()
1650 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_INSWKUP); in msdc_init_hw()
1651 sdr_clr_bits(host->base + MSDC_PS, MSDC_PS_CDEN); in msdc_init_hw()
1652 sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INTEN_CDSC); in msdc_init_hw()
1655 if (host->top_base) { in msdc_init_hw()
1656 writel(0, host->top_base + EMMC_TOP_CONTROL); in msdc_init_hw()
1657 writel(0, host->top_base + EMMC_TOP_CMD); in msdc_init_hw()
1659 writel(0, host->base + tune_reg); in msdc_init_hw()
1661 writel(0, host->base + MSDC_IOCON); in msdc_init_hw()
1662 sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0); in msdc_init_hw()
1663 writel(0x403c0046, host->base + MSDC_PATCH_BIT); in msdc_init_hw()
1664 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1); in msdc_init_hw()
1665 writel(0xffff4089, host->base + MSDC_PATCH_BIT1); in msdc_init_hw()
1666 sdr_set_bits(host->base + EMMC50_CFG0, EMMC50_CFG_CFCSTS_SEL); in msdc_init_hw()
1668 if (host->dev_comp->stop_clk_fix) { in msdc_init_hw()
1669 sdr_set_field(host->base + MSDC_PATCH_BIT1, in msdc_init_hw()
1671 sdr_clr_bits(host->base + SDC_FIFO_CFG, in msdc_init_hw()
1673 sdr_clr_bits(host->base + SDC_FIFO_CFG, in msdc_init_hw()
1677 if (host->dev_comp->busy_check) in msdc_init_hw()
1678 sdr_clr_bits(host->base + MSDC_PATCH_BIT1, (1 << 7)); in msdc_init_hw()
1680 if (host->dev_comp->async_fifo) { in msdc_init_hw()
1681 sdr_set_field(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1683 if (host->dev_comp->enhance_rx) { in msdc_init_hw()
1684 if (host->top_base) in msdc_init_hw()
1685 sdr_set_bits(host->top_base + EMMC_TOP_CONTROL, in msdc_init_hw()
1688 sdr_set_bits(host->base + SDC_ADV_CFG0, in msdc_init_hw()
1691 sdr_set_field(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1693 sdr_set_field(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1697 sdr_clr_bits(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1699 sdr_set_bits(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1703 if (host->dev_comp->support_64g) in msdc_init_hw()
1704 sdr_set_bits(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1706 if (host->dev_comp->data_tune) { in msdc_init_hw()
1707 if (host->top_base) { in msdc_init_hw()
1708 sdr_set_bits(host->top_base + EMMC_TOP_CONTROL, in msdc_init_hw()
1710 sdr_clr_bits(host->top_base + EMMC_TOP_CONTROL, in msdc_init_hw()
1712 sdr_set_bits(host->top_base + EMMC_TOP_CMD, in msdc_init_hw()
1715 sdr_set_bits(host->base + tune_reg, in msdc_init_hw()
1721 if (host->top_base) in msdc_init_hw()
1722 sdr_set_bits(host->top_base + EMMC_TOP_CONTROL, in msdc_init_hw()
1725 sdr_set_bits(host->base + tune_reg, in msdc_init_hw()
1732 sdr_set_bits(host->base + SDC_CFG, SDC_CFG_SDIO); in msdc_init_hw()
1735 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); in msdc_init_hw()
1736 sdr_set_bits(host->base + SDC_ADV_CFG0, SDC_DAT1_IRQ_TRIGGER); in msdc_init_hw()
1739 sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, 3); in msdc_init_hw()
1741 host->def_tune_para.iocon = readl(host->base + MSDC_IOCON); in msdc_init_hw()
1742 host->saved_tune_para.iocon = readl(host->base + MSDC_IOCON); in msdc_init_hw()
1743 if (host->top_base) { in msdc_init_hw()
1744 host->def_tune_para.emmc_top_control = in msdc_init_hw()
1745 readl(host->top_base + EMMC_TOP_CONTROL); in msdc_init_hw()
1746 host->def_tune_para.emmc_top_cmd = in msdc_init_hw()
1747 readl(host->top_base + EMMC_TOP_CMD); in msdc_init_hw()
1748 host->saved_tune_para.emmc_top_control = in msdc_init_hw()
1749 readl(host->top_base + EMMC_TOP_CONTROL); in msdc_init_hw()
1750 host->saved_tune_para.emmc_top_cmd = in msdc_init_hw()
1751 readl(host->top_base + EMMC_TOP_CMD); in msdc_init_hw()
1753 host->def_tune_para.pad_tune = readl(host->base + tune_reg); in msdc_init_hw()
1754 host->saved_tune_para.pad_tune = readl(host->base + tune_reg); in msdc_init_hw()
1756 dev_dbg(host->dev, "init hardware done!"); in msdc_init_hw()
1759 static void msdc_deinit_hw(struct msdc_host *host) in msdc_deinit_hw() argument
1763 if (host->internal_cd) { in msdc_deinit_hw()
1765 sdr_clr_bits(host->base + MSDC_PS, MSDC_PS_CDEN); in msdc_deinit_hw()
1766 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_INSWKUP); in msdc_deinit_hw()
1770 writel(0, host->base + MSDC_INTEN); in msdc_deinit_hw()
1772 val = readl(host->base + MSDC_INT); in msdc_deinit_hw()
1773 writel(val, host->base + MSDC_INT); in msdc_deinit_hw()
1777 static void msdc_init_gpd_bd(struct msdc_host *host, struct msdc_dma *dma) in msdc_init_gpd_bd() argument
1792 if (host->dev_comp->support_64g) in msdc_init_gpd_bd()
1797 if (host->dev_comp->support_64g) in msdc_init_gpd_bd()
1804 if (host->dev_comp->support_64g) in msdc_init_gpd_bd()
1811 struct msdc_host *host = mmc_priv(mmc); in msdc_ops_set_ios() local
1814 msdc_set_buswidth(host, ios->bus_width); in msdc_ops_set_ios()
1820 msdc_init_hw(host); in msdc_ops_set_ios()
1824 dev_err(host->dev, "Failed to set vmmc power!\n"); in msdc_ops_set_ios()
1830 if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { in msdc_ops_set_ios()
1833 dev_err(host->dev, "Failed to set vqmmc power!\n"); in msdc_ops_set_ios()
1835 host->vqmmc_enabled = true; in msdc_ops_set_ios()
1842 if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) { in msdc_ops_set_ios()
1844 host->vqmmc_enabled = false; in msdc_ops_set_ios()
1851 if (host->mclk != ios->clock || host->timing != ios->timing) in msdc_ops_set_ios()
1852 msdc_set_mclk(host, ios->timing, ios->clock); in msdc_ops_set_ios()
1872 static struct msdc_delay_phase get_best_delay(struct msdc_host *host, u32 delay) in get_best_delay() argument
1880 dev_err(host->dev, "phase error: [map:%x]\n", delay); in get_best_delay()
1901 dev_info(host->dev, "phase: [map:%x] [maxlen:%d] [final:%d]\n", in get_best_delay()
1910 static inline void msdc_set_cmd_delay(struct msdc_host *host, u32 value) in msdc_set_cmd_delay() argument
1912 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_set_cmd_delay()
1914 if (host->top_base) in msdc_set_cmd_delay()
1915 sdr_set_field(host->top_base + EMMC_TOP_CMD, PAD_CMD_RXDLY, in msdc_set_cmd_delay()
1918 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRDLY, in msdc_set_cmd_delay()
1922 static inline void msdc_set_data_delay(struct msdc_host *host, u32 value) in msdc_set_data_delay() argument
1924 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_set_data_delay()
1926 if (host->top_base) in msdc_set_data_delay()
1927 sdr_set_field(host->top_base + EMMC_TOP_CONTROL, in msdc_set_data_delay()
1930 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_DATRRDLY, in msdc_set_data_delay()
1936 struct msdc_host *host = mmc_priv(mmc); in msdc_tune_response() local
1942 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_tune_response()
1948 sdr_set_field(host->base + tune_reg, in msdc_tune_response()
1950 host->hs200_cmd_int_delay); in msdc_tune_response()
1952 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_response()
1954 msdc_set_cmd_delay(host, i); in msdc_tune_response()
1970 final_rise_delay = get_best_delay(host, rise_delay); in msdc_tune_response()
1976 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_response()
1978 msdc_set_cmd_delay(host, i); in msdc_tune_response()
1994 final_fall_delay = get_best_delay(host, fall_delay); in msdc_tune_response()
2001 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_response()
2004 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_response()
2007 msdc_set_cmd_delay(host, final_delay); in msdc_tune_response()
2009 if (host->dev_comp->async_fifo || host->hs200_cmd_int_delay) in msdc_tune_response()
2013 sdr_set_field(host->base + tune_reg, in msdc_tune_response()
2019 dev_dbg(host->dev, "Final internal delay: 0x%x\n", internal_delay); in msdc_tune_response()
2020 internal_delay_phase = get_best_delay(host, internal_delay); in msdc_tune_response()
2021 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRRDLY, in msdc_tune_response()
2024 dev_dbg(host->dev, "Final cmd pad delay: %x\n", final_delay); in msdc_tune_response()
2030 struct msdc_host *host = mmc_priv(mmc); in hs400_tune_response() local
2038 sdr_set_bits(host->base + PAD_CMD_TUNE, BIT(0)); in hs400_tune_response()
2039 sdr_set_field(host->base + MSDC_PATCH_BIT1, MSDC_PATCH_BIT1_CMDTA, 2); in hs400_tune_response()
2043 sdr_set_field(host->base + MSDC_PAD_TUNE, in hs400_tune_response()
2045 host->hs200_cmd_int_delay); in hs400_tune_response()
2047 if (host->hs400_cmd_resp_sel_rising) in hs400_tune_response()
2048 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in hs400_tune_response()
2050 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in hs400_tune_response()
2052 sdr_set_field(host->base + PAD_CMD_TUNE, in hs400_tune_response()
2069 final_cmd_delay = get_best_delay(host, cmd_delay); in hs400_tune_response()
2070 sdr_set_field(host->base + PAD_CMD_TUNE, PAD_CMD_TUNE_RX_DLY3, in hs400_tune_response()
2074 dev_dbg(host->dev, "Final cmd pad delay: %x\n", final_delay); in hs400_tune_response()
2080 struct msdc_host *host = mmc_priv(mmc); in msdc_tune_data() local
2086 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL, in msdc_tune_data()
2087 host->latch_ck); in msdc_tune_data()
2088 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL); in msdc_tune_data()
2089 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL); in msdc_tune_data()
2091 msdc_set_data_delay(host, i); in msdc_tune_data()
2096 final_rise_delay = get_best_delay(host, rise_delay); in msdc_tune_data()
2102 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL); in msdc_tune_data()
2103 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL); in msdc_tune_data()
2105 msdc_set_data_delay(host, i); in msdc_tune_data()
2110 final_fall_delay = get_best_delay(host, fall_delay); in msdc_tune_data()
2115 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL); in msdc_tune_data()
2116 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL); in msdc_tune_data()
2119 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL); in msdc_tune_data()
2120 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL); in msdc_tune_data()
2123 msdc_set_data_delay(host, final_delay); in msdc_tune_data()
2125 dev_dbg(host->dev, "Final data pad delay: %x\n", final_delay); in msdc_tune_data()
2135 struct msdc_host *host = mmc_priv(mmc); in msdc_tune_together() local
2141 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL, in msdc_tune_together()
2142 host->latch_ck); in msdc_tune_together()
2144 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_together()
2145 sdr_clr_bits(host->base + MSDC_IOCON, in msdc_tune_together()
2148 msdc_set_cmd_delay(host, i); in msdc_tune_together()
2149 msdc_set_data_delay(host, i); in msdc_tune_together()
2154 final_rise_delay = get_best_delay(host, rise_delay); in msdc_tune_together()
2160 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_together()
2161 sdr_set_bits(host->base + MSDC_IOCON, in msdc_tune_together()
2164 msdc_set_cmd_delay(host, i); in msdc_tune_together()
2165 msdc_set_data_delay(host, i); in msdc_tune_together()
2170 final_fall_delay = get_best_delay(host, fall_delay); in msdc_tune_together()
2175 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_together()
2176 sdr_clr_bits(host->base + MSDC_IOCON, in msdc_tune_together()
2180 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_together()
2181 sdr_set_bits(host->base + MSDC_IOCON, in msdc_tune_together()
2186 msdc_set_cmd_delay(host, final_delay); in msdc_tune_together()
2187 msdc_set_data_delay(host, final_delay); in msdc_tune_together()
2189 dev_dbg(host->dev, "Final pad delay: %x\n", final_delay); in msdc_tune_together()
2195 struct msdc_host *host = mmc_priv(mmc); in msdc_execute_tuning() local
2197 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_execute_tuning()
2199 if (host->dev_comp->data_tune && host->dev_comp->async_fifo) { in msdc_execute_tuning()
2201 if (host->hs400_mode) { in msdc_execute_tuning()
2202 sdr_clr_bits(host->base + MSDC_IOCON, in msdc_execute_tuning()
2204 msdc_set_data_delay(host, 0); in msdc_execute_tuning()
2208 if (host->hs400_mode && in msdc_execute_tuning()
2209 host->dev_comp->hs400_tune) in msdc_execute_tuning()
2214 dev_err(host->dev, "Tune response fail!\n"); in msdc_execute_tuning()
2217 if (host->hs400_mode == false) { in msdc_execute_tuning()
2220 dev_err(host->dev, "Tune data fail!\n"); in msdc_execute_tuning()
2224 host->saved_tune_para.iocon = readl(host->base + MSDC_IOCON); in msdc_execute_tuning()
2225 host->saved_tune_para.pad_tune = readl(host->base + tune_reg); in msdc_execute_tuning()
2226 host->saved_tune_para.pad_cmd_tune = readl(host->base + PAD_CMD_TUNE); in msdc_execute_tuning()
2227 if (host->top_base) { in msdc_execute_tuning()
2228 host->saved_tune_para.emmc_top_control = readl(host->top_base + in msdc_execute_tuning()
2230 host->saved_tune_para.emmc_top_cmd = readl(host->top_base + in msdc_execute_tuning()
2238 struct msdc_host *host = mmc_priv(mmc); in msdc_prepare_hs400_tuning() local
2239 host->hs400_mode = true; in msdc_prepare_hs400_tuning()
2241 if (host->top_base) in msdc_prepare_hs400_tuning()
2242 writel(host->hs400_ds_delay, in msdc_prepare_hs400_tuning()
2243 host->top_base + EMMC50_PAD_DS_TUNE); in msdc_prepare_hs400_tuning()
2245 writel(host->hs400_ds_delay, host->base + PAD_DS_TUNE); in msdc_prepare_hs400_tuning()
2247 sdr_clr_bits(host->base + MSDC_PATCH_BIT2, MSDC_PATCH_BIT2_CFGCRCSTS); in msdc_prepare_hs400_tuning()
2249 sdr_set_field(host->base + EMMC50_CFG3, EMMC50_CFG3_OUTS_WR, 2); in msdc_prepare_hs400_tuning()
2256 struct msdc_host *host = mmc_priv(mmc); in msdc_hw_reset() local
2258 sdr_set_bits(host->base + EMMC_IOCON, 1); in msdc_hw_reset()
2260 sdr_clr_bits(host->base + EMMC_IOCON, 1); in msdc_hw_reset()
2266 struct msdc_host *host = mmc_priv(mmc); in msdc_ack_sdio_irq() local
2268 spin_lock_irqsave(&host->lock, flags); in msdc_ack_sdio_irq()
2269 __msdc_enable_sdio_irq(host, 1); in msdc_ack_sdio_irq()
2270 spin_unlock_irqrestore(&host->lock, flags); in msdc_ack_sdio_irq()
2275 struct msdc_host *host = mmc_priv(mmc); in msdc_get_cd() local
2281 if (!host->internal_cd) in msdc_get_cd()
2284 val = readl(host->base + MSDC_PS) & MSDC_PS_CDSTS; in msdc_get_cd()
2294 struct msdc_host *host = mmc_priv(mmc); in msdc_hs400_enhanced_strobe() local
2298 sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_PADCMD_LATCHCK, 1); in msdc_hs400_enhanced_strobe()
2299 sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_CMD_RESP_SEL, 1); in msdc_hs400_enhanced_strobe()
2300 sdr_set_field(host->base + EMMC50_CFG1, EMMC50_CFG1_DS_CFG, 1); in msdc_hs400_enhanced_strobe()
2302 sdr_clr_bits(host->base + CQHCI_SETTING, CQHCI_RD_CMD_WND_SEL); in msdc_hs400_enhanced_strobe()
2303 sdr_clr_bits(host->base + CQHCI_SETTING, CQHCI_WR_CMD_WND_SEL); in msdc_hs400_enhanced_strobe()
2304 sdr_clr_bits(host->base + EMMC51_CFG0, CMDQ_RDAT_CNT); in msdc_hs400_enhanced_strobe()
2306 sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_PADCMD_LATCHCK, 0); in msdc_hs400_enhanced_strobe()
2307 sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_CMD_RESP_SEL, 0); in msdc_hs400_enhanced_strobe()
2308 sdr_set_field(host->base + EMMC50_CFG1, EMMC50_CFG1_DS_CFG, 0); in msdc_hs400_enhanced_strobe()
2310 sdr_set_bits(host->base + CQHCI_SETTING, CQHCI_RD_CMD_WND_SEL); in msdc_hs400_enhanced_strobe()
2311 sdr_set_bits(host->base + CQHCI_SETTING, CQHCI_WR_CMD_WND_SEL); in msdc_hs400_enhanced_strobe()
2312 sdr_set_field(host->base + EMMC51_CFG0, CMDQ_RDAT_CNT, 0xb4); in msdc_hs400_enhanced_strobe()
2318 struct msdc_host *host = mmc_priv(mmc); in msdc_cqe_enable() local
2321 writel(MSDC_INT_CMDQ, host->base + MSDC_INTEN); in msdc_cqe_enable()
2323 sdr_set_bits(host->base + MSDC_PATCH_BIT1, MSDC_PB1_BUSY_CHECK_SEL); in msdc_cqe_enable()
2325 msdc_set_busy_timeout(host, 20 * 1000000000ULL, 0); in msdc_cqe_enable()
2327 msdc_set_timeout(host, 1000000000ULL, 0); in msdc_cqe_enable()
2332 struct msdc_host *host = mmc_priv(mmc); in msdc_cqe_disable() local
2335 sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INT_CMDQ); in msdc_cqe_disable()
2337 sdr_clr_bits(host->base + MSDC_PATCH_BIT1, MSDC_PB1_BUSY_CHECK_SEL); in msdc_cqe_disable()
2340 sdr_set_field(host->base + MSDC_DMA_CTRL, in msdc_cqe_disable()
2342 msdc_reset_hw(host); in msdc_cqe_disable()
2391 struct msdc_host *host) in msdc_of_property_parse() argument
2394 &host->latch_ck); in msdc_of_property_parse()
2397 &host->hs400_ds_delay); in msdc_of_property_parse()
2400 &host->hs200_cmd_int_delay); in msdc_of_property_parse()
2403 &host->hs400_cmd_int_delay); in msdc_of_property_parse()
2407 host->hs400_cmd_resp_sel_rising = true; in msdc_of_property_parse()
2409 host->hs400_cmd_resp_sel_rising = false; in msdc_of_property_parse()
2413 host->cqhci = true; in msdc_of_property_parse()
2415 host->cqhci = false; in msdc_of_property_parse()
2419 struct msdc_host *host) in msdc_of_clock_parse() argument
2423 host->src_clk = devm_clk_get(&pdev->dev, "source"); in msdc_of_clock_parse()
2424 if (IS_ERR(host->src_clk)) in msdc_of_clock_parse()
2425 return PTR_ERR(host->src_clk); in msdc_of_clock_parse()
2427 host->h_clk = devm_clk_get(&pdev->dev, "hclk"); in msdc_of_clock_parse()
2428 if (IS_ERR(host->h_clk)) in msdc_of_clock_parse()
2429 return PTR_ERR(host->h_clk); in msdc_of_clock_parse()
2431 host->bus_clk = devm_clk_get_optional(&pdev->dev, "bus_clk"); in msdc_of_clock_parse()
2432 if (IS_ERR(host->bus_clk)) in msdc_of_clock_parse()
2433 host->bus_clk = NULL; in msdc_of_clock_parse()
2436 host->src_clk_cg = devm_clk_get_optional(&pdev->dev, "source_cg"); in msdc_of_clock_parse()
2437 if (IS_ERR(host->src_clk_cg)) in msdc_of_clock_parse()
2438 host->src_clk_cg = NULL; in msdc_of_clock_parse()
2440 host->sys_clk_cg = devm_clk_get_optional(&pdev->dev, "sys_cg"); in msdc_of_clock_parse()
2441 if (IS_ERR(host->sys_clk_cg)) in msdc_of_clock_parse()
2442 host->sys_clk_cg = NULL; in msdc_of_clock_parse()
2445 clk_prepare_enable(host->sys_clk_cg); in msdc_of_clock_parse()
2447 host->bulk_clks[0].id = "pclk_cg"; in msdc_of_clock_parse()
2448 host->bulk_clks[1].id = "axi_cg"; in msdc_of_clock_parse()
2449 host->bulk_clks[2].id = "ahb_cg"; in msdc_of_clock_parse()
2451 host->bulk_clks); in msdc_of_clock_parse()
2463 struct msdc_host *host; in msdc_drv_probe() local
2472 /* Allocate MMC host for this device */ in msdc_drv_probe()
2477 host = mmc_priv(mmc); in msdc_drv_probe()
2482 host->base = devm_platform_ioremap_resource(pdev, 0); in msdc_drv_probe()
2483 if (IS_ERR(host->base)) { in msdc_drv_probe()
2484 ret = PTR_ERR(host->base); in msdc_drv_probe()
2490 host->top_base = devm_ioremap_resource(&pdev->dev, res); in msdc_drv_probe()
2491 if (IS_ERR(host->top_base)) in msdc_drv_probe()
2492 host->top_base = NULL; in msdc_drv_probe()
2499 ret = msdc_of_clock_parse(pdev, host); in msdc_drv_probe()
2503 host->reset = devm_reset_control_get_optional_exclusive(&pdev->dev, in msdc_drv_probe()
2505 if (IS_ERR(host->reset)) { in msdc_drv_probe()
2506 ret = PTR_ERR(host->reset); in msdc_drv_probe()
2510 host->irq = platform_get_irq(pdev, 0); in msdc_drv_probe()
2511 if (host->irq < 0) { in msdc_drv_probe()
2516 host->pinctrl = devm_pinctrl_get(&pdev->dev); in msdc_drv_probe()
2517 if (IS_ERR(host->pinctrl)) { in msdc_drv_probe()
2518 ret = PTR_ERR(host->pinctrl); in msdc_drv_probe()
2523 host->pins_default = pinctrl_lookup_state(host->pinctrl, "default"); in msdc_drv_probe()
2524 if (IS_ERR(host->pins_default)) { in msdc_drv_probe()
2525 ret = PTR_ERR(host->pins_default); in msdc_drv_probe()
2530 host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs"); in msdc_drv_probe()
2531 if (IS_ERR(host->pins_uhs)) { in msdc_drv_probe()
2532 ret = PTR_ERR(host->pins_uhs); in msdc_drv_probe()
2537 msdc_of_property_parse(pdev, host); in msdc_drv_probe()
2539 host->dev = &pdev->dev; in msdc_drv_probe()
2540 host->dev_comp = of_device_get_match_data(&pdev->dev); in msdc_drv_probe()
2541 host->src_clk_freq = clk_get_rate(host->src_clk); in msdc_drv_probe()
2542 /* Set host parameters to mmc */ in msdc_drv_probe()
2544 if (host->dev_comp->clk_div_bits == 8) in msdc_drv_probe()
2545 mmc->f_min = DIV_ROUND_UP(host->src_clk_freq, 4 * 255); in msdc_drv_probe()
2547 mmc->f_min = DIV_ROUND_UP(host->src_clk_freq, 4 * 4095); in msdc_drv_probe()
2551 host->dev_comp->use_internal_cd) { in msdc_drv_probe()
2556 host->internal_cd = true; in msdc_drv_probe()
2563 if (host->cqhci) in msdc_drv_probe()
2567 if (host->dev_comp->support_64g) in msdc_drv_probe()
2574 if (host->dev_comp->support_64g) in msdc_drv_probe()
2575 host->dma_mask = DMA_BIT_MASK(36); in msdc_drv_probe()
2577 host->dma_mask = DMA_BIT_MASK(32); in msdc_drv_probe()
2578 mmc_dev(mmc)->dma_mask = &host->dma_mask; in msdc_drv_probe()
2580 host->timeout_clks = 3 * 1048576; in msdc_drv_probe()
2581 host->dma.gpd = dma_alloc_coherent(&pdev->dev, in msdc_drv_probe()
2583 &host->dma.gpd_addr, GFP_KERNEL); in msdc_drv_probe()
2584 host->dma.bd = dma_alloc_coherent(&pdev->dev, in msdc_drv_probe()
2586 &host->dma.bd_addr, GFP_KERNEL); in msdc_drv_probe()
2587 if (!host->dma.gpd || !host->dma.bd) { in msdc_drv_probe()
2591 msdc_init_gpd_bd(host, &host->dma); in msdc_drv_probe()
2592 INIT_DELAYED_WORK(&host->req_timeout, msdc_request_timeout); in msdc_drv_probe()
2593 spin_lock_init(&host->lock); in msdc_drv_probe()
2596 msdc_ungate_clock(host); in msdc_drv_probe()
2597 msdc_init_hw(host); in msdc_drv_probe()
2600 host->cq_host = devm_kzalloc(mmc->parent, in msdc_drv_probe()
2601 sizeof(*host->cq_host), in msdc_drv_probe()
2603 if (!host->cq_host) { in msdc_drv_probe()
2607 host->cq_host->caps |= CQHCI_TASK_DESC_SZ_128; in msdc_drv_probe()
2608 host->cq_host->mmio = host->base + 0x800; in msdc_drv_probe()
2609 host->cq_host->ops = &msdc_cmdq_ops; in msdc_drv_probe()
2610 ret = cqhci_init(host->cq_host, mmc, true); in msdc_drv_probe()
2619 ret = devm_request_irq(&pdev->dev, host->irq, msdc_irq, in msdc_drv_probe()
2620 IRQF_TRIGGER_NONE, pdev->name, host); in msdc_drv_probe()
2624 pm_runtime_set_active(host->dev); in msdc_drv_probe()
2625 pm_runtime_set_autosuspend_delay(host->dev, MTK_MMC_AUTOSUSPEND_DELAY); in msdc_drv_probe()
2626 pm_runtime_use_autosuspend(host->dev); in msdc_drv_probe()
2627 pm_runtime_enable(host->dev); in msdc_drv_probe()
2635 pm_runtime_disable(host->dev); in msdc_drv_probe()
2638 msdc_deinit_hw(host); in msdc_drv_probe()
2639 msdc_gate_clock(host); in msdc_drv_probe()
2641 if (host->dma.gpd) in msdc_drv_probe()
2644 host->dma.gpd, host->dma.gpd_addr); in msdc_drv_probe()
2645 if (host->dma.bd) in msdc_drv_probe()
2648 host->dma.bd, host->dma.bd_addr); in msdc_drv_probe()
2658 struct msdc_host *host; in msdc_drv_remove() local
2661 host = mmc_priv(mmc); in msdc_drv_remove()
2663 pm_runtime_get_sync(host->dev); in msdc_drv_remove()
2667 msdc_deinit_hw(host); in msdc_drv_remove()
2668 msdc_gate_clock(host); in msdc_drv_remove()
2670 pm_runtime_disable(host->dev); in msdc_drv_remove()
2671 pm_runtime_put_noidle(host->dev); in msdc_drv_remove()
2674 host->dma.gpd, host->dma.gpd_addr); in msdc_drv_remove()
2676 host->dma.bd, host->dma.bd_addr); in msdc_drv_remove()
2683 static void msdc_save_reg(struct msdc_host *host) in msdc_save_reg() argument
2685 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_save_reg()
2687 host->save_para.msdc_cfg = readl(host->base + MSDC_CFG); in msdc_save_reg()
2688 host->save_para.iocon = readl(host->base + MSDC_IOCON); in msdc_save_reg()
2689 host->save_para.sdc_cfg = readl(host->base + SDC_CFG); in msdc_save_reg()
2690 host->save_para.patch_bit0 = readl(host->base + MSDC_PATCH_BIT); in msdc_save_reg()
2691 host->save_para.patch_bit1 = readl(host->base + MSDC_PATCH_BIT1); in msdc_save_reg()
2692 host->save_para.patch_bit2 = readl(host->base + MSDC_PATCH_BIT2); in msdc_save_reg()
2693 host->save_para.pad_ds_tune = readl(host->base + PAD_DS_TUNE); in msdc_save_reg()
2694 host->save_para.pad_cmd_tune = readl(host->base + PAD_CMD_TUNE); in msdc_save_reg()
2695 host->save_para.emmc50_cfg0 = readl(host->base + EMMC50_CFG0); in msdc_save_reg()
2696 host->save_para.emmc50_cfg3 = readl(host->base + EMMC50_CFG3); in msdc_save_reg()
2697 host->save_para.sdc_fifo_cfg = readl(host->base + SDC_FIFO_CFG); in msdc_save_reg()
2698 if (host->top_base) { in msdc_save_reg()
2699 host->save_para.emmc_top_control = in msdc_save_reg()
2700 readl(host->top_base + EMMC_TOP_CONTROL); in msdc_save_reg()
2701 host->save_para.emmc_top_cmd = in msdc_save_reg()
2702 readl(host->top_base + EMMC_TOP_CMD); in msdc_save_reg()
2703 host->save_para.emmc50_pad_ds_tune = in msdc_save_reg()
2704 readl(host->top_base + EMMC50_PAD_DS_TUNE); in msdc_save_reg()
2706 host->save_para.pad_tune = readl(host->base + tune_reg); in msdc_save_reg()
2710 static void msdc_restore_reg(struct msdc_host *host) in msdc_restore_reg() argument
2712 struct mmc_host *mmc = mmc_from_priv(host); in msdc_restore_reg()
2713 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_restore_reg()
2715 writel(host->save_para.msdc_cfg, host->base + MSDC_CFG); in msdc_restore_reg()
2716 writel(host->save_para.iocon, host->base + MSDC_IOCON); in msdc_restore_reg()
2717 writel(host->save_para.sdc_cfg, host->base + SDC_CFG); in msdc_restore_reg()
2718 writel(host->save_para.patch_bit0, host->base + MSDC_PATCH_BIT); in msdc_restore_reg()
2719 writel(host->save_para.patch_bit1, host->base + MSDC_PATCH_BIT1); in msdc_restore_reg()
2720 writel(host->save_para.patch_bit2, host->base + MSDC_PATCH_BIT2); in msdc_restore_reg()
2721 writel(host->save_para.pad_ds_tune, host->base + PAD_DS_TUNE); in msdc_restore_reg()
2722 writel(host->save_para.pad_cmd_tune, host->base + PAD_CMD_TUNE); in msdc_restore_reg()
2723 writel(host->save_para.emmc50_cfg0, host->base + EMMC50_CFG0); in msdc_restore_reg()
2724 writel(host->save_para.emmc50_cfg3, host->base + EMMC50_CFG3); in msdc_restore_reg()
2725 writel(host->save_para.sdc_fifo_cfg, host->base + SDC_FIFO_CFG); in msdc_restore_reg()
2726 if (host->top_base) { in msdc_restore_reg()
2727 writel(host->save_para.emmc_top_control, in msdc_restore_reg()
2728 host->top_base + EMMC_TOP_CONTROL); in msdc_restore_reg()
2729 writel(host->save_para.emmc_top_cmd, in msdc_restore_reg()
2730 host->top_base + EMMC_TOP_CMD); in msdc_restore_reg()
2731 writel(host->save_para.emmc50_pad_ds_tune, in msdc_restore_reg()
2732 host->top_base + EMMC50_PAD_DS_TUNE); in msdc_restore_reg()
2734 writel(host->save_para.pad_tune, host->base + tune_reg); in msdc_restore_reg()
2738 __msdc_enable_sdio_irq(host, 1); in msdc_restore_reg()
2744 struct msdc_host *host = mmc_priv(mmc); in msdc_runtime_suspend() local
2746 msdc_save_reg(host); in msdc_runtime_suspend()
2747 msdc_gate_clock(host); in msdc_runtime_suspend()
2754 struct msdc_host *host = mmc_priv(mmc); in msdc_runtime_resume() local
2756 msdc_ungate_clock(host); in msdc_runtime_resume()
2757 msdc_restore_reg(host); in msdc_runtime_resume()