Lines Matching refs:smpl_phase
217 int smpl_phase) in dw_mci_hs_set_timing() argument
232 if (smpl_phase == -1) in dw_mci_hs_set_timing()
233 smpl_phase = (hs_timing_cfg[ctrl_id][timing].smpl_phase_max + in dw_mci_hs_set_timing()
238 if (smpl_phase >= USE_DLY_MIN_SMPL && in dw_mci_hs_set_timing()
239 smpl_phase <= USE_DLY_MAX_SMPL) in dw_mci_hs_set_timing()
243 if (smpl_phase >= ENABLE_SHIFT_MIN_SMPL && in dw_mci_hs_set_timing()
244 smpl_phase <= ENABLE_SHIFT_MAX_SMPL) in dw_mci_hs_set_timing()
252 reg_value = FIELD_PREP(UHS_REG_EXT_SAMPLE_PHASE_MASK, smpl_phase) | in dw_mci_hs_set_timing()
372 int smpl_phase = 0; in dw_mci_hi3660_execute_tuning() local
376 for (i = 0; i < NUM_PHASES; ++i, ++smpl_phase) { in dw_mci_hi3660_execute_tuning()
377 smpl_phase %= 32; in dw_mci_hi3660_execute_tuning()
380 dw_mci_hs_set_timing(host, mmc->ios.timing, smpl_phase); in dw_mci_hi3660_execute_tuning()
383 tuning_sample_flag |= (1 << smpl_phase); in dw_mci_hi3660_execute_tuning()
385 tuning_sample_flag &= ~(1 << smpl_phase); in dw_mci_hi3660_execute_tuning()