455 	prop->pcie_aux_dbi_reg_addr = CFG_BASE + mmPCIE_AUX_DBI;  in goya_set_fixed_properties()
497 			(CFG_BASE - SRAM_BASE_ADDR);  in goya_pci_bars_map()
632 	rc = hl_pci_elbi_read(hdev, CFG_BASE + mmCPU_BOOT_DEV_STS0,  in goya_early_init()
867 	region->region_base = CFG_BASE;  in goya_set_pci_memory_regions()
869 	region->offset_in_bar = CFG_BASE - SRAM_BASE_ADDR;  in goya_set_pci_memory_regions()
1018 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_dma_qman()
1019 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_dma_qman()
1020 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_dma_qman()
1021 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_dma_qman()
1024 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_qman()
1026 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_qman()
1067 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_ch()
1069 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_ch()
1077 		sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1000 +  in goya_init_dma_ch()
1080 		sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1007;  in goya_init_dma_ch()
1373 	tpc_eml_address = (mmTPC0_EML_CFG_BASE + tpc_eml_offset - CFG_BASE);  in _goya_tpc_mbist_workaround()
1759 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_qman()
1760 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_qman()
1761 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qman()
1762 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qman()
1765 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_qman()
1767 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_qman()
1808 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_cmdq()
1809 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_cmdq()
1810 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_cmdq()
1811 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_cmdq()
1814 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_cmdq()
1816 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_cmdq()
1846 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qmans()
1847 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qmans()
1866 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_qman()
1867 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_qman()
1868 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qman()
1869 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qman()
1872 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_qman()
1874 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_qman()
1915 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_cmdq()
1916 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_cmdq()
1917 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_cmdq()
1918 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_cmdq()
1921 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_cmdq()
1923 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_cmdq()
1956 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qmans()
1957 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qmans()
2367 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);  in goya_enable_timestamp()
2370 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0);  in goya_enable_timestamp()
2371 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0);  in goya_enable_timestamp()
2374 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1);  in goya_enable_timestamp()
2380 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);  in goya_disable_timestamp()
3589 	sob_start_addr = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_validate_wreg32()
3590 	sob_end_addr = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1023);  in goya_validate_wreg32()
4135 	cq_pkt->addr = cpu_to_le64(CFG_BASE + mmPCIE_DBI_MSIX_DOORBELL_OFF);  in goya_add_end_of_cb_packets()
4192 	if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {  in goya_debugfs_read32()
4193 		*val = RREG32(addr - CFG_BASE);  in goya_debugfs_read32()
4252 	if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {  in goya_debugfs_write32()
4253 		WREG32(addr - CFG_BASE, val);  in goya_debugfs_write32()
4297 	if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {  in goya_debugfs_read64()
4298 		u32 val_l = RREG32(addr - CFG_BASE);  in goya_debugfs_read64()
4299 		u32 val_h = RREG32(addr + sizeof(u32) - CFG_BASE);  in goya_debugfs_read64()
4346 	if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {  in goya_debugfs_write64()
4347 		WREG32(addr - CFG_BASE, lower_32_bits(val));  in goya_debugfs_write64()
4348 		WREG32(addr + sizeof(u32) - CFG_BASE, upper_32_bits(val));  in goya_debugfs_write64()
5009 	sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1007;  in goya_context_switch()
5013 		sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1000 +  in goya_context_switch()