638 	prop->pcie_aux_dbi_reg_addr = CFG_BASE + mmPCIE_AUX_DBI;  in gaudi_set_fixed_properties()
678 			(CFG_BASE - SPI_FLASH_BASE_ADDR);  in gaudi_pci_bars_map()
811 	rc = hl_pci_elbi_read(hdev, CFG_BASE + mmCPU_BOOT_DEV_STS0,  in gaudi_early_init()
1777 	region->region_base = CFG_BASE;  in gaudi_set_pci_memory_regions()
1779 	region->offset_in_bar = CFG_BASE - SPI_FLASH_BASE_ADDR;  in gaudi_set_pci_memory_regions()
2720 	mtr_base_en_lo = lower_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
2722 	mtr_base_en_hi = upper_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
2724 	so_base_en_lo = lower_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
2726 	so_base_en_hi = upper_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
2728 	mtr_base_ws_lo = lower_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
2730 	mtr_base_ws_hi = upper_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
2732 	so_base_ws_lo = lower_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
2734 	so_base_ws_hi = upper_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
2778 			lower_32_bits(CFG_BASE + irq_handler_offset));  in gaudi_init_pci_dma_qman()
2780 			upper_32_bits(CFG_BASE + irq_handler_offset));  in gaudi_init_pci_dma_qman()
2826 		lower_32_bits(CFG_BASE + irq_handler_offset));  in gaudi_init_dma_core()
2828 		upper_32_bits(CFG_BASE + irq_handler_offset));  in gaudi_init_dma_core()
2901 	mtr_base_en_lo = lower_32_bits(CFG_BASE +  in gaudi_init_hbm_dma_qman()
2903 	mtr_base_en_hi = upper_32_bits(CFG_BASE +  in gaudi_init_hbm_dma_qman()
2905 	so_base_en_lo = lower_32_bits(CFG_BASE +  in gaudi_init_hbm_dma_qman()
2907 	so_base_en_hi = upper_32_bits(CFG_BASE +  in gaudi_init_hbm_dma_qman()
2909 	mtr_base_ws_lo = lower_32_bits(CFG_BASE +  in gaudi_init_hbm_dma_qman()
2911 	mtr_base_ws_hi = upper_32_bits(CFG_BASE +  in gaudi_init_hbm_dma_qman()
2913 	so_base_ws_lo = lower_32_bits(CFG_BASE +  in gaudi_init_hbm_dma_qman()
2915 	so_base_ws_hi = upper_32_bits(CFG_BASE +  in gaudi_init_hbm_dma_qman()
2957 			lower_32_bits(CFG_BASE + irq_handler_offset));  in gaudi_init_hbm_dma_qman()
2959 			upper_32_bits(CFG_BASE + irq_handler_offset));  in gaudi_init_hbm_dma_qman()
3043 	mtr_base_lo = lower_32_bits(CFG_BASE +  in gaudi_init_mme_qman()
3045 	mtr_base_hi = upper_32_bits(CFG_BASE +  in gaudi_init_mme_qman()
3047 	so_base_lo = lower_32_bits(CFG_BASE +  in gaudi_init_mme_qman()
3049 	so_base_hi = upper_32_bits(CFG_BASE +  in gaudi_init_mme_qman()
3094 			lower_32_bits(CFG_BASE + irq_handler_offset));  in gaudi_init_mme_qman()
3096 			upper_32_bits(CFG_BASE + irq_handler_offset));  in gaudi_init_mme_qman()
3169 	mtr_base_en_lo = lower_32_bits(CFG_BASE +  in gaudi_init_tpc_qman()
3171 	mtr_base_en_hi = upper_32_bits(CFG_BASE +  in gaudi_init_tpc_qman()
3173 	so_base_en_lo = lower_32_bits(CFG_BASE +  in gaudi_init_tpc_qman()
3175 	so_base_en_hi = upper_32_bits(CFG_BASE +  in gaudi_init_tpc_qman()
3177 	mtr_base_ws_lo = lower_32_bits(CFG_BASE +  in gaudi_init_tpc_qman()
3179 	mtr_base_ws_hi = upper_32_bits(CFG_BASE +  in gaudi_init_tpc_qman()
3181 	so_base_ws_lo = lower_32_bits(CFG_BASE +  in gaudi_init_tpc_qman()
3183 	so_base_ws_hi = upper_32_bits(CFG_BASE +  in gaudi_init_tpc_qman()
3228 			lower_32_bits(CFG_BASE + irq_handler_offset));  in gaudi_init_tpc_qman()
3230 			upper_32_bits(CFG_BASE + irq_handler_offset));  in gaudi_init_tpc_qman()
3279 	so_base_hi = upper_32_bits(CFG_BASE +  in gaudi_init_tpc_qmans()
3321 	mtr_base_en_lo = lower_32_bits(CFG_BASE +  in gaudi_init_nic_qman()
3323 	mtr_base_en_hi = upper_32_bits(CFG_BASE +  in gaudi_init_nic_qman()
3325 	so_base_en_lo = lower_32_bits(CFG_BASE +  in gaudi_init_nic_qman()
3327 	so_base_en_hi = upper_32_bits(CFG_BASE +  in gaudi_init_nic_qman()
3329 	mtr_base_ws_lo = lower_32_bits(CFG_BASE +  in gaudi_init_nic_qman()
3331 	mtr_base_ws_hi = upper_32_bits(CFG_BASE +  in gaudi_init_nic_qman()
3333 	so_base_ws_lo = lower_32_bits(CFG_BASE +  in gaudi_init_nic_qman()
3335 	so_base_ws_hi = upper_32_bits(CFG_BASE +  in gaudi_init_nic_qman()
3379 			lower_32_bits(CFG_BASE + irq_handler_offset));  in gaudi_init_nic_qman()
3381 			upper_32_bits(CFG_BASE + irq_handler_offset));  in gaudi_init_nic_qman()
3823 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);  in gaudi_enable_timestamp()
3826 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0);  in gaudi_enable_timestamp()
3827 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0);  in gaudi_enable_timestamp()
3830 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1);  in gaudi_enable_timestamp()
3836 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);  in gaudi_disable_timestamp()
5832 	cq_pkt->addr = cpu_to_le64(CFG_BASE + msi_addr);  in gaudi_add_end_of_cb_packets()
5990 	base_addr = CFG_BASE + mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_SOB_OBJ_0;  in gaudi_restore_sm_registers()
5998 	base_addr = CFG_BASE +  mmSYNC_MNGR_E_S_SYNC_MNGR_OBJS_SOB_OBJ_0;  in gaudi_restore_sm_registers()
6006 	base_addr = CFG_BASE +  mmSYNC_MNGR_W_N_SYNC_MNGR_OBJS_SOB_OBJ_0;  in gaudi_restore_sm_registers()
6014 	base_addr = CFG_BASE +  mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_MON_STATUS_0;  in gaudi_restore_sm_registers()
6022 	base_addr = CFG_BASE +  mmSYNC_MNGR_E_S_SYNC_MNGR_OBJS_MON_STATUS_0;  in gaudi_restore_sm_registers()
6030 	base_addr = CFG_BASE +  mmSYNC_MNGR_W_N_SYNC_MNGR_OBJS_MON_STATUS_0;  in gaudi_restore_sm_registers()
6038 	base_addr = CFG_BASE +  mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_SOB_OBJ_0 +  in gaudi_restore_sm_registers()
6047 	base_addr = CFG_BASE +  mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_STATUS_0 +  in gaudi_restore_sm_registers()
6066 		u64 sob_addr = CFG_BASE +  in gaudi_restore_dma_registers()
6160 	if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {  in gaudi_debugfs_read32()
6170 			*val = RREG32(addr - CFG_BASE);  in gaudi_debugfs_read32()
6211 	if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {  in gaudi_debugfs_write32()
6221 			WREG32(addr - CFG_BASE, val);  in gaudi_debugfs_write32()
6262 	if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {  in gaudi_debugfs_read64()
6272 			u32 val_l = RREG32(addr - CFG_BASE);  in gaudi_debugfs_read64()
6273 			u32 val_h = RREG32(addr + sizeof(u32) - CFG_BASE);  in gaudi_debugfs_read64()
6317 	if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {  in gaudi_debugfs_write64()
6327 			WREG32(addr - CFG_BASE, lower_32_bits(val));  in gaudi_debugfs_write64()
6328 			WREG32(addr + sizeof(u32) - CFG_BASE,  in gaudi_debugfs_write64()
7183 	if (params->block_address >= CFG_BASE)  in gaudi_extract_ecc_info()
7184 		params->block_address -= CFG_BASE;  in gaudi_extract_ecc_info()
8531 			lower_32_bits(CFG_BASE +  in gaudi_run_tpc_kernel()
8989 	*addr = CFG_BASE + offset;  in gaudi_get_fence_addr()
9143 	reg_value -= (u32)CFG_BASE;  in gaudi_add_sync_to_engine_map_entry()
9340 		fence_cnt = base_offset + CFG_BASE +  in gaudi_print_fences_single_engine()