1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/clk-provider.h>
27 #include <linux/io-64-nonatomic-lo-hi.h>
31 #include "intel-lpss.h"
41 /* Offsets from lpss->priv */
77 	struct mfd_cell *cell;  member
117 	.name = "dw-apb-uart",
123 	.name = "pxa2xx-spi",
133 	lpss->active_ltr = readl(lpss->priv + LPSS_PRIV_ACTIVELTR);  in intel_lpss_cache_ltr()
134 	lpss->idle_ltr = readl(lpss->priv + LPSS_PRIV_IDLELTR);  in intel_lpss_cache_ltr()
141 	dir = debugfs_create_dir(dev_name(lpss->dev), intel_lpss_debugfs);  in intel_lpss_debugfs_add()
148 	debugfs_create_x32("capabilities", S_IRUGO, dir, &lpss->caps);  in intel_lpss_debugfs_add()
149 	debugfs_create_x32("active_ltr", S_IRUGO, dir, &lpss->active_ltr);  in intel_lpss_debugfs_add()
150 	debugfs_create_x32("idle_ltr", S_IRUGO, dir, &lpss->idle_ltr);  in intel_lpss_debugfs_add()
152 	lpss->debugfs = dir;  in intel_lpss_debugfs_add()
158 	debugfs_remove_recursive(lpss->debugfs);  in intel_lpss_debugfs_remove()
169 	 * negative value or PM_QOS_LATENCY_ANY.  in intel_lpss_ltr_set()
171 	ltr = readl(lpss->priv + LPSS_PRIV_ACTIVELTR);  in intel_lpss_ltr_set()
186 	if (ltr == lpss->active_ltr)  in intel_lpss_ltr_set()
189 	writel(ltr, lpss->priv + LPSS_PRIV_ACTIVELTR);  in intel_lpss_ltr_set()
190 	writel(ltr, lpss->priv + LPSS_PRIV_IDLELTR);  in intel_lpss_ltr_set()
198 	lpss->dev->power.set_latency_tolerance = intel_lpss_ltr_set;  in intel_lpss_ltr_expose()
199 	dev_pm_qos_expose_latency_tolerance(lpss->dev);  in intel_lpss_ltr_expose()
204 	dev_pm_qos_hide_latency_tolerance(lpss->dev);  in intel_lpss_ltr_hide()
205 	lpss->dev->power.set_latency_tolerance = NULL;  in intel_lpss_ltr_hide()
210 	const struct mfd_cell *cell;  in intel_lpss_assign_devs()  local
213 	type = lpss->caps & LPSS_PRIV_CAPS_TYPE_MASK;  in intel_lpss_assign_devs()
218 		cell = &intel_lpss_i2c_cell;  in intel_lpss_assign_devs()
221 		cell = &intel_lpss_uart_cell;  in intel_lpss_assign_devs()
224 		cell = &intel_lpss_spi_cell;  in intel_lpss_assign_devs()
227 		return -ENODEV;  in intel_lpss_assign_devs()
230 	lpss->cell = devm_kmemdup(lpss->dev, cell, sizeof(*cell), GFP_KERNEL);  in intel_lpss_assign_devs()
231 	if (!lpss->cell)  in intel_lpss_assign_devs()
232 		return -ENOMEM;  in intel_lpss_assign_devs()
234 	lpss->type = type;  in intel_lpss_assign_devs()
241 	return (lpss->caps & LPSS_PRIV_CAPS_NO_IDMA) == 0;  in intel_lpss_has_idma()
246 	resource_size_t addr = lpss->info->mem->start;  in intel_lpss_set_remap_addr()
248 	lo_hi_writeq(addr, lpss->priv + LPSS_PRIV_REMAP_ADDR);  in intel_lpss_set_remap_addr()
253 	u32 value = LPSS_PRIV_RESETS_FUNC | LPSS_PRIV_RESETS_IDMA;  in intel_lpss_deassert_reset()  local
256 	writel(value, lpss->priv + LPSS_PRIV_RESETS);  in intel_lpss_deassert_reset()
261 	u32 value = LPSS_PRIV_SSP_REG_DIS_DMA_FIN;  in intel_lpss_init_dev()  local
264 	writel(0, lpss->priv + LPSS_PRIV_RESETS);  in intel_lpss_init_dev()
273 	/* Make sure that SPI multiblock DMA transfers are re-enabled */  in intel_lpss_init_dev()
274 	if (lpss->type == LPSS_DEV_SPI)  in intel_lpss_init_dev()
275 		writel(value, lpss->priv + LPSS_PRIV_SSP_REG);  in intel_lpss_init_dev()
296 	snprintf(name, sizeof(name), "%s-enable", devname);  in intel_lpss_register_clock_divider()
298 				lpss->priv, 0, 0, NULL);  in intel_lpss_register_clock_divider()
302 	snprintf(name, sizeof(name), "%s-div", devname);  in intel_lpss_register_clock_divider()
305 					      lpss->priv, 1, 15, 16, 15, 0,  in intel_lpss_register_clock_divider()
311 	snprintf(name, sizeof(name), "%s-update", devname);  in intel_lpss_register_clock_divider()
313 				CLK_SET_RATE_PARENT, lpss->priv, 31, 0, NULL);  in intel_lpss_register_clock_divider()
323 	const struct mfd_cell *cell = lpss->cell;  in intel_lpss_register_clock()  local
328 	if (!lpss->info->clk_rate)  in intel_lpss_register_clock()
332 	clk = clk_register_fixed_rate(NULL, dev_name(lpss->dev), NULL, 0,  in intel_lpss_register_clock()
333 				      lpss->info->clk_rate);  in intel_lpss_register_clock()
337 	snprintf(devname, sizeof(devname), "%s.%d", cell->name, lpss->devid);  in intel_lpss_register_clock()
340 	 * Support for clock divider only if it has some preset value.  in intel_lpss_register_clock()
343 	if (lpss->type != LPSS_DEV_I2C) {  in intel_lpss_register_clock()
349 	ret = -ENOMEM;  in intel_lpss_register_clock()
352 	lpss->clock = clkdev_create(clk, lpss->info->clk_con_id, "%s", devname);  in intel_lpss_register_clock()
353 	if (!lpss->clock)  in intel_lpss_register_clock()
356 	lpss->clk = clk;  in intel_lpss_register_clock()
368 	if (IS_ERR_OR_NULL(lpss->clk))  in intel_lpss_unregister_clock()
371 	clkdev_drop(lpss->clock);  in intel_lpss_unregister_clock()
372 	intel_lpss_unregister_clock_tree(lpss->clk);  in intel_lpss_unregister_clock()
381 	if (!info || !info->mem || info->irq <= 0)  in intel_lpss_probe()
382 		return -EINVAL;  in intel_lpss_probe()
386 		return -ENOMEM;  in intel_lpss_probe()
388 	lpss->priv = devm_ioremap_uc(dev, info->mem->start + LPSS_PRIV_OFFSET,  in intel_lpss_probe()
390 	if (!lpss->priv)  in intel_lpss_probe()
391 		return -ENOMEM;  in intel_lpss_probe()
393 	lpss->info = info;  in intel_lpss_probe()
394 	lpss->dev = dev;  in intel_lpss_probe()
395 	lpss->caps = readl(lpss->priv + LPSS_PRIV_CAPS);  in intel_lpss_probe()
403 	lpss->cell->swnode = info->swnode;  in intel_lpss_probe()
407 	lpss->devid = ida_simple_get(&intel_lpss_devid_ida, 0, 0, GFP_KERNEL);  in intel_lpss_probe()
408 	if (lpss->devid < 0)  in intel_lpss_probe()
409 		return lpss->devid;  in intel_lpss_probe()
422 		ret = mfd_add_devices(dev, lpss->devid, &intel_lpss_idma64_cell,  in intel_lpss_probe()
423 				      1, info->mem, info->irq, NULL);  in intel_lpss_probe()
429 	ret = mfd_add_devices(dev, lpss->devid, lpss->cell,  in intel_lpss_probe()
430 			      1, info->mem, info->irq, NULL);  in intel_lpss_probe()
444 	ida_simple_remove(&intel_lpss_devid_ida, lpss->devid);  in intel_lpss_probe()
458 	ida_simple_remove(&intel_lpss_devid_ida, lpss->devid);  in intel_lpss_remove()
488 		lpss->priv_ctx[i] = readl(lpss->priv + i * 4);  in intel_lpss_suspend()
495 	if (lpss->type != LPSS_DEV_UART)  in intel_lpss_suspend()
496 		writel(0, lpss->priv + LPSS_PRIV_RESETS);  in intel_lpss_suspend()
511 		writel(lpss->priv_ctx[i], lpss->priv + i * 4);  in intel_lpss_resume()