354 	unsigned int num_timings;  member
428 	for (i = 0; i < emc->num_timings; i++) {  in emc_find_timing()
493 	for (i = 0; i < mc->num_timings; i++) {  in emc_prepare_mc_clk_cfg()
946 	if (emc->num_timings != mc->num_timings) {  in emc_check_mc_timings()
948 			emc->num_timings, mc->num_timings);  in emc_check_mc_timings()
952 	for (i = 0; i < mc->num_timings; i++) {  in emc_check_mc_timings()
983 	emc->num_timings = child_count;  in emc_load_timings_from_dt()
994 	sort(emc->timings, emc->num_timings, sizeof(*timing), cmp_timings,  in emc_load_timings_from_dt()
1003 		      emc->num_timings,  in emc_load_timings_from_dt()
1006 		      emc->timings[emc->num_timings - 1].rate / 1000000);  in emc_load_timings_from_dt()
1091 	if (!emc->num_timings)  in emc_round_rate()
1094 	min_rate = min(min_rate, emc->timings[emc->num_timings - 1].rate);  in emc_round_rate()
1096 	for (i = 0; i < emc->num_timings; i++) {  in emc_round_rate()
1097 		if (emc->timings[i].rate < rate && i != emc->num_timings - 1)  in emc_round_rate()
1229 	for (i = 0; i < emc->num_timings; i++)  in tegra_emc_validate_rate()
1242 	for (i = 0; i < emc->num_timings; i++) {  in tegra_emc_debug_available_rates_show()
1335 	for (i = 0; i < emc->num_timings; i++) {  in tegra_emc_debugfs_init()
1343 	if (!emc->num_timings) {  in tegra_emc_debugfs_init()