394 		dev_err(emc->dev, "failed to update timing: %d\n", err);  in emc_seq_update_timing()
425 	struct emc_timing *timing = NULL;  in emc_find_timing()  local
430 			timing = &emc->timings[i];  in emc_find_timing()
435 	if (!timing) {  in emc_find_timing()
436 		dev_err(emc->dev, "no timing for rate %lu\n", rate);  in emc_find_timing()
440 	return timing;  in emc_find_timing()
443 static bool emc_dqs_preset(struct tegra_emc *emc, struct emc_timing *timing,  in emc_dqs_preset()  argument
449 	if (timing->data[71] & EMC_XM2DQSPADCTRL2_VREF_ENABLE) {  in emc_dqs_preset()
460 	if (timing->data[78] & EMC_XM2DQSPADCTRL3_VREF_ENABLE) {  in emc_dqs_preset()
471 	if (timing->data[77] & EMC_XM2QUSEPADCTRL_IVREF_ENABLE) {  in emc_dqs_preset()
510 	struct emc_timing *timing = emc_find_timing(emc, rate);  in emc_prepare_timing_change()  local
523 	if (!timing || emc->bad_state)  in emc_prepare_timing_change()
526 	dev_dbg(emc->dev, "%s: using timing rate %lu for requested rate %lu\n",  in emc_prepare_timing_change()
527 		__func__, timing->rate, rate);  in emc_prepare_timing_change()
542 	if (emc->dll_on == !!(timing->emc_mode_1 & 0x1))  in emc_prepare_timing_change()
544 	else if (timing->emc_mode_1 & 0x1)  in emc_prepare_timing_change()
549 	emc->dll_on = !!(timing->emc_mode_1 & 0x1);  in emc_prepare_timing_change()
551 	if (timing->data[80] && !readl_relaxed(emc->regs + EMC_ZCAL_INTERVAL))  in emc_prepare_timing_change()
586 	if (emc_dqs_preset(emc, timing, &schmitt_to_vref)) {  in emc_prepare_timing_change()
600 	if (timing->emc_auto_cal_interval) {  in emc_prepare_timing_change()
602 		val ^= timing->data[74];  in emc_prepare_timing_change()
621 	for (i = 0; i < ARRAY_SIZE(timing->data); i++) {  in emc_prepare_timing_change()
624 			writel_relaxed(timing->data[i],  in emc_prepare_timing_change()
628 	err = tegra_mc_write_emem_configuration(emc->mc, timing->rate);  in emc_prepare_timing_change()
639 		val = timing->data[82] & EMC_MRS_WAIT_CNT_SHORT_WAIT_MASK;  in emc_prepare_timing_change()
643 		val = timing->data[82] & ~EMC_MRS_WAIT_CNT_LONG_WAIT_MASK;  in emc_prepare_timing_change()
659 		new_mode = timing->data[39] & EMC_CFG5_QUSE_MODE_MASK;  in emc_prepare_timing_change()
688 			writel_relaxed(timing->emc_mode_1,  in emc_prepare_timing_change()
701 	writel_relaxed(timing->data[73], emc->regs + EMC_XM2CLKPADCTRL);  in emc_prepare_timing_change()
705 	if (qrst_used || timing->emc_cfg_periodic_qrst != val) {  in emc_prepare_timing_change()
706 		if (timing->emc_cfg_periodic_qrst)  in emc_prepare_timing_change()
722 		if (timing->emc_mode_1 != emc->emc_mode_1)  in emc_prepare_timing_change()
723 			writel_relaxed(timing->emc_mode_1,  in emc_prepare_timing_change()
726 		if (timing->emc_mode_2 != emc->emc_mode_2)  in emc_prepare_timing_change()
727 			writel_relaxed(timing->emc_mode_2,  in emc_prepare_timing_change()
730 		if (timing->emc_mode_reset != emc->emc_mode_reset ||  in emc_prepare_timing_change()
732 			val = timing->emc_mode_reset;  in emc_prepare_timing_change()
742 		if (timing->emc_mode_2 != emc->emc_mode_2)  in emc_prepare_timing_change()
743 			writel_relaxed(timing->emc_mode_2,  in emc_prepare_timing_change()
746 		if (timing->emc_mode_1 != emc->emc_mode_1)  in emc_prepare_timing_change()
747 			writel_relaxed(timing->emc_mode_1,  in emc_prepare_timing_change()
751 	emc->emc_mode_1 = timing->emc_mode_1;  in emc_prepare_timing_change()
752 	emc->emc_mode_2 = timing->emc_mode_2;  in emc_prepare_timing_change()
753 	emc->emc_mode_reset = timing->emc_mode_reset;  in emc_prepare_timing_change()
780 	struct emc_timing *timing = emc_find_timing(emc, rate);  in emc_complete_timing_change()  local
800 		writel_relaxed(timing->emc_auto_cal_interval,  in emc_complete_timing_change()
804 	if (timing->emc_cfg_dyn_self_ref) {  in emc_complete_timing_change()
811 		writel_relaxed(timing->emc_zcal_cnt_long,  in emc_complete_timing_change()
817 	/* update restored timing */  in emc_complete_timing_change()
833 		dev_err(emc->dev, "timing configuration can't be reverted\n");  in emc_unprepare_timing_change()
874 				   struct emc_timing *timing,  in load_one_timing_from_dt()  argument
882 		dev_err(emc->dev, "timing %pOF: failed to read rate: %d\n",  in load_one_timing_from_dt()
887 	timing->rate = value;  in load_one_timing_from_dt()
890 					 timing->data,  in load_one_timing_from_dt()
894 			"timing %pOF: failed to read emc timing data: %d\n",  in load_one_timing_from_dt()
900 	timing->prop = of_property_read_bool(node, dtprop);  in load_one_timing_from_dt()
903 	err = of_property_read_u32(node, dtprop, &timing->prop); \  in load_one_timing_from_dt()
906 			"timing %pOFn: failed to read " #prop ": %d\n", \  in load_one_timing_from_dt()
922 	dev_dbg(emc->dev, "%s: %pOF: rate %lu\n", __func__, node, timing->rate);  in load_one_timing_from_dt()
955 				"emc/mc timing rate mismatch: %lu %lu\n",  in emc_check_mc_timings()
968 	struct emc_timing *timing;  in emc_load_timings_from_dt()  local
978 	emc->timings = devm_kcalloc(emc->dev, child_count, sizeof(*timing),  in emc_load_timings_from_dt()
984 	timing = emc->timings;  in emc_load_timings_from_dt()
987 		err = load_one_timing_from_dt(emc, timing++, child);  in emc_load_timings_from_dt()
994 	sort(emc->timings, emc->num_timings, sizeof(*timing), cmp_timings,  in emc_load_timings_from_dt()
1087 	struct emc_timing *timing = NULL;  in emc_round_rate()  local
1110 		timing = &emc->timings[i];  in emc_round_rate()
1114 	if (!timing) {  in emc_round_rate()
1115 		dev_err(emc->dev, "no timing for rate %lu min %lu max %lu\n",  in emc_round_rate()
1120 	return timing->rate;  in emc_round_rate()