Lines Matching +full:cs +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2005-2006 Nokia Corporation
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
31 #include <linux/omap-gpmc.h>
35 #include <linux/platform_data/mtd-nand-omap2.h>
37 #define DEVICE_NAME "omap-gpmc"
79 #define GPMC_CONFIG_LIMITEDADDRESS BIT(1)
95 * The first 1MB of GPMC address space is typically mapped to
136 #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31)
137 #define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30)
139 #define GPMC_CONFIG1_READTYPE_SYNC (1 << 29)
140 #define GPMC_CONFIG1_WRITEMULTIPLE_SUPP (1 << 28)
142 #define GPMC_CONFIG1_WRITETYPE_SYNC (1 << 27)
149 #define GPMC_CONFIG1_WAIT_READ_MON (1 << 22)
150 #define GPMC_CONFIG1_WAIT_WRITE_MON (1 << 21)
156 #define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1)
158 #define GPMC_CONFIG1_DEVICESIZE_MAX 1
162 #define GPMC_CONFIG1_TIME_PARA_GRAN (1 << 4)
164 #define GPMC_CONFIG1_FCLK_DIV2 (GPMC_CONFIG1_FCLK_DIV(1))
167 #define GPMC_CONFIG7_CSVALID (1 << 6)
185 #define GPMC_ECC_WRITE 1 /* Reset Hardware ECC for write */
198 #define GPMC_CS_RESERVED (1 << 0)
204 /* Structure to save gpmc cs context */
239 unsigned int is_suspended:1;
247 /* Define chip-selects as reserved by default until probe completes */
267 void gpmc_cs_write_reg(int cs, int idx, u32 val) in gpmc_cs_write_reg() argument
271 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; in gpmc_cs_write_reg()
275 static u32 gpmc_cs_read_reg(int cs, int idx) in gpmc_cs_read_reg() argument
279 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; in gpmc_cs_read_reg()
295 * gpmc_get_clk_period - get period of selected clock domain in ps
296 * @cs: Chip Select Region.
299 * GPMC_CS_CONFIG1 GPMCFCLKDIVIDER for cs has to be setup
302 static unsigned long gpmc_get_clk_period(int cs, enum gpmc_clk_domain cd) in gpmc_get_clk_period() argument
311 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); in gpmc_get_clk_period()
312 div = (l & 0x03) + 1; in gpmc_get_clk_period()
324 static unsigned int gpmc_ns_to_clk_ticks(unsigned int time_ns, int cs, in gpmc_ns_to_clk_ticks() argument
330 tick_ps = gpmc_get_clk_period(cs, cd); in gpmc_ns_to_clk_ticks()
332 return (time_ns * 1000 + tick_ps - 1) / tick_ps; in gpmc_ns_to_clk_ticks()
337 return gpmc_ns_to_clk_ticks(time_ns, /* any CS */ 0, GPMC_CD_FCLK); in gpmc_ns_to_ticks()
347 return (time_ps + tick_ps - 1) / tick_ps; in gpmc_ps_to_ticks()
350 static unsigned int gpmc_clk_ticks_to_ns(unsigned int ticks, int cs, in gpmc_clk_ticks_to_ns() argument
353 return ticks * gpmc_get_clk_period(cs, cd) / 1000; in gpmc_clk_ticks_to_ns()
358 return gpmc_clk_ticks_to_ns(ticks, /* any CS */ 0, GPMC_CD_FCLK); in gpmc_ticks_to_ns()
373 static inline void gpmc_cs_modify_reg(int cs, int reg, u32 mask, bool value) in gpmc_cs_modify_reg() argument
377 l = gpmc_cs_read_reg(cs, reg); in gpmc_cs_modify_reg()
382 gpmc_cs_write_reg(cs, reg, l); in gpmc_cs_modify_reg()
385 static void gpmc_cs_bool_timings(int cs, const struct gpmc_bool_timings *p) in gpmc_cs_bool_timings() argument
387 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG1, in gpmc_cs_bool_timings()
389 p->time_para_granularity); in gpmc_cs_bool_timings()
390 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG2, in gpmc_cs_bool_timings()
391 GPMC_CONFIG2_CSEXTRADELAY, p->cs_extra_delay); in gpmc_cs_bool_timings()
392 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG3, in gpmc_cs_bool_timings()
393 GPMC_CONFIG3_ADVEXTRADELAY, p->adv_extra_delay); in gpmc_cs_bool_timings()
394 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG4, in gpmc_cs_bool_timings()
395 GPMC_CONFIG4_OEEXTRADELAY, p->oe_extra_delay); in gpmc_cs_bool_timings()
396 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG4, in gpmc_cs_bool_timings()
397 GPMC_CONFIG4_WEEXTRADELAY, p->we_extra_delay); in gpmc_cs_bool_timings()
398 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG6, in gpmc_cs_bool_timings()
400 p->cycle2cyclesamecsen); in gpmc_cs_bool_timings()
401 gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG6, in gpmc_cs_bool_timings()
403 p->cycle2cyclediffcsen); in gpmc_cs_bool_timings()
408 * get_gpmc_timing_reg - read a timing parameter and print DTS settings for it.
409 * @cs: Chip Select Region
420 * tick format: gpmc,name = <value> /‍* x ns -- y ns; x ticks *‍/
421 * Where x ns -- y ns result in the same tick value.
429 int cs, int reg, int st_bit, int end_bit, int max, in get_gpmc_timing_reg() argument
441 l = gpmc_cs_read_reg(cs, reg); in get_gpmc_timing_reg()
442 nr_bits = end_bit - st_bit + 1; in get_gpmc_timing_reg()
443 mask = (1 << nr_bits) - 1; in get_gpmc_timing_reg()
458 time_ns_min = gpmc_clk_ticks_to_ns(l - 1, cs, cd) + 1; in get_gpmc_timing_reg()
459 time_ns = gpmc_clk_ticks_to_ns(l, cs, cd); in get_gpmc_timing_reg()
460 pr_info("gpmc,%s = <%u>; /* %u ns - %u ns; %i ticks%s*/\n", in get_gpmc_timing_reg()
472 #define GPMC_PRINT_CONFIG(cs, config) \ argument
473 pr_info("cs%i %s: 0x%08x\n", cs, #config, \
474 gpmc_cs_read_reg(cs, config))
476 get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, GPMC_CD_FCLK, 0, 1, 0)
478 get_gpmc_timing_reg(cs, (reg), (st), (end), (max), field, GPMC_CD_FCLK, 0, 1, 0)
480 get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, GPMC_CD_FCLK, 0, 1, 1)
482 get_gpmc_timing_reg(cs, (reg), (st), (end), (max), field, GPMC_CD_FCLK, (shift), 1, 1)
484 get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, GPMC_CD_FCLK, 0, 0, 0)
486 get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, (cd), 0, 0, 0)
488 get_gpmc_timing_reg(cs, (reg), (st), (end), (max), field, (cd), 0, 0, 0)
490 static void gpmc_show_regs(int cs, const char *desc) in gpmc_show_regs() argument
492 pr_info("gpmc cs%i %s:\n", cs, desc); in gpmc_show_regs()
493 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG1); in gpmc_show_regs()
494 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG2); in gpmc_show_regs()
495 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG3); in gpmc_show_regs()
496 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG4); in gpmc_show_regs()
497 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG5); in gpmc_show_regs()
498 GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG6); in gpmc_show_regs()
502 * Note that gpmc,wait-pin handing wrongly assumes bit 8 is available,
505 static void gpmc_cs_show_timings(int cs, const char *desc) in gpmc_cs_show_timings() argument
507 gpmc_show_regs(cs, desc); in gpmc_cs_show_timings()
509 pr_info("gpmc cs%i access configuration:\n", cs); in gpmc_cs_show_timings()
510 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 4, 4, "time-para-granularity"); in gpmc_cs_show_timings()
511 GPMC_GET_RAW(GPMC_CS_CONFIG1, 8, 9, "mux-add-data"); in gpmc_cs_show_timings()
512 GPMC_GET_RAW_SHIFT_MAX(GPMC_CS_CONFIG1, 12, 13, 1, in gpmc_cs_show_timings()
513 GPMC_CONFIG1_DEVICESIZE_MAX, "device-width"); in gpmc_cs_show_timings()
514 GPMC_GET_RAW(GPMC_CS_CONFIG1, 16, 17, "wait-pin"); in gpmc_cs_show_timings()
515 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 21, 21, "wait-on-write"); in gpmc_cs_show_timings()
516 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 22, 22, "wait-on-read"); in gpmc_cs_show_timings()
519 "burst-length"); in gpmc_cs_show_timings()
520 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 27, 27, "sync-write"); in gpmc_cs_show_timings()
521 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 28, 28, "burst-write"); in gpmc_cs_show_timings()
522 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 29, 29, "gpmc,sync-read"); in gpmc_cs_show_timings()
523 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 30, 30, "burst-read"); in gpmc_cs_show_timings()
524 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 31, 31, "burst-wrap"); in gpmc_cs_show_timings()
526 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG2, 7, 7, "cs-extra-delay"); in gpmc_cs_show_timings()
528 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG3, 7, 7, "adv-extra-delay"); in gpmc_cs_show_timings()
530 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG4, 23, 23, "we-extra-delay"); in gpmc_cs_show_timings()
531 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG4, 7, 7, "oe-extra-delay"); in gpmc_cs_show_timings()
533 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG6, 7, 7, "cycle2cycle-samecsen"); in gpmc_cs_show_timings()
534 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG6, 6, 6, "cycle2cycle-diffcsen"); in gpmc_cs_show_timings()
536 pr_info("gpmc cs%i timings configuration:\n", cs); in gpmc_cs_show_timings()
537 GPMC_GET_TICKS(GPMC_CS_CONFIG2, 0, 3, "cs-on-ns"); in gpmc_cs_show_timings()
538 GPMC_GET_TICKS(GPMC_CS_CONFIG2, 8, 12, "cs-rd-off-ns"); in gpmc_cs_show_timings()
539 GPMC_GET_TICKS(GPMC_CS_CONFIG2, 16, 20, "cs-wr-off-ns"); in gpmc_cs_show_timings()
541 GPMC_GET_TICKS(GPMC_CS_CONFIG3, 0, 3, "adv-on-ns"); in gpmc_cs_show_timings()
542 GPMC_GET_TICKS(GPMC_CS_CONFIG3, 8, 12, "adv-rd-off-ns"); in gpmc_cs_show_timings()
543 GPMC_GET_TICKS(GPMC_CS_CONFIG3, 16, 20, "adv-wr-off-ns"); in gpmc_cs_show_timings()
545 GPMC_GET_TICKS(GPMC_CS_CONFIG3, 4, 6, "adv-aad-mux-on-ns"); in gpmc_cs_show_timings()
547 "adv-aad-mux-rd-off-ns"); in gpmc_cs_show_timings()
549 "adv-aad-mux-wr-off-ns"); in gpmc_cs_show_timings()
552 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 0, 3, "oe-on-ns"); in gpmc_cs_show_timings()
553 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 8, 12, "oe-off-ns"); in gpmc_cs_show_timings()
555 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 4, 6, "oe-aad-mux-on-ns"); in gpmc_cs_show_timings()
556 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 13, 15, "oe-aad-mux-off-ns"); in gpmc_cs_show_timings()
558 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 16, 19, "we-on-ns"); in gpmc_cs_show_timings()
559 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 24, 28, "we-off-ns"); in gpmc_cs_show_timings()
561 GPMC_GET_TICKS(GPMC_CS_CONFIG5, 0, 4, "rd-cycle-ns"); in gpmc_cs_show_timings()
562 GPMC_GET_TICKS(GPMC_CS_CONFIG5, 8, 12, "wr-cycle-ns"); in gpmc_cs_show_timings()
563 GPMC_GET_TICKS(GPMC_CS_CONFIG5, 16, 20, "access-ns"); in gpmc_cs_show_timings()
565 GPMC_GET_TICKS(GPMC_CS_CONFIG5, 24, 27, "page-burst-access-ns"); in gpmc_cs_show_timings()
567 GPMC_GET_TICKS(GPMC_CS_CONFIG6, 0, 3, "bus-turnaround-ns"); in gpmc_cs_show_timings()
568 GPMC_GET_TICKS(GPMC_CS_CONFIG6, 8, 11, "cycle2cycle-delay-ns"); in gpmc_cs_show_timings()
572 "wait-monitoring-ns", GPMC_CD_CLK); in gpmc_cs_show_timings()
575 "clk-activation-ns", GPMC_CD_FCLK); in gpmc_cs_show_timings()
577 GPMC_GET_TICKS(GPMC_CS_CONFIG6, 16, 19, "wr-data-mux-bus-ns"); in gpmc_cs_show_timings()
578 GPMC_GET_TICKS(GPMC_CS_CONFIG6, 24, 28, "wr-access-ns"); in gpmc_cs_show_timings()
581 static inline void gpmc_cs_show_timings(int cs, const char *desc) in gpmc_cs_show_timings() argument
587 * set_gpmc_timing_reg - set a single timing parameter for Chip Select Region.
591 * @cs: Chip Select Region.
600 * @return: 0 on success, -1 on error.
602 static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, int max, in set_gpmc_timing_reg() argument
611 ticks = gpmc_ns_to_clk_ticks(time, cs, cd); in set_gpmc_timing_reg()
612 nr_bits = end_bit - st_bit + 1; in set_gpmc_timing_reg()
613 mask = (1 << nr_bits) - 1; in set_gpmc_timing_reg()
619 pr_err("%s: GPMC CS%d: %s %d ns, %d ticks > %d ticks\n", in set_gpmc_timing_reg()
620 __func__, cs, name, time, ticks, max); in set_gpmc_timing_reg()
622 return -1; in set_gpmc_timing_reg()
625 l = gpmc_cs_read_reg(cs, reg); in set_gpmc_timing_reg()
627 pr_info("GPMC CS%d: %-17s: %3d ticks, %3lu ns (was %3i ticks) %3d ns\n", in set_gpmc_timing_reg()
628 cs, name, ticks, gpmc_get_clk_period(cs, cd) * ticks / 1000, in set_gpmc_timing_reg()
633 gpmc_cs_write_reg(cs, reg, l); in set_gpmc_timing_reg()
639 * gpmc_calc_waitmonitoring_divider - calculate proper GPMCFCLKDIVIDER based on WAITMONITORINGTIME
641 * read --> don't sample bus too early
642 * write --> data is longer on bus
645 * gpmc_clk_div + 1 = ceil(ceil(waitmonitoringtime_ns / gpmc_fclk_ns)
647 * WAITMONITORINGTIME resulting in 0 or 1 tick with div = 1 are caught by
651 * @return: -1 on failure to scale, else proper divider > 0.
657 div += GPMC_CONFIG1_WAITMONITORINGTIME_MAX - 1; in gpmc_calc_waitmonitoring_divider()
661 return -1; in gpmc_calc_waitmonitoring_divider()
663 div = 1; in gpmc_calc_waitmonitoring_divider()
669 * gpmc_calc_divider - calculate GPMC_FCLK divider for sync_clk GPMC_CLK period.
671 * @return: Returns at least 1 if GPMC_FCLK can be divided to GPMC_CLK.
672 * Else, returns -1.
679 return -1; in gpmc_calc_divider()
681 div = 1; in gpmc_calc_divider()
687 * gpmc_cs_set_timings - program timing parameters for Chip Select Region.
688 * @cs: Chip Select Region.
691 * @return: 0 on success, -1 on error.
693 int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t, in gpmc_cs_set_timings() argument
699 div = gpmc_calc_divider(t->sync_clk); in gpmc_cs_set_timings()
701 return -EINVAL; in gpmc_cs_set_timings()
706 * Calculate GPMCFCLKDIVIDER independent of gpmc,sync-clk-ps in DT for in gpmc_cs_set_timings()
716 if (!s->sync_read && !s->sync_write && in gpmc_cs_set_timings()
717 (s->wait_on_read || s->wait_on_write) in gpmc_cs_set_timings()
719 div = gpmc_calc_waitmonitoring_divider(t->wait_monitoring); in gpmc_cs_set_timings()
723 t->wait_monitoring in gpmc_cs_set_timings()
725 return -ENXIO; in gpmc_cs_set_timings()
730 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG2, 0, 3, 0, t->cs_on, in gpmc_cs_set_timings()
732 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG2, 8, 12, 0, t->cs_rd_off, in gpmc_cs_set_timings()
734 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG2, 16, 20, 0, t->cs_wr_off, in gpmc_cs_set_timings()
737 return -ENXIO; in gpmc_cs_set_timings()
739 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 0, 3, 0, t->adv_on, in gpmc_cs_set_timings()
741 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 8, 12, 0, t->adv_rd_off, in gpmc_cs_set_timings()
743 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 16, 20, 0, t->adv_wr_off, in gpmc_cs_set_timings()
746 return -ENXIO; in gpmc_cs_set_timings()
749 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 4, 6, 0, in gpmc_cs_set_timings()
750 t->adv_aad_mux_on, GPMC_CD_FCLK, in gpmc_cs_set_timings()
752 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 24, 26, 0, in gpmc_cs_set_timings()
753 t->adv_aad_mux_rd_off, GPMC_CD_FCLK, in gpmc_cs_set_timings()
755 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 28, 30, 0, in gpmc_cs_set_timings()
756 t->adv_aad_mux_wr_off, GPMC_CD_FCLK, in gpmc_cs_set_timings()
759 return -ENXIO; in gpmc_cs_set_timings()
762 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 0, 3, 0, t->oe_on, in gpmc_cs_set_timings()
764 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 8, 12, 0, t->oe_off, in gpmc_cs_set_timings()
767 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 4, 6, 0, in gpmc_cs_set_timings()
768 t->oe_aad_mux_on, GPMC_CD_FCLK, in gpmc_cs_set_timings()
770 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 13, 15, 0, in gpmc_cs_set_timings()
771 t->oe_aad_mux_off, GPMC_CD_FCLK, in gpmc_cs_set_timings()
774 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 16, 19, 0, t->we_on, in gpmc_cs_set_timings()
776 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 24, 28, 0, t->we_off, in gpmc_cs_set_timings()
779 return -ENXIO; in gpmc_cs_set_timings()
781 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 0, 4, 0, t->rd_cycle, in gpmc_cs_set_timings()
783 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 8, 12, 0, t->wr_cycle, in gpmc_cs_set_timings()
785 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 16, 20, 0, t->access, in gpmc_cs_set_timings()
787 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 24, 27, 0, in gpmc_cs_set_timings()
788 t->page_burst_access, GPMC_CD_FCLK, in gpmc_cs_set_timings()
791 return -ENXIO; in gpmc_cs_set_timings()
793 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 0, 3, 0, in gpmc_cs_set_timings()
794 t->bus_turnaround, GPMC_CD_FCLK, in gpmc_cs_set_timings()
796 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 8, 11, 0, in gpmc_cs_set_timings()
797 t->cycle2cycle_delay, GPMC_CD_FCLK, in gpmc_cs_set_timings()
800 return -ENXIO; in gpmc_cs_set_timings()
803 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 16, 19, 0, in gpmc_cs_set_timings()
804 t->wr_data_mux_bus, GPMC_CD_FCLK, in gpmc_cs_set_timings()
807 return -ENXIO; in gpmc_cs_set_timings()
810 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG6, 24, 28, 0, in gpmc_cs_set_timings()
811 t->wr_access, GPMC_CD_FCLK, in gpmc_cs_set_timings()
814 return -ENXIO; in gpmc_cs_set_timings()
817 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); in gpmc_cs_set_timings()
819 l |= (div - 1); in gpmc_cs_set_timings()
820 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, l); in gpmc_cs_set_timings()
823 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG1, 18, 19, in gpmc_cs_set_timings()
825 t->wait_monitoring, GPMC_CD_CLK, in gpmc_cs_set_timings()
827 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG1, 25, 26, in gpmc_cs_set_timings()
829 t->clk_activation, GPMC_CD_FCLK, in gpmc_cs_set_timings()
832 return -ENXIO; in gpmc_cs_set_timings()
835 pr_info("GPMC CS%d CLK period is %lu ns (div %d)\n", in gpmc_cs_set_timings()
836 cs, (div * gpmc_get_fclk_period()) / 1000, div); in gpmc_cs_set_timings()
839 gpmc_cs_bool_timings(cs, &t->bool_timings); in gpmc_cs_set_timings()
840 gpmc_cs_show_timings(cs, "after gpmc_cs_set_timings"); in gpmc_cs_set_timings()
845 static int gpmc_cs_set_memconf(int cs, u32 base, u32 size) in gpmc_cs_set_memconf() argument
854 if (base & (size - 1)) in gpmc_cs_set_memconf()
855 return -EINVAL; in gpmc_cs_set_memconf()
858 mask = (1 << GPMC_SECTION_SHIFT) - size; in gpmc_cs_set_memconf()
862 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); in gpmc_cs_set_memconf()
867 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); in gpmc_cs_set_memconf()
872 static void gpmc_cs_enable_mem(int cs) in gpmc_cs_enable_mem() argument
876 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); in gpmc_cs_enable_mem()
878 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); in gpmc_cs_enable_mem()
881 static void gpmc_cs_disable_mem(int cs) in gpmc_cs_disable_mem() argument
885 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); in gpmc_cs_disable_mem()
887 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); in gpmc_cs_disable_mem()
890 static void gpmc_cs_get_memconf(int cs, u32 *base, u32 *size) in gpmc_cs_get_memconf() argument
895 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); in gpmc_cs_get_memconf()
898 *size = (1 << GPMC_SECTION_SHIFT) - (mask << GPMC_CHUNK_SHIFT); in gpmc_cs_get_memconf()
901 static int gpmc_cs_mem_enabled(int cs) in gpmc_cs_mem_enabled() argument
905 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); in gpmc_cs_mem_enabled()
909 static void gpmc_cs_set_reserved(int cs, int reserved) in gpmc_cs_set_reserved() argument
911 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_set_reserved()
913 gpmc->flags |= GPMC_CS_RESERVED; in gpmc_cs_set_reserved()
916 static bool gpmc_cs_reserved(int cs) in gpmc_cs_reserved() argument
918 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_reserved()
920 return gpmc->flags & GPMC_CS_RESERVED; in gpmc_cs_reserved()
927 size = (size - 1) >> (GPMC_CHUNK_SHIFT - 1); in gpmc_mem_align()
928 order = GPMC_CHUNK_SHIFT - 1; in gpmc_mem_align()
930 size >>= 1; in gpmc_mem_align()
933 size = 1 << order; in gpmc_mem_align()
937 static int gpmc_cs_insert_mem(int cs, unsigned long base, unsigned long size) in gpmc_cs_insert_mem() argument
939 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_insert_mem()
940 struct resource *res = &gpmc->mem; in gpmc_cs_insert_mem()
945 res->start = base; in gpmc_cs_insert_mem()
946 res->end = base + size - 1; in gpmc_cs_insert_mem()
953 static int gpmc_cs_delete_mem(int cs) in gpmc_cs_delete_mem() argument
955 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_delete_mem()
956 struct resource *res = &gpmc->mem; in gpmc_cs_delete_mem()
961 res->start = 0; in gpmc_cs_delete_mem()
962 res->end = 0; in gpmc_cs_delete_mem()
968 int gpmc_cs_request(int cs, unsigned long size, unsigned long *base) in gpmc_cs_request() argument
970 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_request()
971 struct resource *res = &gpmc->mem; in gpmc_cs_request()
972 int r = -1; in gpmc_cs_request()
974 if (cs >= gpmc_cs_num) { in gpmc_cs_request()
975 pr_err("%s: requested chip-select is disabled\n", __func__); in gpmc_cs_request()
976 return -ENODEV; in gpmc_cs_request()
979 if (size > (1 << GPMC_SECTION_SHIFT)) in gpmc_cs_request()
980 return -ENOMEM; in gpmc_cs_request()
983 if (gpmc_cs_reserved(cs)) { in gpmc_cs_request()
984 r = -EBUSY; in gpmc_cs_request()
987 if (gpmc_cs_mem_enabled(cs)) in gpmc_cs_request()
988 r = adjust_resource(res, res->start & ~(size - 1), size); in gpmc_cs_request()
995 /* Disable CS while changing base address and size mask */ in gpmc_cs_request()
996 gpmc_cs_disable_mem(cs); in gpmc_cs_request()
998 r = gpmc_cs_set_memconf(cs, res->start, resource_size(res)); in gpmc_cs_request()
1004 /* Enable CS */ in gpmc_cs_request()
1005 gpmc_cs_enable_mem(cs); in gpmc_cs_request()
1006 *base = res->start; in gpmc_cs_request()
1007 gpmc_cs_set_reserved(cs, 1); in gpmc_cs_request()
1014 void gpmc_cs_free(int cs) in gpmc_cs_free() argument
1020 if (cs >= gpmc_cs_num || cs < 0 || !gpmc_cs_reserved(cs)) { in gpmc_cs_free()
1021 WARN(1, "Trying to free non-reserved GPMC CS%d\n", cs); in gpmc_cs_free()
1025 gpmc = &gpmc_cs[cs]; in gpmc_cs_free()
1026 res = &gpmc->mem; in gpmc_cs_free()
1028 gpmc_cs_disable_mem(cs); in gpmc_cs_free()
1029 if (res->flags) in gpmc_cs_free()
1031 gpmc_cs_set_reserved(cs, 0); in gpmc_cs_free()
1037 * gpmc_configure - write request to configure gpmc
1058 return -EINVAL; in gpmc_configure()
1078 * gpmc_omap_get_nand_ops - Get the GPMC NAND interface
1080 * @cs: GPMC chip select number on which the NAND sits. The
1083 * Returns NULL on error e.g. invalid cs.
1085 struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *reg, int cs) in gpmc_omap_get_nand_ops() argument
1089 if (cs >= gpmc_cs_num) in gpmc_omap_get_nand_ops()
1092 reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET + in gpmc_omap_get_nand_ops()
1093 GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs; in gpmc_omap_get_nand_ops()
1094 reg->gpmc_nand_address = gpmc_base + GPMC_CS0_OFFSET + in gpmc_omap_get_nand_ops()
1095 GPMC_CS_NAND_ADDRESS + GPMC_CS_SIZE * cs; in gpmc_omap_get_nand_ops()
1096 reg->gpmc_nand_data = gpmc_base + GPMC_CS0_OFFSET + in gpmc_omap_get_nand_ops()
1097 GPMC_CS_NAND_DATA + GPMC_CS_SIZE * cs; in gpmc_omap_get_nand_ops()
1098 reg->gpmc_prefetch_config1 = gpmc_base + GPMC_PREFETCH_CONFIG1; in gpmc_omap_get_nand_ops()
1099 reg->gpmc_prefetch_config2 = gpmc_base + GPMC_PREFETCH_CONFIG2; in gpmc_omap_get_nand_ops()
1100 reg->gpmc_prefetch_control = gpmc_base + GPMC_PREFETCH_CONTROL; in gpmc_omap_get_nand_ops()
1101 reg->gpmc_prefetch_status = gpmc_base + GPMC_PREFETCH_STATUS; in gpmc_omap_get_nand_ops()
1102 reg->gpmc_ecc_config = gpmc_base + GPMC_ECC_CONFIG; in gpmc_omap_get_nand_ops()
1103 reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL; in gpmc_omap_get_nand_ops()
1104 reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG; in gpmc_omap_get_nand_ops()
1105 reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT; in gpmc_omap_get_nand_ops()
1108 reg->gpmc_bch_result0[i] = gpmc_base + GPMC_ECC_BCH_RESULT_0 + in gpmc_omap_get_nand_ops()
1110 reg->gpmc_bch_result1[i] = gpmc_base + GPMC_ECC_BCH_RESULT_1 + in gpmc_omap_get_nand_ops()
1112 reg->gpmc_bch_result2[i] = gpmc_base + GPMC_ECC_BCH_RESULT_2 + in gpmc_omap_get_nand_ops()
1114 reg->gpmc_bch_result3[i] = gpmc_base + GPMC_ECC_BCH_RESULT_3 + in gpmc_omap_get_nand_ops()
1116 reg->gpmc_bch_result4[i] = gpmc_base + GPMC_ECC_BCH_RESULT_4 + in gpmc_omap_get_nand_ops()
1118 reg->gpmc_bch_result5[i] = gpmc_base + GPMC_ECC_BCH_RESULT_5 + in gpmc_omap_get_nand_ops()
1120 reg->gpmc_bch_result6[i] = gpmc_base + GPMC_ECC_BCH_RESULT_6 + in gpmc_omap_get_nand_ops()
1182 if (!s->sync_write) { in gpmc_omap_onenand_calc_sync_timings()
1198 dev_t.cyc_iaa = (latency + 1); in gpmc_omap_onenand_calc_sync_timings()
1201 dev_t.cyc_aavdh_oe = 1; in gpmc_omap_onenand_calc_sync_timings()
1207 int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq, in gpmc_omap_onenand_set_timings() argument
1215 gpmc_read_settings_dt(dev->of_node, &gpmc_s); in gpmc_omap_onenand_set_timings()
1217 info->sync_read = gpmc_s.sync_read; in gpmc_omap_onenand_set_timings()
1218 info->sync_write = gpmc_s.sync_write; in gpmc_omap_onenand_set_timings()
1219 info->burst_len = gpmc_s.burst_len; in gpmc_omap_onenand_set_timings()
1226 ret = gpmc_cs_program_settings(cs, &gpmc_s); in gpmc_omap_onenand_set_timings()
1230 return gpmc_cs_set_timings(cs, &gpmc_t, &gpmc_s); in gpmc_omap_onenand_set_timings()
1255 hwirq += 8 - GPMC_NR_NAND_IRQS; in gpmc_irq_endis()
1269 gpmc_irq_endis(p->hwirq, false); in gpmc_irq_disable()
1274 gpmc_irq_endis(p->hwirq, true); in gpmc_irq_enable()
1279 gpmc_irq_endis(d->hwirq, false); in gpmc_irq_mask()
1284 gpmc_irq_endis(d->hwirq, true); in gpmc_irq_unmask()
1296 hwirq += 8 - GPMC_NR_NAND_IRQS; in gpmc_irq_edge_config()
1309 unsigned int hwirq = d->hwirq; in gpmc_irq_ack()
1313 hwirq += 8 - GPMC_NR_NAND_IRQS; in gpmc_irq_ack()
1315 /* Setting bit to 1 clears (or Acks) the interrupt */ in gpmc_irq_ack()
1322 if (d->hwirq < GPMC_NR_NAND_IRQS) in gpmc_irq_set_type()
1323 return -EINVAL; in gpmc_irq_set_type()
1327 gpmc_irq_edge_config(d->hwirq, false); in gpmc_irq_set_type()
1329 gpmc_irq_edge_config(d->hwirq, true); in gpmc_irq_set_type()
1331 return -EINVAL; in gpmc_irq_set_type()
1339 struct gpmc_device *gpmc = d->host_data; in gpmc_irq_map()
1344 irq_set_chip_and_handler(virq, &gpmc->irq_chip, in gpmc_irq_map()
1347 irq_set_chip_and_handler(virq, &gpmc->irq_chip, in gpmc_irq_map()
1371 for (hwirq = 0; hwirq < gpmc->nirqs; hwirq++) { in gpmc_handle_irq()
1374 regvalx >>= 8 - GPMC_NR_NAND_IRQS; in gpmc_handle_irq()
1379 dev_warn(gpmc->dev, in gpmc_handle_irq()
1405 gpmc->irq_chip.name = "gpmc"; in gpmc_setup_irq()
1406 gpmc->irq_chip.irq_enable = gpmc_irq_enable; in gpmc_setup_irq()
1407 gpmc->irq_chip.irq_disable = gpmc_irq_disable; in gpmc_setup_irq()
1408 gpmc->irq_chip.irq_ack = gpmc_irq_ack; in gpmc_setup_irq()
1409 gpmc->irq_chip.irq_mask = gpmc_irq_mask; in gpmc_setup_irq()
1410 gpmc->irq_chip.irq_unmask = gpmc_irq_unmask; in gpmc_setup_irq()
1411 gpmc->irq_chip.irq_set_type = gpmc_irq_set_type; in gpmc_setup_irq()
1413 gpmc_irq_domain = irq_domain_add_linear(gpmc->dev->of_node, in gpmc_setup_irq()
1414 gpmc->nirqs, in gpmc_setup_irq()
1418 dev_err(gpmc->dev, "IRQ domain add failed\n"); in gpmc_setup_irq()
1419 return -ENODEV; in gpmc_setup_irq()
1422 rc = request_irq(gpmc->irq, gpmc_handle_irq, 0, "gpmc", gpmc); in gpmc_setup_irq()
1424 dev_err(gpmc->dev, "failed to request irq %d: %d\n", in gpmc_setup_irq()
1425 gpmc->irq, rc); in gpmc_setup_irq()
1437 free_irq(gpmc->irq, gpmc); in gpmc_free_irq()
1439 for (hwirq = 0; hwirq < gpmc->nirqs; hwirq++) in gpmc_free_irq()
1450 int cs; in gpmc_mem_exit() local
1452 for (cs = 0; cs < gpmc_cs_num; cs++) { in gpmc_mem_exit()
1453 if (!gpmc_cs_mem_enabled(cs)) in gpmc_mem_exit()
1455 gpmc_cs_delete_mem(cs); in gpmc_mem_exit()
1461 int cs; in gpmc_mem_init() local
1467 for (cs = 0; cs < gpmc_cs_num; cs++) { in gpmc_mem_init()
1470 if (!gpmc_cs_mem_enabled(cs)) in gpmc_mem_init()
1472 gpmc_cs_get_memconf(cs, &base, &size); in gpmc_mem_init()
1473 if (gpmc_cs_insert_mem(cs, base, size)) { in gpmc_mem_init()
1474 pr_warn("%s: disabling cs %d mapped at 0x%x-0x%x\n", in gpmc_mem_init()
1475 __func__, cs, base, base + size); in gpmc_mem_init()
1476 gpmc_cs_disable_mem(cs); in gpmc_mem_init()
1488 temp = (temp + div - 1) / div; in gpmc_round_ps_to_sync_clk()
1500 temp = dev_t->t_avdp_r; in gpmc_calc_sync_read_timings()
1507 temp = max_t(u32, temp, gpmc_t->clk_activation + dev_t->t_avdh); in gpmc_calc_sync_read_timings()
1508 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); in gpmc_calc_sync_read_timings()
1510 gpmc_t->adv_rd_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_read_timings()
1513 temp = dev_t->t_oeasu; /* XXX: remove this ? */ in gpmc_calc_sync_read_timings()
1515 temp = max_t(u32, temp, gpmc_t->clk_activation + dev_t->t_ach); in gpmc_calc_sync_read_timings()
1516 temp = max_t(u32, temp, gpmc_t->adv_rd_off + in gpmc_calc_sync_read_timings()
1517 gpmc_ticks_to_ps(dev_t->cyc_aavdh_oe)); in gpmc_calc_sync_read_timings()
1519 gpmc_t->oe_on = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_read_timings()
1526 temp = max_t(u32, dev_t->t_iaa, dev_t->cyc_iaa * gpmc_t->sync_clk); in gpmc_calc_sync_read_timings()
1527 temp += gpmc_t->clk_activation; in gpmc_calc_sync_read_timings()
1528 if (dev_t->cyc_oe) in gpmc_calc_sync_read_timings()
1529 temp = max_t(u32, temp, gpmc_t->oe_on + in gpmc_calc_sync_read_timings()
1530 gpmc_ticks_to_ps(dev_t->cyc_oe)); in gpmc_calc_sync_read_timings()
1531 gpmc_t->access = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_read_timings()
1533 gpmc_t->oe_off = gpmc_t->access + gpmc_ticks_to_ps(1); in gpmc_calc_sync_read_timings()
1534 gpmc_t->cs_rd_off = gpmc_t->oe_off; in gpmc_calc_sync_read_timings()
1537 temp = max_t(u32, dev_t->t_cez_r, dev_t->t_oez); in gpmc_calc_sync_read_timings()
1538 temp = gpmc_round_ps_to_sync_clk(temp, gpmc_t->sync_clk) + in gpmc_calc_sync_read_timings()
1539 gpmc_t->access; in gpmc_calc_sync_read_timings()
1541 if (dev_t->t_ce_rdyz) in gpmc_calc_sync_read_timings()
1542 temp = max_t(u32, temp, gpmc_t->cs_rd_off + dev_t->t_ce_rdyz); in gpmc_calc_sync_read_timings()
1543 gpmc_t->rd_cycle = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_read_timings()
1555 temp = dev_t->t_avdp_w; in gpmc_calc_sync_write_timings()
1558 gpmc_t->clk_activation + dev_t->t_avdh); in gpmc_calc_sync_write_timings()
1559 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); in gpmc_calc_sync_write_timings()
1561 gpmc_t->adv_wr_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_write_timings()
1564 temp = max_t(u32, dev_t->t_weasu, in gpmc_calc_sync_write_timings()
1565 gpmc_t->clk_activation + dev_t->t_rdyo); in gpmc_calc_sync_write_timings()
1571 gpmc_t->adv_wr_off + dev_t->t_aavdh); in gpmc_calc_sync_write_timings()
1572 temp = max_t(u32, temp, gpmc_t->adv_wr_off + in gpmc_calc_sync_write_timings()
1573 gpmc_ticks_to_ps(dev_t->cyc_aavdh_we)); in gpmc_calc_sync_write_timings()
1575 gpmc_t->wr_data_mux_bus = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_write_timings()
1579 gpmc_t->we_on = gpmc_round_ps_to_ticks(dev_t->t_weasu); in gpmc_calc_sync_write_timings()
1581 gpmc_t->we_on = gpmc_t->wr_data_mux_bus; in gpmc_calc_sync_write_timings()
1585 gpmc_t->wr_access = gpmc_t->access; in gpmc_calc_sync_write_timings()
1588 temp = gpmc_t->we_on + dev_t->t_wpl; in gpmc_calc_sync_write_timings()
1590 gpmc_t->wr_access + gpmc_ticks_to_ps(1)); in gpmc_calc_sync_write_timings()
1592 gpmc_t->we_on + gpmc_ticks_to_ps(dev_t->cyc_wpl)); in gpmc_calc_sync_write_timings()
1593 gpmc_t->we_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_write_timings()
1595 gpmc_t->cs_wr_off = gpmc_round_ps_to_ticks(gpmc_t->we_off + in gpmc_calc_sync_write_timings()
1596 dev_t->t_wph); in gpmc_calc_sync_write_timings()
1599 temp = gpmc_round_ps_to_sync_clk(dev_t->t_cez_w, gpmc_t->sync_clk); in gpmc_calc_sync_write_timings()
1600 temp += gpmc_t->wr_access; in gpmc_calc_sync_write_timings()
1602 if (dev_t->t_ce_rdyz) in gpmc_calc_sync_write_timings()
1604 gpmc_t->cs_wr_off + dev_t->t_ce_rdyz); in gpmc_calc_sync_write_timings()
1605 gpmc_t->wr_cycle = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_write_timings()
1617 temp = dev_t->t_avdp_r; in gpmc_calc_async_read_timings()
1619 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); in gpmc_calc_async_read_timings()
1620 gpmc_t->adv_rd_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_read_timings()
1623 temp = dev_t->t_oeasu; in gpmc_calc_async_read_timings()
1625 temp = max_t(u32, temp, gpmc_t->adv_rd_off + dev_t->t_aavdh); in gpmc_calc_async_read_timings()
1626 gpmc_t->oe_on = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_read_timings()
1629 temp = max_t(u32, dev_t->t_iaa, /* XXX: remove t_iaa in async ? */ in gpmc_calc_async_read_timings()
1630 gpmc_t->oe_on + dev_t->t_oe); in gpmc_calc_async_read_timings()
1631 temp = max_t(u32, temp, gpmc_t->cs_on + dev_t->t_ce); in gpmc_calc_async_read_timings()
1632 temp = max_t(u32, temp, gpmc_t->adv_on + dev_t->t_aa); in gpmc_calc_async_read_timings()
1633 gpmc_t->access = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_read_timings()
1635 gpmc_t->oe_off = gpmc_t->access + gpmc_ticks_to_ps(1); in gpmc_calc_async_read_timings()
1636 gpmc_t->cs_rd_off = gpmc_t->oe_off; in gpmc_calc_async_read_timings()
1639 temp = max_t(u32, dev_t->t_rd_cycle, in gpmc_calc_async_read_timings()
1640 gpmc_t->cs_rd_off + dev_t->t_cez_r); in gpmc_calc_async_read_timings()
1641 temp = max_t(u32, temp, gpmc_t->oe_off + dev_t->t_oez); in gpmc_calc_async_read_timings()
1642 gpmc_t->rd_cycle = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_read_timings()
1654 temp = dev_t->t_avdp_w; in gpmc_calc_async_write_timings()
1656 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); in gpmc_calc_async_write_timings()
1657 gpmc_t->adv_wr_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_write_timings()
1660 temp = dev_t->t_weasu; in gpmc_calc_async_write_timings()
1662 temp = max_t(u32, temp, gpmc_t->adv_wr_off + dev_t->t_aavdh); in gpmc_calc_async_write_timings()
1663 temp = max_t(u32, temp, gpmc_t->adv_wr_off + in gpmc_calc_async_write_timings()
1664 gpmc_ticks_to_ps(dev_t->cyc_aavdh_we)); in gpmc_calc_async_write_timings()
1666 gpmc_t->wr_data_mux_bus = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_write_timings()
1670 gpmc_t->we_on = gpmc_round_ps_to_ticks(dev_t->t_weasu); in gpmc_calc_async_write_timings()
1672 gpmc_t->we_on = gpmc_t->wr_data_mux_bus; in gpmc_calc_async_write_timings()
1675 temp = gpmc_t->we_on + dev_t->t_wpl; in gpmc_calc_async_write_timings()
1676 gpmc_t->we_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_write_timings()
1678 gpmc_t->cs_wr_off = gpmc_round_ps_to_ticks(gpmc_t->we_off + in gpmc_calc_async_write_timings()
1679 dev_t->t_wph); in gpmc_calc_async_write_timings()
1682 temp = max_t(u32, dev_t->t_wr_cycle, in gpmc_calc_async_write_timings()
1683 gpmc_t->cs_wr_off + dev_t->t_cez_w); in gpmc_calc_async_write_timings()
1684 gpmc_t->wr_cycle = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_write_timings()
1694 gpmc_t->sync_clk = gpmc_calc_divider(dev_t->clk) * in gpmc_calc_sync_common_timings()
1697 gpmc_t->page_burst_access = gpmc_round_ps_to_sync_clk( in gpmc_calc_sync_common_timings()
1698 dev_t->t_bacc, in gpmc_calc_sync_common_timings()
1699 gpmc_t->sync_clk); in gpmc_calc_sync_common_timings()
1701 temp = max_t(u32, dev_t->t_ces, dev_t->t_avds); in gpmc_calc_sync_common_timings()
1702 gpmc_t->clk_activation = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_common_timings()
1704 if (gpmc_calc_divider(gpmc_t->sync_clk) != 1) in gpmc_calc_sync_common_timings()
1707 if (dev_t->ce_xdelay) in gpmc_calc_sync_common_timings()
1708 gpmc_t->bool_timings.cs_extra_delay = true; in gpmc_calc_sync_common_timings()
1709 if (dev_t->avd_xdelay) in gpmc_calc_sync_common_timings()
1710 gpmc_t->bool_timings.adv_extra_delay = true; in gpmc_calc_sync_common_timings()
1711 if (dev_t->oe_xdelay) in gpmc_calc_sync_common_timings()
1712 gpmc_t->bool_timings.oe_extra_delay = true; in gpmc_calc_sync_common_timings()
1713 if (dev_t->we_xdelay) in gpmc_calc_sync_common_timings()
1714 gpmc_t->bool_timings.we_extra_delay = true; in gpmc_calc_sync_common_timings()
1726 gpmc_t->cs_on = gpmc_round_ps_to_ticks(dev_t->t_ceasu); in gpmc_calc_common_timings()
1729 temp = dev_t->t_avdasu; in gpmc_calc_common_timings()
1730 if (dev_t->t_ce_avd) in gpmc_calc_common_timings()
1732 gpmc_t->cs_on + dev_t->t_ce_avd); in gpmc_calc_common_timings()
1733 gpmc_t->adv_on = gpmc_round_ps_to_ticks(temp); in gpmc_calc_common_timings()
1748 t->cs_on /= 1000; in gpmc_convert_ps_to_ns()
1749 t->cs_rd_off /= 1000; in gpmc_convert_ps_to_ns()
1750 t->cs_wr_off /= 1000; in gpmc_convert_ps_to_ns()
1751 t->adv_on /= 1000; in gpmc_convert_ps_to_ns()
1752 t->adv_rd_off /= 1000; in gpmc_convert_ps_to_ns()
1753 t->adv_wr_off /= 1000; in gpmc_convert_ps_to_ns()
1754 t->we_on /= 1000; in gpmc_convert_ps_to_ns()
1755 t->we_off /= 1000; in gpmc_convert_ps_to_ns()
1756 t->oe_on /= 1000; in gpmc_convert_ps_to_ns()
1757 t->oe_off /= 1000; in gpmc_convert_ps_to_ns()
1758 t->page_burst_access /= 1000; in gpmc_convert_ps_to_ns()
1759 t->access /= 1000; in gpmc_convert_ps_to_ns()
1760 t->rd_cycle /= 1000; in gpmc_convert_ps_to_ns()
1761 t->wr_cycle /= 1000; in gpmc_convert_ps_to_ns()
1762 t->bus_turnaround /= 1000; in gpmc_convert_ps_to_ns()
1763 t->cycle2cycle_delay /= 1000; in gpmc_convert_ps_to_ns()
1764 t->wait_monitoring /= 1000; in gpmc_convert_ps_to_ns()
1765 t->clk_activation /= 1000; in gpmc_convert_ps_to_ns()
1766 t->wr_access /= 1000; in gpmc_convert_ps_to_ns()
1767 t->wr_data_mux_bus /= 1000; in gpmc_convert_ps_to_ns()
1777 mux = gpmc_s->mux_add_data ? true : false; in gpmc_calc_timings()
1778 sync = (gpmc_s->sync_read || gpmc_s->sync_write); in gpmc_calc_timings()
1785 if (gpmc_s && gpmc_s->sync_read) in gpmc_calc_timings()
1790 if (gpmc_s && gpmc_s->sync_write) in gpmc_calc_timings()
1802 * gpmc_cs_program_settings - programs non-timing related settings
1803 * @cs: GPMC chip-select to program
1806 * Programs non-timing related settings for a GPMC chip-select, such as
1807 * bus-width, burst configuration, etc. Function should be called once
1808 * for each chip-select that is being used and must be called before
1813 int gpmc_cs_program_settings(int cs, struct gpmc_settings *p) in gpmc_cs_program_settings() argument
1817 if ((!p->device_width) || (p->device_width > GPMC_DEVWIDTH_16BIT)) { in gpmc_cs_program_settings()
1818 pr_err("%s: invalid width %d!", __func__, p->device_width); in gpmc_cs_program_settings()
1819 return -EINVAL; in gpmc_cs_program_settings()
1822 /* Address-data multiplexing not supported for NAND devices */ in gpmc_cs_program_settings()
1823 if (p->device_nand && p->mux_add_data) { in gpmc_cs_program_settings()
1825 return -EINVAL; in gpmc_cs_program_settings()
1828 if ((p->mux_add_data > GPMC_MUX_AD) || in gpmc_cs_program_settings()
1829 ((p->mux_add_data == GPMC_MUX_AAD) && in gpmc_cs_program_settings()
1832 return -EINVAL; in gpmc_cs_program_settings()
1836 if (p->burst_read || p->burst_write) { in gpmc_cs_program_settings()
1837 switch (p->burst_len) { in gpmc_cs_program_settings()
1843 pr_err("%s: invalid page/burst-length (%d)\n", in gpmc_cs_program_settings()
1844 __func__, p->burst_len); in gpmc_cs_program_settings()
1845 return -EINVAL; in gpmc_cs_program_settings()
1849 if (p->wait_pin > gpmc_nr_waitpins) { in gpmc_cs_program_settings()
1850 pr_err("%s: invalid wait-pin (%d)\n", __func__, p->wait_pin); in gpmc_cs_program_settings()
1851 return -EINVAL; in gpmc_cs_program_settings()
1854 config1 = GPMC_CONFIG1_DEVICESIZE((p->device_width - 1)); in gpmc_cs_program_settings()
1856 if (p->sync_read) in gpmc_cs_program_settings()
1858 if (p->sync_write) in gpmc_cs_program_settings()
1860 if (p->wait_on_read) in gpmc_cs_program_settings()
1862 if (p->wait_on_write) in gpmc_cs_program_settings()
1864 if (p->wait_on_read || p->wait_on_write) in gpmc_cs_program_settings()
1865 config1 |= GPMC_CONFIG1_WAIT_PIN_SEL(p->wait_pin); in gpmc_cs_program_settings()
1866 if (p->device_nand) in gpmc_cs_program_settings()
1868 if (p->mux_add_data) in gpmc_cs_program_settings()
1869 config1 |= GPMC_CONFIG1_MUXTYPE(p->mux_add_data); in gpmc_cs_program_settings()
1870 if (p->burst_read) in gpmc_cs_program_settings()
1872 if (p->burst_write) in gpmc_cs_program_settings()
1874 if (p->burst_read || p->burst_write) { in gpmc_cs_program_settings()
1875 config1 |= GPMC_CONFIG1_PAGE_LEN(p->burst_len >> 3); in gpmc_cs_program_settings()
1876 config1 |= p->burst_wrap ? GPMC_CONFIG1_WRAPBURST_SUPP : 0; in gpmc_cs_program_settings()
1879 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, config1); in gpmc_cs_program_settings()
1886 { .compatible = "ti,omap2420-gpmc" },
1887 { .compatible = "ti,omap2430-gpmc" },
1888 { .compatible = "ti,omap3430-gpmc" }, /* omap3430 & omap3630 */
1889 { .compatible = "ti,omap4430-gpmc" }, /* omap4430 & omap4460 & omap543x */
1890 { .compatible = "ti,am3352-gpmc" }, /* am335x devices */
1894 static void gpmc_cs_set_name(int cs, const char *name) in gpmc_cs_set_name() argument
1896 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_set_name()
1898 gpmc->name = name; in gpmc_cs_set_name()
1901 static const char *gpmc_cs_get_name(int cs) in gpmc_cs_get_name() argument
1903 struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; in gpmc_cs_get_name()
1905 return gpmc->name; in gpmc_cs_get_name()
1909 * gpmc_cs_remap - remaps a chip-select physical base address
1910 * @cs: chip-select to remap
1911 * @base: physical base address to re-map chip-select to
1913 * Re-maps a chip-select to a new physical base address specified by
1917 static int gpmc_cs_remap(int cs, u32 base) in gpmc_cs_remap() argument
1922 if (cs >= gpmc_cs_num) { in gpmc_cs_remap()
1923 pr_err("%s: requested chip-select is disabled\n", __func__); in gpmc_cs_remap()
1924 return -ENODEV; in gpmc_cs_remap()
1932 base &= ~(SZ_16M - 1); in gpmc_cs_remap()
1934 gpmc_cs_get_memconf(cs, &old_base, &size); in gpmc_cs_remap()
1938 ret = gpmc_cs_delete_mem(cs); in gpmc_cs_remap()
1942 ret = gpmc_cs_insert_mem(cs, base, size); in gpmc_cs_remap()
1946 ret = gpmc_cs_set_memconf(cs, base, size); in gpmc_cs_remap()
1952 * gpmc_read_settings_dt - read gpmc settings from device-tree
1953 * @np: pointer to device-tree node for a gpmc child device
1956 * Reads the GPMC settings for a GPMC child device from device-tree and
1965 p->sync_read = of_property_read_bool(np, "gpmc,sync-read"); in gpmc_read_settings_dt()
1966 p->sync_write = of_property_read_bool(np, "gpmc,sync-write"); in gpmc_read_settings_dt()
1967 of_property_read_u32(np, "gpmc,device-width", &p->device_width); in gpmc_read_settings_dt()
1968 of_property_read_u32(np, "gpmc,mux-add-data", &p->mux_add_data); in gpmc_read_settings_dt()
1970 if (!of_property_read_u32(np, "gpmc,burst-length", &p->burst_len)) { in gpmc_read_settings_dt()
1971 p->burst_wrap = of_property_read_bool(np, "gpmc,burst-wrap"); in gpmc_read_settings_dt()
1972 p->burst_read = of_property_read_bool(np, "gpmc,burst-read"); in gpmc_read_settings_dt()
1973 p->burst_write = of_property_read_bool(np, "gpmc,burst-write"); in gpmc_read_settings_dt()
1974 if (!p->burst_read && !p->burst_write) in gpmc_read_settings_dt()
1975 pr_warn("%s: page/burst-length set but not used!\n", in gpmc_read_settings_dt()
1979 if (!of_property_read_u32(np, "gpmc,wait-pin", &p->wait_pin)) { in gpmc_read_settings_dt()
1980 p->wait_on_read = of_property_read_bool(np, in gpmc_read_settings_dt()
1981 "gpmc,wait-on-read"); in gpmc_read_settings_dt()
1982 p->wait_on_write = of_property_read_bool(np, in gpmc_read_settings_dt()
1983 "gpmc,wait-on-write"); in gpmc_read_settings_dt()
1984 if (!p->wait_on_read && !p->wait_on_write) in gpmc_read_settings_dt()
2001 of_property_read_u32(np, "gpmc,sync-clk-ps", &gpmc_t->sync_clk); in gpmc_read_timings_dt()
2004 of_property_read_u32(np, "gpmc,cs-on-ns", &gpmc_t->cs_on); in gpmc_read_timings_dt()
2005 of_property_read_u32(np, "gpmc,cs-rd-off-ns", &gpmc_t->cs_rd_off); in gpmc_read_timings_dt()
2006 of_property_read_u32(np, "gpmc,cs-wr-off-ns", &gpmc_t->cs_wr_off); in gpmc_read_timings_dt()
2009 of_property_read_u32(np, "gpmc,adv-on-ns", &gpmc_t->adv_on); in gpmc_read_timings_dt()
2010 of_property_read_u32(np, "gpmc,adv-rd-off-ns", &gpmc_t->adv_rd_off); in gpmc_read_timings_dt()
2011 of_property_read_u32(np, "gpmc,adv-wr-off-ns", &gpmc_t->adv_wr_off); in gpmc_read_timings_dt()
2012 of_property_read_u32(np, "gpmc,adv-aad-mux-on-ns", in gpmc_read_timings_dt()
2013 &gpmc_t->adv_aad_mux_on); in gpmc_read_timings_dt()
2014 of_property_read_u32(np, "gpmc,adv-aad-mux-rd-off-ns", in gpmc_read_timings_dt()
2015 &gpmc_t->adv_aad_mux_rd_off); in gpmc_read_timings_dt()
2016 of_property_read_u32(np, "gpmc,adv-aad-mux-wr-off-ns", in gpmc_read_timings_dt()
2017 &gpmc_t->adv_aad_mux_wr_off); in gpmc_read_timings_dt()
2020 of_property_read_u32(np, "gpmc,we-on-ns", &gpmc_t->we_on); in gpmc_read_timings_dt()
2021 of_property_read_u32(np, "gpmc,we-off-ns", &gpmc_t->we_off); in gpmc_read_timings_dt()
2024 of_property_read_u32(np, "gpmc,oe-on-ns", &gpmc_t->oe_on); in gpmc_read_timings_dt()
2025 of_property_read_u32(np, "gpmc,oe-off-ns", &gpmc_t->oe_off); in gpmc_read_timings_dt()
2026 of_property_read_u32(np, "gpmc,oe-aad-mux-on-ns", in gpmc_read_timings_dt()
2027 &gpmc_t->oe_aad_mux_on); in gpmc_read_timings_dt()
2028 of_property_read_u32(np, "gpmc,oe-aad-mux-off-ns", in gpmc_read_timings_dt()
2029 &gpmc_t->oe_aad_mux_off); in gpmc_read_timings_dt()
2032 of_property_read_u32(np, "gpmc,page-burst-access-ns", in gpmc_read_timings_dt()
2033 &gpmc_t->page_burst_access); in gpmc_read_timings_dt()
2034 of_property_read_u32(np, "gpmc,access-ns", &gpmc_t->access); in gpmc_read_timings_dt()
2035 of_property_read_u32(np, "gpmc,rd-cycle-ns", &gpmc_t->rd_cycle); in gpmc_read_timings_dt()
2036 of_property_read_u32(np, "gpmc,wr-cycle-ns", &gpmc_t->wr_cycle); in gpmc_read_timings_dt()
2037 of_property_read_u32(np, "gpmc,bus-turnaround-ns", in gpmc_read_timings_dt()
2038 &gpmc_t->bus_turnaround); in gpmc_read_timings_dt()
2039 of_property_read_u32(np, "gpmc,cycle2cycle-delay-ns", in gpmc_read_timings_dt()
2040 &gpmc_t->cycle2cycle_delay); in gpmc_read_timings_dt()
2041 of_property_read_u32(np, "gpmc,wait-monitoring-ns", in gpmc_read_timings_dt()
2042 &gpmc_t->wait_monitoring); in gpmc_read_timings_dt()
2043 of_property_read_u32(np, "gpmc,clk-activation-ns", in gpmc_read_timings_dt()
2044 &gpmc_t->clk_activation); in gpmc_read_timings_dt()
2047 of_property_read_u32(np, "gpmc,wr-access-ns", &gpmc_t->wr_access); in gpmc_read_timings_dt()
2048 of_property_read_u32(np, "gpmc,wr-data-mux-bus-ns", in gpmc_read_timings_dt()
2049 &gpmc_t->wr_data_mux_bus); in gpmc_read_timings_dt()
2052 p = &gpmc_t->bool_timings; in gpmc_read_timings_dt()
2054 p->cycle2cyclediffcsen = in gpmc_read_timings_dt()
2055 of_property_read_bool(np, "gpmc,cycle2cycle-diffcsen"); in gpmc_read_timings_dt()
2056 p->cycle2cyclesamecsen = in gpmc_read_timings_dt()
2057 of_property_read_bool(np, "gpmc,cycle2cycle-samecsen"); in gpmc_read_timings_dt()
2058 p->we_extra_delay = of_property_read_bool(np, "gpmc,we-extra-delay"); in gpmc_read_timings_dt()
2059 p->oe_extra_delay = of_property_read_bool(np, "gpmc,oe-extra-delay"); in gpmc_read_timings_dt()
2060 p->adv_extra_delay = of_property_read_bool(np, "gpmc,adv-extra-delay"); in gpmc_read_timings_dt()
2061 p->cs_extra_delay = of_property_read_bool(np, "gpmc,cs-extra-delay"); in gpmc_read_timings_dt()
2062 p->time_para_granularity = in gpmc_read_timings_dt()
2063 of_property_read_bool(np, "gpmc,time-para-granularity"); in gpmc_read_timings_dt()
2067 * gpmc_probe_generic_child - configures the gpmc for a child device
2069 * @child: pointer to device-tree node for child device
2071 * Allocates and configures a GPMC chip-select for a child device.
2082 int ret, cs; in gpmc_probe_generic_child() local
2087 if (of_property_read_u32(child, "reg", &cs) < 0) { in gpmc_probe_generic_child()
2088 dev_err(&pdev->dev, "%pOF has no 'reg' property\n", in gpmc_probe_generic_child()
2090 return -ENODEV; in gpmc_probe_generic_child()
2094 dev_err(&pdev->dev, "%pOF has malformed 'reg' property\n", in gpmc_probe_generic_child()
2096 return -ENODEV; in gpmc_probe_generic_child()
2104 name = gpmc_cs_get_name(cs); in gpmc_probe_generic_child()
2108 ret = gpmc_cs_request(cs, resource_size(&res), &base); in gpmc_probe_generic_child()
2110 dev_err(&pdev->dev, "cannot request GPMC CS %d\n", cs); in gpmc_probe_generic_child()
2113 gpmc_cs_set_name(cs, child->full_name); in gpmc_probe_generic_child()
2124 WARN(1, "enable GPMC debug to configure .dts timings for CS%i\n", in gpmc_probe_generic_child()
2125 cs); in gpmc_probe_generic_child()
2126 gpmc_cs_show_timings(cs, in gpmc_probe_generic_child()
2131 /* CS must be disabled while making changes to gpmc configuration */ in gpmc_probe_generic_child()
2132 gpmc_cs_disable_mem(cs); in gpmc_probe_generic_child()
2135 * FIXME: gpmc_cs_request() will map the CS to an arbitrary in gpmc_probe_generic_child()
2137 * device-tree we want the NOR flash to be mapped to the in gpmc_probe_generic_child()
2138 * location specified in the device-tree blob. So remap the in gpmc_probe_generic_child()
2139 * CS to this location. Once DT migration is complete should in gpmc_probe_generic_child()
2142 ret = gpmc_cs_remap(cs, res.start); in gpmc_probe_generic_child()
2144 dev_err(&pdev->dev, "cannot remap GPMC CS %d to %pa\n", in gpmc_probe_generic_child()
2145 cs, &res.start); in gpmc_probe_generic_child()
2147 dev_info(&pdev->dev, in gpmc_probe_generic_child()
2148 "GPMC CS %d start cannot be lesser than 0x%x\n", in gpmc_probe_generic_child()
2149 cs, GPMC_MEM_START); in gpmc_probe_generic_child()
2151 dev_info(&pdev->dev, in gpmc_probe_generic_child()
2152 "GPMC CS %d end cannot be greater than 0x%x\n", in gpmc_probe_generic_child()
2153 cs, GPMC_MEM_END); in gpmc_probe_generic_child()
2161 dev_warn(&pdev->dev, in gpmc_probe_generic_child()
2163 ret = -EINVAL; in gpmc_probe_generic_child()
2171 dev_warn(&pdev->dev, in gpmc_probe_generic_child()
2173 ret = -EINVAL; in gpmc_probe_generic_child()
2178 if (of_device_is_compatible(child, "ti,omap2-nand")) { in gpmc_probe_generic_child()
2181 of_property_read_u32(child, "nand-bus-width", &val); in gpmc_probe_generic_child()
2190 dev_err(&pdev->dev, "%pOFn: invalid 'nand-bus-width'\n", in gpmc_probe_generic_child()
2192 ret = -EINVAL; in gpmc_probe_generic_child()
2200 ret = of_property_read_u32(child, "bank-width", in gpmc_probe_generic_child()
2203 dev_err(&pdev->dev, in gpmc_probe_generic_child()
2204 "%pOF has no 'gpmc,device-width' property\n", in gpmc_probe_generic_child()
2214 waitpin_desc = gpiochip_request_own_desc(&gpmc->gpio_chip, in gpmc_probe_generic_child()
2219 dev_err(&pdev->dev, "invalid wait-pin: %d\n", wait_pin); in gpmc_probe_generic_child()
2225 gpmc_cs_show_timings(cs, "before gpmc_cs_program_settings"); in gpmc_probe_generic_child()
2227 ret = gpmc_cs_program_settings(cs, &gpmc_s); in gpmc_probe_generic_child()
2231 ret = gpmc_cs_set_timings(cs, &gpmc_t, &gpmc_s); in gpmc_probe_generic_child()
2233 dev_err(&pdev->dev, "failed to set gpmc timings for: %pOFn\n", in gpmc_probe_generic_child()
2238 /* Clear limited address i.e. enable A26-A11 */ in gpmc_probe_generic_child()
2243 /* Enable CS region */ in gpmc_probe_generic_child()
2244 gpmc_cs_enable_mem(cs); in gpmc_probe_generic_child()
2249 if (!of_platform_device_create(child, NULL, &pdev->dev)) in gpmc_probe_generic_child()
2255 if (of_platform_default_populate(child, NULL, &pdev->dev)) in gpmc_probe_generic_child()
2262 dev_err(&pdev->dev, "failed to create gpmc child %pOFn\n", child); in gpmc_probe_generic_child()
2263 ret = -ENODEV; in gpmc_probe_generic_child()
2268 gpmc_cs_free(cs); in gpmc_probe_generic_child()
2277 of_match_device(gpmc_dt_ids, &pdev->dev); in gpmc_probe_dt()
2282 ret = of_property_read_u32(pdev->dev.of_node, "gpmc,num-cs", in gpmc_probe_dt()
2285 pr_err("%s: number of chip-selects not defined\n", __func__); in gpmc_probe_dt()
2287 } else if (gpmc_cs_num < 1) { in gpmc_probe_dt()
2288 pr_err("%s: all chip-selects are disabled\n", __func__); in gpmc_probe_dt()
2289 return -EINVAL; in gpmc_probe_dt()
2291 pr_err("%s: number of supported chip-selects cannot be > %d\n", in gpmc_probe_dt()
2293 return -EINVAL; in gpmc_probe_dt()
2296 ret = of_property_read_u32(pdev->dev.of_node, "gpmc,num-waitpins", in gpmc_probe_dt()
2311 for_each_available_child_of_node(pdev->dev.of_node, child) { in gpmc_probe_dt_children()
2314 dev_err(&pdev->dev, "failed to probe DT child '%pOFn': %d\n", in gpmc_probe_dt_children()
2336 return 1; /* we're input only */ in gpmc_gpio_get_direction()
2348 return -EINVAL; /* we're input only */ in gpmc_gpio_direction_output()
2371 gpmc->gpio_chip.parent = gpmc->dev; in gpmc_gpio_init()
2372 gpmc->gpio_chip.owner = THIS_MODULE; in gpmc_gpio_init()
2373 gpmc->gpio_chip.label = DEVICE_NAME; in gpmc_gpio_init()
2374 gpmc->gpio_chip.ngpio = gpmc_nr_waitpins; in gpmc_gpio_init()
2375 gpmc->gpio_chip.get_direction = gpmc_gpio_get_direction; in gpmc_gpio_init()
2376 gpmc->gpio_chip.direction_input = gpmc_gpio_direction_input; in gpmc_gpio_init()
2377 gpmc->gpio_chip.direction_output = gpmc_gpio_direction_output; in gpmc_gpio_init()
2378 gpmc->gpio_chip.set = gpmc_gpio_set; in gpmc_gpio_init()
2379 gpmc->gpio_chip.get = gpmc_gpio_get; in gpmc_gpio_init()
2380 gpmc->gpio_chip.base = -1; in gpmc_gpio_init()
2382 ret = devm_gpiochip_add_data(gpmc->dev, &gpmc->gpio_chip, NULL); in gpmc_gpio_init()
2384 dev_err(gpmc->dev, "could not register gpio chip: %d\n", ret); in gpmc_gpio_init()
2399 gpmc_context = &gpmc->context; in omap3_gpmc_save_context()
2401 gpmc_context->sysconfig = gpmc_read_reg(GPMC_SYSCONFIG); in omap3_gpmc_save_context()
2402 gpmc_context->irqenable = gpmc_read_reg(GPMC_IRQENABLE); in omap3_gpmc_save_context()
2403 gpmc_context->timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL); in omap3_gpmc_save_context()
2404 gpmc_context->config = gpmc_read_reg(GPMC_CONFIG); in omap3_gpmc_save_context()
2405 gpmc_context->prefetch_config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1); in omap3_gpmc_save_context()
2406 gpmc_context->prefetch_config2 = gpmc_read_reg(GPMC_PREFETCH_CONFIG2); in omap3_gpmc_save_context()
2407 gpmc_context->prefetch_control = gpmc_read_reg(GPMC_PREFETCH_CONTROL); in omap3_gpmc_save_context()
2409 gpmc_context->cs_context[i].is_valid = gpmc_cs_mem_enabled(i); in omap3_gpmc_save_context()
2410 if (gpmc_context->cs_context[i].is_valid) { in omap3_gpmc_save_context()
2411 gpmc_context->cs_context[i].config1 = in omap3_gpmc_save_context()
2413 gpmc_context->cs_context[i].config2 = in omap3_gpmc_save_context()
2415 gpmc_context->cs_context[i].config3 = in omap3_gpmc_save_context()
2417 gpmc_context->cs_context[i].config4 = in omap3_gpmc_save_context()
2419 gpmc_context->cs_context[i].config5 = in omap3_gpmc_save_context()
2421 gpmc_context->cs_context[i].config6 = in omap3_gpmc_save_context()
2423 gpmc_context->cs_context[i].config7 = in omap3_gpmc_save_context()
2437 gpmc_context = &gpmc->context; in omap3_gpmc_restore_context()
2439 gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context->sysconfig); in omap3_gpmc_restore_context()
2440 gpmc_write_reg(GPMC_IRQENABLE, gpmc_context->irqenable); in omap3_gpmc_restore_context()
2441 gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context->timeout_ctrl); in omap3_gpmc_restore_context()
2442 gpmc_write_reg(GPMC_CONFIG, gpmc_context->config); in omap3_gpmc_restore_context()
2443 gpmc_write_reg(GPMC_PREFETCH_CONFIG1, gpmc_context->prefetch_config1); in omap3_gpmc_restore_context()
2444 gpmc_write_reg(GPMC_PREFETCH_CONFIG2, gpmc_context->prefetch_config2); in omap3_gpmc_restore_context()
2445 gpmc_write_reg(GPMC_PREFETCH_CONTROL, gpmc_context->prefetch_control); in omap3_gpmc_restore_context()
2447 if (gpmc_context->cs_context[i].is_valid) { in omap3_gpmc_restore_context()
2449 gpmc_context->cs_context[i].config1); in omap3_gpmc_restore_context()
2451 gpmc_context->cs_context[i].config2); in omap3_gpmc_restore_context()
2453 gpmc_context->cs_context[i].config3); in omap3_gpmc_restore_context()
2455 gpmc_context->cs_context[i].config4); in omap3_gpmc_restore_context()
2457 gpmc_context->cs_context[i].config5); in omap3_gpmc_restore_context()
2459 gpmc_context->cs_context[i].config6); in omap3_gpmc_restore_context()
2461 gpmc_context->cs_context[i].config7); in omap3_gpmc_restore_context()
2474 if (gpmc->is_suspended || pm_runtime_suspended(gpmc->dev)) in omap_gpmc_context_notifier()
2498 gpmc = devm_kzalloc(&pdev->dev, sizeof(*gpmc), GFP_KERNEL); in gpmc_probe()
2500 return -ENOMEM; in gpmc_probe()
2502 gpmc->dev = &pdev->dev; in gpmc_probe()
2507 return -ENOENT; in gpmc_probe()
2509 gpmc_base = devm_ioremap_resource(&pdev->dev, res); in gpmc_probe()
2515 dev_err(&pdev->dev, "Failed to get resource: irq\n"); in gpmc_probe()
2516 return -ENOENT; in gpmc_probe()
2519 gpmc->irq = res->start; in gpmc_probe()
2521 gpmc_l3_clk = devm_clk_get(&pdev->dev, "fck"); in gpmc_probe()
2523 dev_err(&pdev->dev, "Failed to get GPMC fck\n"); in gpmc_probe()
2528 dev_err(&pdev->dev, "Invalid GPMC fck clock rate\n"); in gpmc_probe()
2529 return -EINVAL; in gpmc_probe()
2532 if (pdev->dev.of_node) { in gpmc_probe()
2541 pm_runtime_enable(&pdev->dev); in gpmc_probe()
2542 pm_runtime_get_sync(&pdev->dev); in gpmc_probe()
2547 * FIXME: Once device-tree migration is complete the below flags in gpmc_probe()
2548 * should be populated based upon the device-tree compatible in gpmc_probe()
2551 * devices support the addr-addr-data multiplex protocol. in gpmc_probe()
2554 * - OMAP24xx = 2.0 in gpmc_probe()
2555 * - OMAP3xxx = 5.0 in gpmc_probe()
2556 * - OMAP44xx/54xx/AM335x = 6.0 in gpmc_probe()
2562 dev_info(gpmc->dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l), in gpmc_probe()
2570 gpmc->nirqs = GPMC_NR_NAND_IRQS + gpmc_nr_waitpins; in gpmc_probe()
2573 dev_err(gpmc->dev, "gpmc_setup_irq failed\n"); in gpmc_probe()
2579 gpmc->nb.notifier_call = omap_gpmc_context_notifier; in gpmc_probe()
2580 cpu_pm_register_notifier(&gpmc->nb); in gpmc_probe()
2586 pm_runtime_put_sync(&pdev->dev); in gpmc_probe()
2587 pm_runtime_disable(&pdev->dev); in gpmc_probe()
2596 cpu_pm_unregister_notifier(&gpmc->nb); in gpmc_remove()
2599 pm_runtime_put_sync(&pdev->dev); in gpmc_remove()
2600 pm_runtime_disable(&pdev->dev); in gpmc_remove()
2612 gpmc->is_suspended = 1; in gpmc_suspend()
2623 gpmc->is_suspended = 0; in gpmc_resume()