Lines Matching +full:8 +full:bit
18 #define VI6_CMD_UPDHDR BIT(4)
19 #define VI6_CMD_STRCMD BIT(0)
22 #define VI6_CLK_DCSWT_CSTPW_MASK (0xff << 8)
23 #define VI6_CLK_DCSWT_CSTPW_SHIFT 8
28 #define VI6_SRESET_SRTS(n) BIT(n)
31 #define VI6_STATUS_FLD_STD(n) BIT((n) + 28)
32 #define VI6_STATUS_SYS_ACT(n) BIT((n) + 8)
35 #define VI6_WFP_IRQ_ENB_DFEE BIT(1)
36 #define VI6_WFP_IRQ_ENB_FREE BIT(0)
39 #define VI6_WFP_IRQ_STA_DFE BIT(1)
40 #define VI6_WFP_IRQ_STA_FRE BIT(0)
43 #define VI6_DISP_IRQ_ENB_DSTE BIT(8)
44 #define VI6_DISP_IRQ_ENB_MAEE BIT(5)
45 #define VI6_DISP_IRQ_ENB_LNEE(n) BIT(n)
48 #define VI6_DISP_IRQ_STA_DST BIT(8)
49 #define VI6_DISP_IRQ_STA_MAE BIT(5)
50 #define VI6_DISP_IRQ_STA_LNE(n) BIT(n)
62 #define VI6_DL_CTRL_DC2 BIT(12)
63 #define VI6_DL_CTRL_DC1 BIT(8)
64 #define VI6_DL_CTRL_DC0 BIT(4)
65 #define VI6_DL_CTRL_CFM0 BIT(2)
66 #define VI6_DL_CTRL_NH0 BIT(1)
67 #define VI6_DL_CTRL_DLE BIT(0)
72 #define VI6_DL_SWAP_LWS BIT(2)
73 #define VI6_DL_SWAP_WDS BIT(1)
74 #define VI6_DL_SWAP_BTS BIT(0)
77 #define VI6_DL_EXT_CTRL_NWE BIT(16)
78 #define VI6_DL_EXT_CTRL_POLINT_MASK (0x3f << 8)
79 #define VI6_DL_EXT_CTRL_POLINT_SHIFT 8
80 #define VI6_DL_EXT_CTRL_DLPRI BIT(5)
81 #define VI6_DL_EXT_CTRL_EXPRI BIT(4)
82 #define VI6_DL_EXT_CTRL_EXT BIT(0)
84 #define VI6_DL_EXT_AUTOFLD_INT BIT(0)
87 #define VI6_DL_BODY_SIZE_UPD BIT(24)
110 #define VI6_RPF_INFMT_VIR BIT(28)
111 #define VI6_RPF_INFMT_CIPM BIT(16)
112 #define VI6_RPF_INFMT_SPYCS BIT(15)
113 #define VI6_RPF_INFMT_SPUVS BIT(14)
123 #define VI6_RPF_INFMT_CSC BIT(8)
128 #define VI6_RPF_DSWAP_A_LLS BIT(11)
129 #define VI6_RPF_DSWAP_A_LWS BIT(10)
130 #define VI6_RPF_DSWAP_A_WDS BIT(9)
131 #define VI6_RPF_DSWAP_A_BTS BIT(8)
132 #define VI6_RPF_DSWAP_P_LLS BIT(3)
133 #define VI6_RPF_DSWAP_P_LWS BIT(2)
134 #define VI6_RPF_DSWAP_P_WDS BIT(1)
135 #define VI6_RPF_DSWAP_P_BTS BIT(0)
153 #define VI6_RPF_ALPH_SEL_BSEL BIT(23)
158 #define VI6_RPF_ALPH_SEL_ALPHA1_MASK (0xff << 8)
159 #define VI6_RPF_ALPH_SEL_ALPHA1_SHIFT 8
168 #define VI6_RPF_VRTCOL_SET_LAYG_MASK (0xff << 8)
169 #define VI6_RPF_VRTCOL_SET_LAYG_SHIFT 8
174 #define VI6_RPF_MSK_CTRL_MSK_EN BIT(24)
177 #define VI6_RPF_MSK_CTRL_MGG_MASK (0xff << 8)
178 #define VI6_RPF_MSK_CTRL_MGG_SHIFT 8
188 #define VI6_RPF_MSK_SET_MSG_MASK (0xff << 8)
189 #define VI6_RPF_MSK_SET_MSG_SHIFT 8
194 #define VI6_RPF_CKEY_CTRL_CV BIT(4)
195 #define VI6_RPF_CKEY_CTRL_SAPE1 BIT(1)
196 #define VI6_RPF_CKEY_CTRL_SAPE0 BIT(0)
204 #define VI6_RPF_CKEY_SET_GY_MASK (0xff << 8)
205 #define VI6_RPF_CKEY_SET_GY_SHIFT 8
224 #define VI6_RPF_MULT_ALPHA_P_MMD_NONE (0 << 8)
225 #define VI6_RPF_MULT_ALPHA_P_MMD_RATIO (1 << 8)
226 #define VI6_RPF_MULT_ALPHA_P_MMD_IMAGE (2 << 8)
227 #define VI6_RPF_MULT_ALPHA_P_MMD_BOTH (3 << 8)
253 #define VI6_WPF_SZCLIP_EN BIT(28)
262 #define VI6_WPF_OUTFMT_PXA BIT(23)
263 #define VI6_WPF_OUTFMT_ROT BIT(18)
264 #define VI6_WPF_OUTFMT_HFLP BIT(17)
265 #define VI6_WPF_OUTFMT_FLP BIT(16)
266 #define VI6_WPF_OUTFMT_SPYCS BIT(15)
267 #define VI6_WPF_OUTFMT_SPUVS BIT(14)
276 #define VI6_WPF_OUTFMT_CSC BIT(8)
281 #define VI6_WPF_DSWAP_P_LLS BIT(3)
282 #define VI6_WPF_DSWAP_P_LWS BIT(2)
283 #define VI6_WPF_DSWAP_P_WDS BIT(1)
284 #define VI6_WPF_DSWAP_P_BTS BIT(0)
287 #define VI6_WPF_RNDCTRL_CBRM BIT(28)
300 #define VI6_WPF_ROT_CTRL_LN16 BIT(17)
311 #define VI6_WPF_WRBCK_CTRL_WBMD BIT(0)
320 #define VI6_UIF_DISCOM_DOCMCR_CMPRU BIT(16)
321 #define VI6_UIF_DISCOM_DOCMCR_CMPR BIT(0)
324 #define VI6_UIF_DISCOM_DOCMSTR_CMPPRE BIT(1)
325 #define VI6_UIF_DISCOM_DOCMSTR_CMPST BIT(0)
328 #define VI6_UIF_DISCOM_DOCMCLSTR_CMPCLPRE BIT(1)
329 #define VI6_UIF_DISCOM_DOCMCLSTR_CMPCLST BIT(0)
332 #define VI6_UIF_DISCOM_DOCMIENR_CMPPREIEN BIT(1)
333 #define VI6_UIF_DISCOM_DOCMIENR_CMPIEN BIT(0)
340 #define VI6_UIF_DISCOM_DOCMPMR_CMPDFA(n) ((n) << 8)
341 #define VI6_UIF_DISCOM_DOCMPMR_CMPDAUF BIT(7)
358 #define VI6_DPR_WPF_FPORCH_FP_WPFN (5 << 8)
368 #define VI6_DPR_ROUTE_BRSSEL BIT(28)
371 #define VI6_DPR_ROUTE_FP_MASK (0x3f << 8)
372 #define VI6_DPR_ROUTE_FP_SHIFT 8
378 #define VI6_DPR_SMPPT_TGW_MASK (7 << 8)
379 #define VI6_DPR_SMPPT_TGW_SHIFT 8
407 #define VI6_SRU_CTRL0_PARAM1_MASK (0x1f << 8)
408 #define VI6_SRU_CTRL0_PARAM1_SHIFT 8
410 #define VI6_SRU_CTRL0_PARAM2 BIT(3)
411 #define VI6_SRU_CTRL0_PARAM3 BIT(2)
412 #define VI6_SRU_CTRL0_PARAM4 BIT(1)
413 #define VI6_SRU_CTRL0_EN BIT(0)
420 #define VI6_SRU_CTRL2_PARAM7_SHIFT 8
430 #define VI6_UDS_CTRL_AMD BIT(30)
431 #define VI6_UDS_CTRL_FMD BIT(29)
432 #define VI6_UDS_CTRL_BLADV BIT(28)
433 #define VI6_UDS_CTRL_AON BIT(25)
434 #define VI6_UDS_CTRL_ATHON BIT(24)
435 #define VI6_UDS_CTRL_BC BIT(20)
436 #define VI6_UDS_CTRL_NE_A BIT(19)
437 #define VI6_UDS_CTRL_NE_RCR BIT(18)
438 #define VI6_UDS_CTRL_NE_GY BIT(17)
439 #define VI6_UDS_CTRL_NE_BCB BIT(16)
440 #define VI6_UDS_CTRL_AMDSLH BIT(2)
441 #define VI6_UDS_CTRL_TDIPC BIT(1)
454 #define VI6_UDS_ALPTH_TH1_MASK (0xff << 8)
455 #define VI6_UDS_ALPTH_TH1_SHIFT 8
462 #define VI6_UDS_ALPVAL_VAL1_MASK (0xff << 8)
463 #define VI6_UDS_ALPVAL_VAL1_SHIFT 8
480 #define VI6_UDS_IPC_FIELD BIT(27)
485 #define VI6_UDS_HSZCLIP_HCEN BIT(28)
500 #define VI6_UDS_FILL_COLOR_GFILC_MASK (0xff << 8)
501 #define VI6_UDS_FILL_COLOR_GFILC_SHIFT 8
510 #define VI6_LUT_CTRL_EN BIT(0)
517 #define VI6_CLU_CTRL_AAI BIT(28)
518 #define VI6_CLU_CTRL_MVS BIT(24)
521 #define VI6_CLU_CTRL_OS0_2D (3 << 8)
524 #define VI6_CLU_CTRL_M2D BIT(1)
525 #define VI6_CLU_CTRL_EN BIT(0)
532 #define VI6_HST_CTRL_EN BIT(0)
539 #define VI6_HSI_CTRL_EN BIT(0)
553 #define VI6_ROP_NOR 8
566 #define VI6_BRU_INCTRL_NRM BIT(28)
594 #define VI6_BRU_VIRRPF_COL_GY_MASK (0xff << 8)
595 #define VI6_BRU_VIRRPF_COL_GY_SHIFT 8
599 #define VI6_BRU_CTRL(n) (0x0010 + (n) * 8 + ((n) <= 3 ? 0 : 4))
600 #define VI6_BRU_CTRL_RBC BIT(31)
612 #define VI6_BRU_BLD(n) (0x0014 + (n) * 8 + ((n) <= 3 ? 0 : 4))
613 #define VI6_BRU_BLD_CBES BIT(31)
627 #define VI6_BRU_BLD_ABES BIT(23)
640 #define VI6_BRU_BLD_COEFX_MASK (0xff << 8)
641 #define VI6_BRU_BLD_COEFX_SHIFT 8
665 #define VI6_HGO_MODE_STEP BIT(10)
666 #define VI6_HGO_MODE_MAXRGB BIT(7)
667 #define VI6_HGO_MODE_OFSB_R BIT(6)
668 #define VI6_HGO_MODE_OFSB_G BIT(5)
669 #define VI6_HGO_MODE_OFSB_B BIT(4)
673 #define VI6_HGO_LBn_H(n) (0x3010 + (n) * 8)
674 #define VI6_HGO_LBn_V(n) (0x3014 + (n) * 8)
690 #define VI6_HGO_REGRST_RCLEA BIT(0)
709 #define VI6_HGT_LBn_H(n) (0x3428 + (n) * 8)
710 #define VI6_HGT_LBn_V(n) (0x342c + (n) * 8)
716 #define VI6_HGT_REGRST_RCLEA BIT(0)
727 #define VI6_LIF_CTRL_CFMT BIT(4)
728 #define VI6_LIF_CTRL_REQSEL BIT(1)
729 #define VI6_LIF_CTRL_LIF_EN BIT(0)
738 #define VI6_LIF_LBA_LBA0 BIT(31)
755 #define VI6_IP_VERSION_MODEL_MASK (0xff << 8)
756 #define VI6_IP_VERSION_MODEL_VSPS_H2 (0x09 << 8)
757 #define VI6_IP_VERSION_MODEL_VSPR_H2 (0x0a << 8)
758 #define VI6_IP_VERSION_MODEL_VSPD_GEN2 (0x0b << 8)
759 #define VI6_IP_VERSION_MODEL_VSPS_M2 (0x0c << 8)
760 #define VI6_IP_VERSION_MODEL_VSPS_V2H (0x12 << 8)
761 #define VI6_IP_VERSION_MODEL_VSPD_V2H (0x13 << 8)
762 #define VI6_IP_VERSION_MODEL_VSPI_GEN3 (0x14 << 8)
763 #define VI6_IP_VERSION_MODEL_VSPBD_GEN3 (0x15 << 8)
764 #define VI6_IP_VERSION_MODEL_VSPBC_GEN3 (0x16 << 8)
765 #define VI6_IP_VERSION_MODEL_VSPD_GEN3 (0x17 << 8)
766 #define VI6_IP_VERSION_MODEL_VSPD_V3 (0x18 << 8)
767 #define VI6_IP_VERSION_MODEL_VSPDL_GEN3 (0x19 << 8)
768 #define VI6_IP_VERSION_MODEL_VSPBS_GEN3 (0x1a << 8)