Lines Matching full:vin
3 * Driver for Renesas R-Car VIN
19 #include "rcar-vin.h"
25 /* Register offsets for R-Car VIN */
78 /* Register bit fields for R-Car VIN */
146 static void rvin_write(struct rvin_dev *vin, u32 value, u32 offset) in rvin_write() argument
148 iowrite32(value, vin->base + offset); in rvin_write()
151 static u32 rvin_read(struct rvin_dev *vin, u32 offset) in rvin_read() argument
153 return ioread32(vin->base + offset); in rvin_read()
478 static void rvin_set_coeff(struct rvin_dev *vin, unsigned short xs) in rvin_set_coeff() argument
499 rvin_write(vin, p_set->coeff_set[0], VNC1A_REG); in rvin_set_coeff()
500 rvin_write(vin, p_set->coeff_set[1], VNC1B_REG); in rvin_set_coeff()
501 rvin_write(vin, p_set->coeff_set[2], VNC1C_REG); in rvin_set_coeff()
503 rvin_write(vin, p_set->coeff_set[3], VNC2A_REG); in rvin_set_coeff()
504 rvin_write(vin, p_set->coeff_set[4], VNC2B_REG); in rvin_set_coeff()
505 rvin_write(vin, p_set->coeff_set[5], VNC2C_REG); in rvin_set_coeff()
507 rvin_write(vin, p_set->coeff_set[6], VNC3A_REG); in rvin_set_coeff()
508 rvin_write(vin, p_set->coeff_set[7], VNC3B_REG); in rvin_set_coeff()
509 rvin_write(vin, p_set->coeff_set[8], VNC3C_REG); in rvin_set_coeff()
511 rvin_write(vin, p_set->coeff_set[9], VNC4A_REG); in rvin_set_coeff()
512 rvin_write(vin, p_set->coeff_set[10], VNC4B_REG); in rvin_set_coeff()
513 rvin_write(vin, p_set->coeff_set[11], VNC4C_REG); in rvin_set_coeff()
515 rvin_write(vin, p_set->coeff_set[12], VNC5A_REG); in rvin_set_coeff()
516 rvin_write(vin, p_set->coeff_set[13], VNC5B_REG); in rvin_set_coeff()
517 rvin_write(vin, p_set->coeff_set[14], VNC5C_REG); in rvin_set_coeff()
519 rvin_write(vin, p_set->coeff_set[15], VNC6A_REG); in rvin_set_coeff()
520 rvin_write(vin, p_set->coeff_set[16], VNC6B_REG); in rvin_set_coeff()
521 rvin_write(vin, p_set->coeff_set[17], VNC6C_REG); in rvin_set_coeff()
523 rvin_write(vin, p_set->coeff_set[18], VNC7A_REG); in rvin_set_coeff()
524 rvin_write(vin, p_set->coeff_set[19], VNC7B_REG); in rvin_set_coeff()
525 rvin_write(vin, p_set->coeff_set[20], VNC7C_REG); in rvin_set_coeff()
527 rvin_write(vin, p_set->coeff_set[21], VNC8A_REG); in rvin_set_coeff()
528 rvin_write(vin, p_set->coeff_set[22], VNC8B_REG); in rvin_set_coeff()
529 rvin_write(vin, p_set->coeff_set[23], VNC8C_REG); in rvin_set_coeff()
532 static void rvin_crop_scale_comp_gen2(struct rvin_dev *vin) in rvin_crop_scale_comp_gen2() argument
538 crop_height = vin->crop.height; in rvin_crop_scale_comp_gen2()
539 if (V4L2_FIELD_HAS_BOTH(vin->format.field)) in rvin_crop_scale_comp_gen2()
543 if (crop_height != vin->compose.height) in rvin_crop_scale_comp_gen2()
544 ys = (4096 * crop_height) / vin->compose.height; in rvin_crop_scale_comp_gen2()
545 rvin_write(vin, ys, VNYS_REG); in rvin_crop_scale_comp_gen2()
548 if (vin->crop.width != vin->compose.width) in rvin_crop_scale_comp_gen2()
549 xs = (4096 * vin->crop.width) / vin->compose.width; in rvin_crop_scale_comp_gen2()
555 rvin_write(vin, xs, VNXS_REG); in rvin_crop_scale_comp_gen2()
561 rvin_set_coeff(vin, xs); in rvin_crop_scale_comp_gen2()
564 rvin_write(vin, 0, VNSPPOC_REG); in rvin_crop_scale_comp_gen2()
565 rvin_write(vin, 0, VNSLPOC_REG); in rvin_crop_scale_comp_gen2()
566 rvin_write(vin, vin->format.width - 1, VNEPPOC_REG); in rvin_crop_scale_comp_gen2()
568 if (V4L2_FIELD_HAS_BOTH(vin->format.field)) in rvin_crop_scale_comp_gen2()
569 rvin_write(vin, vin->format.height / 2 - 1, VNELPOC_REG); in rvin_crop_scale_comp_gen2()
571 rvin_write(vin, vin->format.height - 1, VNELPOC_REG); in rvin_crop_scale_comp_gen2()
573 vin_dbg(vin, in rvin_crop_scale_comp_gen2()
575 vin->crop.width, vin->crop.height, vin->crop.left, in rvin_crop_scale_comp_gen2()
576 vin->crop.top, ys, xs, vin->format.width, vin->format.height, in rvin_crop_scale_comp_gen2()
580 void rvin_crop_scale_comp(struct rvin_dev *vin) in rvin_crop_scale_comp() argument
586 rvin_write(vin, vin->crop.left, VNSPPRC_REG); in rvin_crop_scale_comp()
587 rvin_write(vin, vin->crop.left + vin->crop.width - 1, VNEPPRC_REG); in rvin_crop_scale_comp()
588 rvin_write(vin, vin->crop.top, VNSLPRC_REG); in rvin_crop_scale_comp()
589 rvin_write(vin, vin->crop.top + vin->crop.height - 1, VNELPRC_REG); in rvin_crop_scale_comp()
592 if (vin->info->model != RCAR_GEN3) in rvin_crop_scale_comp()
593 rvin_crop_scale_comp_gen2(vin); in rvin_crop_scale_comp()
595 fmt = rvin_format_from_pixel(vin, vin->format.pixelformat); in rvin_crop_scale_comp()
596 stride = vin->format.bytesperline / fmt->bpp; in rvin_crop_scale_comp()
601 switch (vin->format.pixelformat) { in rvin_crop_scale_comp()
612 rvin_write(vin, stride, VNIS_REG); in rvin_crop_scale_comp()
619 static int rvin_setup(struct rvin_dev *vin) in rvin_setup() argument
624 switch (vin->format.field) { in rvin_setup()
635 if (!vin->info->use_mc && vin->std & V4L2_STD_525_60) in rvin_setup()
661 switch (vin->mbus_code) { in rvin_setup()
673 if (!vin->is_csi && in rvin_setup()
674 vin->parallel.mbus_type == V4L2_MBUS_BT656) in rvin_setup()
686 if (!vin->is_csi && in rvin_setup()
687 vin->parallel.mbus_type == V4L2_MBUS_BT656) in rvin_setup()
705 if (vin->info->model == RCAR_GEN3) in rvin_setup()
710 if (!vin->is_csi) { in rvin_setup()
712 if (!(vin->parallel.bus.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) in rvin_setup()
716 if (!(vin->parallel.bus.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) in rvin_setup()
720 if (vin->parallel.bus.flags & V4L2_MBUS_DATA_ENABLE_LOW) in rvin_setup()
723 switch (vin->mbus_code) { in rvin_setup()
725 if (vin->parallel.bus.bus_width == 8 && in rvin_setup()
726 vin->parallel.bus.data_shift == 8) in rvin_setup()
737 switch (vin->format.pixelformat) { in rvin_setup()
740 rvin_write(vin, in rvin_setup()
741 ALIGN(vin->format.bytesperline * vin->format.height, in rvin_setup()
743 dmr = vin->format.pixelformat == V4L2_PIX_FMT_NV12 ? in rvin_setup()
766 dmr = (vin->alpha ? VNDMR_ABIT : 0) | VNDMR_DTMD_ARGB; in rvin_setup()
769 dmr = VNDMR_A8BIT(vin->alpha) | VNDMR_EXRGB | VNDMR_DTMD_ARGB; in rvin_setup()
778 vin_err(vin, "Invalid pixelformat (0x%x)\n", in rvin_setup()
779 vin->format.pixelformat); in rvin_setup()
790 if (vin->info->model == RCAR_GEN3) { in rvin_setup()
792 if (vin->is_csi) in rvin_setup()
802 rvin_write(vin, interrupts, VNINTS_REG); in rvin_setup()
804 rvin_write(vin, interrupts, VNIE_REG); in rvin_setup()
806 rvin_write(vin, dmr, VNDMR_REG); in rvin_setup()
807 rvin_write(vin, dmr2, VNDMR2_REG); in rvin_setup()
810 rvin_write(vin, vnmc | VNMC_ME, VNMC_REG); in rvin_setup()
815 static void rvin_disable_interrupts(struct rvin_dev *vin) in rvin_disable_interrupts() argument
817 rvin_write(vin, 0, VNIE_REG); in rvin_disable_interrupts()
820 static u32 rvin_get_interrupt_status(struct rvin_dev *vin) in rvin_get_interrupt_status() argument
822 return rvin_read(vin, VNINTS_REG); in rvin_get_interrupt_status()
825 static void rvin_ack_interrupt(struct rvin_dev *vin) in rvin_ack_interrupt() argument
827 rvin_write(vin, rvin_read(vin, VNINTS_REG), VNINTS_REG); in rvin_ack_interrupt()
830 static bool rvin_capture_active(struct rvin_dev *vin) in rvin_capture_active() argument
832 return rvin_read(vin, VNMS_REG) & VNMS_CA; in rvin_capture_active()
835 static enum v4l2_field rvin_get_active_field(struct rvin_dev *vin, u32 vnms) in rvin_get_active_field() argument
837 if (vin->format.field == V4L2_FIELD_ALTERNATE) { in rvin_get_active_field()
844 return vin->format.field; in rvin_get_active_field()
847 static void rvin_set_slot_addr(struct rvin_dev *vin, int slot, dma_addr_t addr) in rvin_set_slot_addr() argument
853 fmt = rvin_format_from_pixel(vin, vin->format.pixelformat); in rvin_set_slot_addr()
859 offsetx = vin->compose.left * fmt->bpp; in rvin_set_slot_addr()
860 offsety = vin->compose.top * vin->format.bytesperline; in rvin_set_slot_addr()
870 rvin_write(vin, offset, VNMB_REG(slot)); in rvin_set_slot_addr()
879 static void rvin_fill_hw_slot(struct rvin_dev *vin, int slot) in rvin_fill_hw_slot() argument
887 if (WARN_ON(vin->buf_hw[slot].buffer)) in rvin_fill_hw_slot()
892 if (vin->buf_hw[prev].type == HALF_TOP) { in rvin_fill_hw_slot()
893 vbuf = vin->buf_hw[prev].buffer; in rvin_fill_hw_slot()
894 vin->buf_hw[slot].buffer = vbuf; in rvin_fill_hw_slot()
895 vin->buf_hw[slot].type = HALF_BOTTOM; in rvin_fill_hw_slot()
896 switch (vin->format.pixelformat) { in rvin_fill_hw_slot()
899 phys_addr = vin->buf_hw[prev].phys + in rvin_fill_hw_slot()
900 vin->format.sizeimage / 4; in rvin_fill_hw_slot()
903 phys_addr = vin->buf_hw[prev].phys + in rvin_fill_hw_slot()
904 vin->format.sizeimage / 2; in rvin_fill_hw_slot()
907 } else if (vin->state != RUNNING || list_empty(&vin->buf_list)) { in rvin_fill_hw_slot()
908 vin->buf_hw[slot].buffer = NULL; in rvin_fill_hw_slot()
909 vin->buf_hw[slot].type = FULL; in rvin_fill_hw_slot()
910 phys_addr = vin->scratch_phys; in rvin_fill_hw_slot()
913 buf = list_entry(vin->buf_list.next, struct rvin_buffer, list); in rvin_fill_hw_slot()
916 vin->buf_hw[slot].buffer = vbuf; in rvin_fill_hw_slot()
918 vin->buf_hw[slot].type = in rvin_fill_hw_slot()
919 V4L2_FIELD_IS_SEQUENTIAL(vin->format.field) ? in rvin_fill_hw_slot()
926 vin_dbg(vin, "Filling HW slot: %d type: %d buffer: %p\n", in rvin_fill_hw_slot()
927 slot, vin->buf_hw[slot].type, vin->buf_hw[slot].buffer); in rvin_fill_hw_slot()
929 vin->buf_hw[slot].phys = phys_addr; in rvin_fill_hw_slot()
930 rvin_set_slot_addr(vin, slot, phys_addr); in rvin_fill_hw_slot()
933 static int rvin_capture_start(struct rvin_dev *vin) in rvin_capture_start() argument
938 vin->buf_hw[slot].buffer = NULL; in rvin_capture_start()
939 vin->buf_hw[slot].type = FULL; in rvin_capture_start()
943 rvin_fill_hw_slot(vin, slot); in rvin_capture_start()
945 rvin_crop_scale_comp(vin); in rvin_capture_start()
947 ret = rvin_setup(vin); in rvin_capture_start()
951 vin_dbg(vin, "Starting to capture\n"); in rvin_capture_start()
954 rvin_write(vin, VNFC_C_FRAME, VNFC_REG); in rvin_capture_start()
956 vin->state = STARTING; in rvin_capture_start()
961 static void rvin_capture_stop(struct rvin_dev *vin) in rvin_capture_stop() argument
964 rvin_write(vin, 0, VNFC_REG); in rvin_capture_stop()
967 rvin_write(vin, rvin_read(vin, VNMC_REG) & ~VNMC_ME, VNMC_REG); in rvin_capture_stop()
979 struct rvin_dev *vin = data; in rvin_irq() local
985 spin_lock_irqsave(&vin->qlock, flags); in rvin_irq()
987 int_status = rvin_get_interrupt_status(vin); in rvin_irq()
991 rvin_ack_interrupt(vin); in rvin_irq()
995 if (vin->state == STOPPED) { in rvin_irq()
996 vin_dbg(vin, "IRQ while state stopped\n"); in rvin_irq()
1001 vnms = rvin_read(vin, VNMS_REG); in rvin_irq()
1008 if (vin->state == STARTING) { in rvin_irq()
1010 vin_dbg(vin, "Starting sync slot: %d\n", slot); in rvin_irq()
1014 vin_dbg(vin, "Capture start synced!\n"); in rvin_irq()
1015 vin->state = RUNNING; in rvin_irq()
1019 if (vin->buf_hw[slot].buffer) { in rvin_irq()
1024 if (vin->buf_hw[slot].type == HALF_TOP) { in rvin_irq()
1025 vin->buf_hw[slot].buffer = NULL; in rvin_irq()
1026 rvin_fill_hw_slot(vin, slot); in rvin_irq()
1030 vin->buf_hw[slot].buffer->field = in rvin_irq()
1031 rvin_get_active_field(vin, vnms); in rvin_irq()
1032 vin->buf_hw[slot].buffer->sequence = vin->sequence; in rvin_irq()
1033 vin->buf_hw[slot].buffer->vb2_buf.timestamp = ktime_get_ns(); in rvin_irq()
1034 vb2_buffer_done(&vin->buf_hw[slot].buffer->vb2_buf, in rvin_irq()
1036 vin->buf_hw[slot].buffer = NULL; in rvin_irq()
1039 vin_dbg(vin, "Dropping frame %u\n", vin->sequence); in rvin_irq()
1042 vin->sequence++; in rvin_irq()
1045 rvin_fill_hw_slot(vin, slot); in rvin_irq()
1047 spin_unlock_irqrestore(&vin->qlock, flags); in rvin_irq()
1052 static void return_unused_buffers(struct rvin_dev *vin, in return_unused_buffers() argument
1058 spin_lock_irqsave(&vin->qlock, flags); in return_unused_buffers()
1060 list_for_each_entry_safe(buf, node, &vin->buf_list, list) { in return_unused_buffers()
1065 spin_unlock_irqrestore(&vin->qlock, flags); in return_unused_buffers()
1073 struct rvin_dev *vin = vb2_get_drv_priv(vq); in rvin_queue_setup() local
1077 return sizes[0] < vin->format.sizeimage ? -EINVAL : 0; in rvin_queue_setup()
1080 sizes[0] = vin->format.sizeimage; in rvin_queue_setup()
1087 struct rvin_dev *vin = vb2_get_drv_priv(vb->vb2_queue); in rvin_buffer_prepare() local
1088 unsigned long size = vin->format.sizeimage; in rvin_buffer_prepare()
1091 vin_err(vin, "buffer too small (%lu < %lu)\n", in rvin_buffer_prepare()
1104 struct rvin_dev *vin = vb2_get_drv_priv(vb->vb2_queue); in rvin_buffer_queue() local
1107 spin_lock_irqsave(&vin->qlock, flags); in rvin_buffer_queue()
1109 list_add_tail(to_buf_list(vbuf), &vin->buf_list); in rvin_buffer_queue()
1111 spin_unlock_irqrestore(&vin->qlock, flags); in rvin_buffer_queue()
1114 static int rvin_mc_validate_format(struct rvin_dev *vin, struct v4l2_subdev *sd, in rvin_mc_validate_format() argument
1133 if (vin->format.pixelformat != V4L2_PIX_FMT_SBGGR8) in rvin_mc_validate_format()
1137 if (vin->format.pixelformat != V4L2_PIX_FMT_SGBRG8) in rvin_mc_validate_format()
1141 if (vin->format.pixelformat != V4L2_PIX_FMT_SGRBG8) in rvin_mc_validate_format()
1145 if (vin->format.pixelformat != V4L2_PIX_FMT_SRGGB8) in rvin_mc_validate_format()
1151 vin->mbus_code = fmt.format.code; in rvin_mc_validate_format()
1165 switch (vin->format.field) { in rvin_mc_validate_format()
1176 /* Use VIN hardware to combine the two fields */ in rvin_mc_validate_format()
1187 if (fmt.format.width != vin->format.width || in rvin_mc_validate_format()
1188 fmt.format.height != vin->format.height || in rvin_mc_validate_format()
1189 fmt.format.code != vin->mbus_code) in rvin_mc_validate_format()
1195 static int rvin_set_stream(struct rvin_dev *vin, int on) in rvin_set_stream() argument
1204 if (!vin->info->use_mc) { in rvin_set_stream()
1205 ret = v4l2_subdev_call(vin->parallel.subdev, video, s_stream, in rvin_set_stream()
1211 pad = media_entity_remote_pad(&vin->pad); in rvin_set_stream()
1218 media_pipeline_stop(&vin->vdev.entity); in rvin_set_stream()
1222 ret = rvin_mc_validate_format(vin, sd, pad); in rvin_set_stream()
1228 * starts of multiple VIN instances as they might share in rvin_set_stream()
1232 mdev = vin->vdev.entity.graph_obj.mdev; in rvin_set_stream()
1234 pipe = sd->entity.pipe ? sd->entity.pipe : &vin->vdev.pipe; in rvin_set_stream()
1235 ret = __media_pipeline_start(&vin->vdev.entity, pipe); in rvin_set_stream()
1244 media_pipeline_stop(&vin->vdev.entity); in rvin_set_stream()
1249 int rvin_start_streaming(struct rvin_dev *vin) in rvin_start_streaming() argument
1254 ret = rvin_set_stream(vin, 1); in rvin_start_streaming()
1258 spin_lock_irqsave(&vin->qlock, flags); in rvin_start_streaming()
1260 vin->sequence = 0; in rvin_start_streaming()
1262 ret = rvin_capture_start(vin); in rvin_start_streaming()
1264 rvin_set_stream(vin, 0); in rvin_start_streaming()
1266 spin_unlock_irqrestore(&vin->qlock, flags); in rvin_start_streaming()
1273 struct rvin_dev *vin = vb2_get_drv_priv(vq); in rvin_start_streaming_vq() local
1277 vin->scratch = dma_alloc_coherent(vin->dev, vin->format.sizeimage, in rvin_start_streaming_vq()
1278 &vin->scratch_phys, GFP_KERNEL); in rvin_start_streaming_vq()
1279 if (!vin->scratch) in rvin_start_streaming_vq()
1282 ret = rvin_start_streaming(vin); in rvin_start_streaming_vq()
1288 dma_free_coherent(vin->dev, vin->format.sizeimage, vin->scratch, in rvin_start_streaming_vq()
1289 vin->scratch_phys); in rvin_start_streaming_vq()
1291 return_unused_buffers(vin, VB2_BUF_STATE_QUEUED); in rvin_start_streaming_vq()
1296 void rvin_stop_streaming(struct rvin_dev *vin) in rvin_stop_streaming() argument
1302 spin_lock_irqsave(&vin->qlock, flags); in rvin_stop_streaming()
1304 if (vin->state == STOPPED) { in rvin_stop_streaming()
1305 spin_unlock_irqrestore(&vin->qlock, flags); in rvin_stop_streaming()
1309 vin->state = STOPPING; in rvin_stop_streaming()
1316 if (vin->buf_hw[i].buffer) in rvin_stop_streaming()
1322 spin_unlock_irqrestore(&vin->qlock, flags); in rvin_stop_streaming()
1324 spin_lock_irqsave(&vin->qlock, flags); in rvin_stop_streaming()
1331 rvin_capture_stop(vin); in rvin_stop_streaming()
1334 if (!rvin_capture_active(vin)) { in rvin_stop_streaming()
1335 vin->state = STOPPED; in rvin_stop_streaming()
1339 spin_unlock_irqrestore(&vin->qlock, flags); in rvin_stop_streaming()
1341 spin_lock_irqsave(&vin->qlock, flags); in rvin_stop_streaming()
1344 if (!buffersFreed || vin->state != STOPPED) { in rvin_stop_streaming()
1350 vin_err(vin, "Failed stop HW, something is seriously broken\n"); in rvin_stop_streaming()
1351 vin->state = STOPPED; in rvin_stop_streaming()
1354 spin_unlock_irqrestore(&vin->qlock, flags); in rvin_stop_streaming()
1356 rvin_set_stream(vin, 0); in rvin_stop_streaming()
1359 rvin_disable_interrupts(vin); in rvin_stop_streaming()
1364 struct rvin_dev *vin = vb2_get_drv_priv(vq); in rvin_stop_streaming_vq() local
1366 rvin_stop_streaming(vin); in rvin_stop_streaming_vq()
1369 dma_free_coherent(vin->dev, vin->format.sizeimage, vin->scratch, in rvin_stop_streaming_vq()
1370 vin->scratch_phys); in rvin_stop_streaming_vq()
1372 return_unused_buffers(vin, VB2_BUF_STATE_ERROR); in rvin_stop_streaming_vq()
1385 void rvin_dma_unregister(struct rvin_dev *vin) in rvin_dma_unregister() argument
1387 mutex_destroy(&vin->lock); in rvin_dma_unregister()
1389 v4l2_device_unregister(&vin->v4l2_dev); in rvin_dma_unregister()
1392 int rvin_dma_register(struct rvin_dev *vin, int irq) in rvin_dma_register() argument
1394 struct vb2_queue *q = &vin->queue; in rvin_dma_register()
1398 ret = v4l2_device_register(vin->dev, &vin->v4l2_dev); in rvin_dma_register()
1402 mutex_init(&vin->lock); in rvin_dma_register()
1403 INIT_LIST_HEAD(&vin->buf_list); in rvin_dma_register()
1405 spin_lock_init(&vin->qlock); in rvin_dma_register()
1407 vin->state = STOPPED; in rvin_dma_register()
1410 vin->buf_hw[i].buffer = NULL; in rvin_dma_register()
1415 q->lock = &vin->lock; in rvin_dma_register()
1416 q->drv_priv = vin; in rvin_dma_register()
1422 q->dev = vin->dev; in rvin_dma_register()
1426 vin_err(vin, "failed to initialize VB2 queue\n"); in rvin_dma_register()
1431 ret = devm_request_irq(vin->dev, irq, rvin_irq, IRQF_SHARED, in rvin_dma_register()
1432 KBUILD_MODNAME, vin); in rvin_dma_register()
1434 vin_err(vin, "failed to request irq\n"); in rvin_dma_register()
1440 rvin_dma_unregister(vin); in rvin_dma_register()
1451 * as it's only possible to do so when no VIN in the group is
1454 int rvin_set_channel_routing(struct rvin_dev *vin, u8 chsel) in rvin_set_channel_routing() argument
1461 ret = pm_runtime_resume_and_get(vin->dev); in rvin_set_channel_routing()
1466 vnmc = rvin_read(vin, VNMC_REG); in rvin_set_channel_routing()
1467 rvin_write(vin, vnmc & ~VNMC_VUP, VNMC_REG); in rvin_set_channel_routing()
1475 for (route = vin->info->routes; route->mask; route++) { in rvin_set_channel_routing()
1487 rvin_write(vin, ifmd, VNCSI_IFMD_REG); in rvin_set_channel_routing()
1490 vin_dbg(vin, "Set IFMD 0x%x\n", ifmd); in rvin_set_channel_routing()
1492 vin->chsel = chsel; in rvin_set_channel_routing()
1495 rvin_write(vin, vnmc, VNMC_REG); in rvin_set_channel_routing()
1497 pm_runtime_put(vin->dev); in rvin_set_channel_routing()
1502 void rvin_set_alpha(struct rvin_dev *vin, unsigned int alpha) in rvin_set_alpha() argument
1507 spin_lock_irqsave(&vin->qlock, flags); in rvin_set_alpha()
1509 vin->alpha = alpha; in rvin_set_alpha()
1511 if (vin->state == STOPPED) in rvin_set_alpha()
1514 switch (vin->format.pixelformat) { in rvin_set_alpha()
1516 dmr = rvin_read(vin, VNDMR_REG) & ~VNDMR_ABIT; in rvin_set_alpha()
1517 if (vin->alpha) in rvin_set_alpha()
1521 dmr = rvin_read(vin, VNDMR_REG) & ~VNDMR_A8BIT_MASK; in rvin_set_alpha()
1522 dmr |= VNDMR_A8BIT(vin->alpha); in rvin_set_alpha()
1528 rvin_write(vin, dmr, VNDMR_REG); in rvin_set_alpha()
1530 spin_unlock_irqrestore(&vin->qlock, flags); in rvin_set_alpha()