278 	writel_relaxed(bits & ~clr_bits, vfe->base + reg);  in vfe_reg_clr()
285 	writel_relaxed(bits | set_bits, vfe->base + reg);  in vfe_reg_set()
301 	writel_relaxed(BIT(31), vfe->base + VFE_0_IRQ_MASK_0);  in vfe_global_reset()
305 	writel_relaxed(reset_bits, vfe->base + VFE_0_GLOBAL_RESET_CMD);  in vfe_global_reset()
310 	writel_relaxed(VFE_0_BUS_BDG_CMD_HALT_REQ,  in vfe_halt_request()
316 	writel_relaxed(0x0, vfe->base + VFE_0_BUS_BDG_CMD);  in vfe_halt_clear()
414 		writel_relaxed(reg, vfe->base +  in vfe_wm_line_based()
423 		writel_relaxed(reg, vfe->base +  in vfe_wm_line_based()
426 		writel_relaxed(0, vfe->base +  in vfe_wm_line_based()
428 		writel_relaxed(0, vfe->base +  in vfe_wm_line_based()
445 	writel_relaxed(reg,  in vfe_wm_set_framedrop_period()
452 	writel_relaxed(pattern,  in vfe_wm_set_framedrop_pattern()
463 	writel_relaxed(reg, vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_UB_CFG(wm));  in vfe_wm_set_ub_cfg()
471 	writel_relaxed(VFE_0_BUS_CMD_Mx_RLD_CMD(wm), vfe->base + VFE_0_BUS_CMD);  in vfe_bus_reload_wm()
479 	writel_relaxed(addr,  in vfe_wm_set_ping_addr()
485 	writel_relaxed(addr,  in vfe_wm_set_pong_addr()
501 		writel_relaxed(0x101, vfe->base + VFE_0_BUS_CFG);  in vfe_bus_enable_wr_if()
503 		writel_relaxed(0, vfe->base + VFE_0_BUS_CFG);  in vfe_bus_enable_wr_if()
543 	writel_relaxed(VFE_0_BUS_IMAGE_MASTER_n_WR_IRQ_SUBSAMPLE_PATTERN_DEF,  in vfe_wm_set_subsample()
672 	writel_relaxed(val, vfe->base + VFE_0_REALIGN_BUF_CFG);  in vfe_set_realign_cfg()
690 	writel_relaxed(vfe->reg_update, vfe->base + VFE_0_REG_UPDATE);  in vfe_reg_update()
764 	writel_relaxed(VFE_0_DEMUX_CFG_PERIOD, vfe->base + VFE_0_DEMUX_CFG);  in vfe_set_demux_cfg()
767 	writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_0);  in vfe_set_demux_cfg()
770 	writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_1);  in vfe_set_demux_cfg()
792 	writel_relaxed(even_cfg, vfe->base + VFE_0_DEMUX_EVEN_CFG);  in vfe_set_demux_cfg()
793 	writel_relaxed(odd_cfg, vfe->base + VFE_0_DEMUX_ODD_CFG);  in vfe_set_demux_cfg()
804 	writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_Y_CFG);  in vfe_set_scale_cfg()
809 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_IMAGE_SIZE);  in vfe_set_scale_cfg()
814 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_PHASE);  in vfe_set_scale_cfg()
819 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_IMAGE_SIZE);  in vfe_set_scale_cfg()
824 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_PHASE);  in vfe_set_scale_cfg()
826 	writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_CBCR_CFG);  in vfe_set_scale_cfg()
831 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_IMAGE_SIZE);  in vfe_set_scale_cfg()
836 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_PHASE);  in vfe_set_scale_cfg()
843 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_IMAGE_SIZE);  in vfe_set_scale_cfg()
848 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_PHASE);  in vfe_set_scale_cfg()
860 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_WIDTH);  in vfe_set_crop_cfg()
865 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_HEIGHT);  in vfe_set_crop_cfg()
870 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_WIDTH);  in vfe_set_crop_cfg()
879 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_HEIGHT);  in vfe_set_crop_cfg()
888 	writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MAX_CFG);  in vfe_set_clamp_cfg()
894 	writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MIN_CFG);  in vfe_set_clamp_cfg()
902 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_0);  in vfe_set_qos()
903 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_1);  in vfe_set_qos()
904 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_2);  in vfe_set_qos()
905 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_3);  in vfe_set_qos()
906 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_4);  in vfe_set_qos()
907 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_5);  in vfe_set_qos()
908 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_6);  in vfe_set_qos()
909 	writel_relaxed(val7, vfe->base + VFE_0_BUS_BDG_QOS_CFG_7);  in vfe_set_qos()
917 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_0);  in vfe_set_ds()
918 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_1);  in vfe_set_ds()
919 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_2);  in vfe_set_ds()
920 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_3);  in vfe_set_ds()
921 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_4);  in vfe_set_ds()
922 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_5);  in vfe_set_ds()
923 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_6);  in vfe_set_ds()
924 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_7);  in vfe_set_ds()
925 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_8);  in vfe_set_ds()
926 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_9);  in vfe_set_ds()
927 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_10);  in vfe_set_ds()
928 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_11);  in vfe_set_ds()
929 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_12);  in vfe_set_ds()
930 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_13);  in vfe_set_ds()
931 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_14);  in vfe_set_ds()
932 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_15);  in vfe_set_ds()
933 	writel_relaxed(val16, vfe->base + VFE_0_BUS_BDG_DS_CFG_16);  in vfe_set_ds()
962 	writel_relaxed(val, vfe->base + VFE_0_CORE_CFG);  in vfe_set_camif_cfg()
966 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_FRAME_CFG);  in vfe_set_camif_cfg()
969 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_WIDTH_CFG);  in vfe_set_camif_cfg()
972 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_HEIGHT_CFG);  in vfe_set_camif_cfg()
975 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_SUBSAMPLE_CFG);  in vfe_set_camif_cfg()
978 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_IRQ_FRAMEDROP_PATTERN);  in vfe_set_camif_cfg()
981 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_IRQ_SUBSAMPLE_PATTERN);  in vfe_set_camif_cfg()
987 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_CFG);  in vfe_set_camif_cfg()
995 	writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD);  in vfe_set_camif_cmd()
1005 	writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD);  in vfe_set_camif_cmd()
1100 	writel_relaxed(*value0, vfe->base + VFE_0_IRQ_CLEAR_0);  in vfe_isr_read()
1101 	writel_relaxed(*value1, vfe->base + VFE_0_IRQ_CLEAR_1);  in vfe_isr_read()
1105 	writel_relaxed(VFE_0_IRQ_CMD_GLOBAL_CLEAR, vfe->base + VFE_0_IRQ_CMD);  in vfe_isr_read()