232 	writel_relaxed(bits & ~clr_bits, vfe->base + reg);  in vfe_reg_clr()
239 	writel_relaxed(bits | set_bits, vfe->base + reg);  in vfe_reg_set()
254 	writel_relaxed(reset_bits, vfe->base + VFE_0_GLOBAL_RESET_CMD);  in vfe_global_reset()
259 	writel_relaxed(VFE_0_BUS_BDG_CMD_HALT_REQ,  in vfe_halt_request()
265 	writel_relaxed(0x0, vfe->base + VFE_0_BUS_BDG_CMD);  in vfe_halt_clear()
325 		writel_relaxed(reg, vfe->base +  in vfe_wm_line_based()
334 		writel_relaxed(reg, vfe->base +  in vfe_wm_line_based()
337 		writel_relaxed(0, vfe->base +  in vfe_wm_line_based()
339 		writel_relaxed(0, vfe->base +  in vfe_wm_line_based()
356 	writel_relaxed(reg,  in vfe_wm_set_framedrop_period()
363 	writel_relaxed(pattern,  in vfe_wm_set_framedrop_pattern()
374 	writel_relaxed(reg, vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_UB_CFG(wm));  in vfe_wm_set_ub_cfg()
380 	writel_relaxed(VFE_0_BUS_CMD_Mx_RLD_CMD(wm), vfe->base + VFE_0_BUS_CMD);  in vfe_bus_reload_wm()
386 	writel_relaxed(addr,  in vfe_wm_set_ping_addr()
392 	writel_relaxed(addr,  in vfe_wm_set_pong_addr()
408 		writel_relaxed(0x10000009, vfe->base + VFE_0_BUS_CFG);  in vfe_bus_enable_wr_if()
410 		writel_relaxed(0, vfe->base + VFE_0_BUS_CFG);  in vfe_bus_enable_wr_if()
451 	writel_relaxed(VFE_0_BUS_IMAGE_MASTER_n_WR_IRQ_SUBSAMPLE_PATTERN_DEF,  in vfe_wm_set_subsample()
542 	writel_relaxed(vfe->reg_update, vfe->base + VFE_0_REG_UPDATE);  in vfe_reg_update()
614 	writel_relaxed(VFE_0_DEMUX_CFG_PERIOD, vfe->base + VFE_0_DEMUX_CFG);  in vfe_set_demux_cfg()
617 	writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_0);  in vfe_set_demux_cfg()
620 	writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_1);  in vfe_set_demux_cfg()
642 	writel_relaxed(even_cfg, vfe->base + VFE_0_DEMUX_EVEN_CFG);  in vfe_set_demux_cfg()
643 	writel_relaxed(odd_cfg, vfe->base + VFE_0_DEMUX_ODD_CFG);  in vfe_set_demux_cfg()
654 	writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_Y_CFG);  in vfe_set_scale_cfg()
659 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_IMAGE_SIZE);  in vfe_set_scale_cfg()
664 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_PHASE);  in vfe_set_scale_cfg()
669 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_IMAGE_SIZE);  in vfe_set_scale_cfg()
674 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_PHASE);  in vfe_set_scale_cfg()
676 	writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_CBCR_CFG);  in vfe_set_scale_cfg()
681 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_IMAGE_SIZE);  in vfe_set_scale_cfg()
686 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_PHASE);  in vfe_set_scale_cfg()
693 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_IMAGE_SIZE);  in vfe_set_scale_cfg()
698 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_PHASE);  in vfe_set_scale_cfg()
710 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_WIDTH);  in vfe_set_crop_cfg()
715 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_HEIGHT);  in vfe_set_crop_cfg()
720 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_WIDTH);  in vfe_set_crop_cfg()
729 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_HEIGHT);  in vfe_set_crop_cfg()
738 	writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MAX_CFG);  in vfe_set_clamp_cfg()
744 	writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MIN_CFG);  in vfe_set_clamp_cfg()
752 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_0);  in vfe_set_qos()
753 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_1);  in vfe_set_qos()
754 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_2);  in vfe_set_qos()
755 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_3);  in vfe_set_qos()
756 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_4);  in vfe_set_qos()
757 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_5);  in vfe_set_qos()
758 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_6);  in vfe_set_qos()
759 	writel_relaxed(val7, vfe->base + VFE_0_BUS_BDG_QOS_CFG_7);  in vfe_set_qos()
799 	writel_relaxed(val, vfe->base + VFE_0_CORE_CFG);  in vfe_set_camif_cfg()
803 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_FRAME_CFG);  in vfe_set_camif_cfg()
806 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_WIDTH_CFG);  in vfe_set_camif_cfg()
809 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_HEIGHT_CFG);  in vfe_set_camif_cfg()
812 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_SUBSAMPLE_CFG_0);  in vfe_set_camif_cfg()
815 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_IRQ_SUBSAMPLE_PATTERN);  in vfe_set_camif_cfg()
821 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_CFG);  in vfe_set_camif_cfg()
829 	writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD);  in vfe_set_camif_cmd()
837 	writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD);  in vfe_set_camif_cmd()
848 		writel_relaxed(val, vfe->base + VFE_0_MODULE_CFG);  in vfe_set_module_cfg()
850 		writel_relaxed(0x0, vfe->base + VFE_0_MODULE_CFG);  in vfe_set_module_cfg()
874 	writel_relaxed(*value0, vfe->base + VFE_0_IRQ_CLEAR_0);  in vfe_isr_read()
875 	writel_relaxed(*value1, vfe->base + VFE_0_IRQ_CLEAR_1);  in vfe_isr_read()
878 	writel_relaxed(VFE_0_IRQ_CMD_GLOBAL_CLEAR, vfe->base + VFE_0_IRQ_CMD);  in vfe_isr_read()